From 62d5784a8f5aa8995b42b6fb5b0b2ffa4f8d69bb Mon Sep 17 00:00:00 2001 From: Amanieu d'Antras Date: Sun, 1 Mar 2020 09:52:04 +0000 Subject: [PATCH] Add RISC-V target features --- src/librustc_codegen_llvm/llvm_util.rs | 11 +++++++++++ src/librustc_feature/active.rs | 1 + src/librustc_span/symbol.rs | 1 + src/librustc_typeck/collect.rs | 1 + src/test/ui/target-feature/gate.rs | 1 + 5 files changed, 15 insertions(+) diff --git a/src/librustc_codegen_llvm/llvm_util.rs b/src/librustc_codegen_llvm/llvm_util.rs index a36e95771e8..286d3630181 100644 --- a/src/librustc_codegen_llvm/llvm_util.rs +++ b/src/librustc_codegen_llvm/llvm_util.rs @@ -236,6 +236,15 @@ pub fn time_trace_profiler_finish(file_name: &str) { const MIPS_WHITELIST: &[(&str, Option)] = &[("fp64", Some(sym::mips_target_feature)), ("msa", Some(sym::mips_target_feature))]; +const RISCV_WHITELIST: &[(&str, Option)] = &[ + ("m", Some(sym::riscv_target_feature)), + ("a", Some(sym::riscv_target_feature)), + ("c", Some(sym::riscv_target_feature)), + ("f", Some(sym::riscv_target_feature)), + ("d", Some(sym::riscv_target_feature)), + ("e", Some(sym::riscv_target_feature)), +]; + const WASM_WHITELIST: &[(&str, Option)] = &[("simd128", Some(sym::wasm_target_feature)), ("atomics", Some(sym::wasm_target_feature))]; @@ -253,6 +262,7 @@ pub fn all_known_features() -> impl Iterator &'static [(&'static str, Opti "hexagon" => HEXAGON_WHITELIST, "mips" | "mips64" => MIPS_WHITELIST, "powerpc" | "powerpc64" => POWERPC_WHITELIST, + "riscv32" | "riscv64" => RISCV_WHITELIST, "wasm32" => WASM_WHITELIST, _ => &[], } diff --git a/src/librustc_feature/active.rs b/src/librustc_feature/active.rs index a1dd7a5ca52..47101ca72b4 100644 --- a/src/librustc_feature/active.rs +++ b/src/librustc_feature/active.rs @@ -228,6 +228,7 @@ pub fn set(&self, features: &mut Features, span: Span) { (active, hexagon_target_feature, "1.27.0", Some(44839), None), (active, powerpc_target_feature, "1.27.0", Some(44839), None), (active, mips_target_feature, "1.27.0", Some(44839), None), + (active, riscv_target_feature, "1.27.0", Some(44839), None), (active, avx512_target_feature, "1.27.0", Some(44839), None), (active, mmx_target_feature, "1.27.0", Some(44839), None), (active, sse4a_target_feature, "1.27.0", Some(44839), None), diff --git a/src/librustc_span/symbol.rs b/src/librustc_span/symbol.rs index a61647bfd65..1f351d09bc3 100644 --- a/src/librustc_span/symbol.rs +++ b/src/librustc_span/symbol.rs @@ -607,6 +607,7 @@ Result, Return, rhs, + riscv_target_feature, rlib, rotate_left, rotate_right, diff --git a/src/librustc_typeck/collect.rs b/src/librustc_typeck/collect.rs index 854bd03b264..4bbb36c8742 100644 --- a/src/librustc_typeck/collect.rs +++ b/src/librustc_typeck/collect.rs @@ -2278,6 +2278,7 @@ fn from_target_feature( Some(sym::hexagon_target_feature) => rust_features.hexagon_target_feature, Some(sym::powerpc_target_feature) => rust_features.powerpc_target_feature, Some(sym::mips_target_feature) => rust_features.mips_target_feature, + Some(sym::riscv_target_feature) => rust_features.riscv_target_feature, Some(sym::avx512_target_feature) => rust_features.avx512_target_feature, Some(sym::mmx_target_feature) => rust_features.mmx_target_feature, Some(sym::sse4a_target_feature) => rust_features.sse4a_target_feature, diff --git a/src/test/ui/target-feature/gate.rs b/src/test/ui/target-feature/gate.rs index 2d51cab675e..f738c16673d 100644 --- a/src/test/ui/target-feature/gate.rs +++ b/src/test/ui/target-feature/gate.rs @@ -25,6 +25,7 @@ // gate-test-movbe_target_feature // gate-test-rtm_target_feature // gate-test-f16c_target_feature +// gate-test-riscv_target_feature #[target_feature(enable = "avx512bw")] //~^ ERROR: currently unstable -- 2.44.0