From 607c5431ae90caed561ca6a8f4846bfa4b953689 Mon Sep 17 00:00:00 2001
From: Jonathan Behrens <fintelia@gmail.com>
Date: Sat, 26 Jan 2019 16:42:42 -0500
Subject: [PATCH] Enable RISC-V atomic compare and swap

---
 src/librustc_target/spec/riscv32imac_unknown_none_elf.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/librustc_target/spec/riscv32imac_unknown_none_elf.rs b/src/librustc_target/spec/riscv32imac_unknown_none_elf.rs
index b199a50f0ca..f05a5712f5a 100644
--- a/src/librustc_target/spec/riscv32imac_unknown_none_elf.rs
+++ b/src/librustc_target/spec/riscv32imac_unknown_none_elf.rs
@@ -28,7 +28,7 @@ pub fn target() -> TargetResult {
             linker: Some("rust-lld".to_string()),
             cpu: "generic-rv32".to_string(),
             max_atomic_width: Some(32),
-            atomic_cas: false, // incomplete +a extension
+            atomic_cas: true,
             features: "+m,+a,+c".to_string(),
             executables: true,
             panic_strategy: PanicStrategy::Abort,
-- 
2.44.0