From: bors <bors@rust-lang.org>
Date: Sun, 11 Jul 2021 01:06:58 +0000 (+0000)
Subject: Auto merge of #86416 - Amanieu:asm_clobber_only, r=nagisa
X-Git-Url: https://git.lizzy.rs/?a=commitdiff_plain;h=99f8efec46c72cb11418f858ae142baa5f3582a9;p=rust.git

Auto merge of #86416 - Amanieu:asm_clobber_only, r=nagisa

Add clobber-only register classes for asm!

These are needed to properly express a function call ABI using a clobber
list, even though we don't support passing actual values into/out of
these registers.
---

99f8efec46c72cb11418f858ae142baa5f3582a9
diff --cc compiler/rustc_codegen_llvm/src/asm.rs
index ecf62ed213d,bd2751790aa..7bd9397d649
--- a/compiler/rustc_codegen_llvm/src/asm.rs
+++ b/compiler/rustc_codegen_llvm/src/asm.rs
@@@ -593,9 -619,10 +620,12 @@@ fn reg_to_llvm(reg: InlineAsmRegOrRegCl
              | InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
              InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
              InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "^Yk",
+             InlineAsmRegClass::X86(
+                 X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg,
+             ) => unreachable!("clobber-only"),
              InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
 +            InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
 +            InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
              InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
                  bug!("LLVM backend does not support SPIR-V")
              }
@@@ -663,8 -696,10 +699,11 @@@ fn modifier_to_llvm
              _ => unreachable!(),
          },
          InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => None,
+         InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg) => {
+             unreachable!("clobber-only")
+         }
          InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => None,
 +        InlineAsmRegClass::Bpf(_) => None,
          InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
              bug!("LLVM backend does not support SPIR-V")
          }
@@@ -711,9 -752,10 +756,12 @@@ fn dummy_output_type(cx: &CodegenCx<'ll
          | InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg)
          | InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => cx.type_f32(),
          InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => cx.type_i16(),
+         InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg) => {
+             unreachable!("clobber-only")
+         }
          InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
 +        InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
 +        InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),
          InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
              bug!("LLVM backend does not support SPIR-V")
          }
diff --cc compiler/rustc_span/src/symbol.rs
index 9051c9d69b5,a8a7797e74a..cfa0c79004c
--- a/compiler/rustc_span/src/symbol.rs
+++ b/compiler/rustc_span/src/symbol.rs
@@@ -1341,8 -1334,8 +1343,9 @@@ symbols! 
          wrapping_add,
          wrapping_mul,
          wrapping_sub,
 +        wreg,
          write_bytes,
+         x87_reg,
          xmm_reg,
          ymm_reg,
          zmm_reg,