output: &::U32x4,
definition: Named("llvm.ppc.altivec.vminuw")
},
+ "_vec_subsbs" => Intrinsic {
+ inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
+ output: &::I8x16,
+ definition: Named("llvm.ppc.altivec.vsubsbs")
+ },
+ "_vec_sububs" => Intrinsic {
+ inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
+ output: &::U8x16,
+ definition: Named("llvm.ppc.altivec.vsububs")
+ },
+ "_vec_subshs" => Intrinsic {
+ inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
+ output: &::I16x8,
+ definition: Named("llvm.ppc.altivec.vsubshs")
+ },
+ "_vec_subuhs" => Intrinsic {
+ inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
+ output: &::U16x8,
+ definition: Named("llvm.ppc.altivec.vsubuhs")
+ },
+ "_vec_subsws" => Intrinsic {
+ inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
+ output: &::I32x4,
+ definition: Named("llvm.ppc.altivec.vsubsws")
+ },
+ "_vec_subuws" => Intrinsic {
+ inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
+ output: &::U32x4,
+ definition: Named("llvm.ppc.altivec.vsubuws")
+ },
_ => return None,
})
}