Add most ARM intrinsics.

diff --git a/src/librustc_platform_intrinsics/arm.rs b/src/librustc_platform_intrinsics/arm.rs
index bc8740468890b376dbd0078e95aa6b62b199936e..f29f7e384b4fb22dfd7939298a06525254be5dae 100644 (file)
--- a/src/librustc_platform_intrinsics/arm.rs
+++ b/src/librustc_platform_intrinsics/arm.rs
@@ -19,8 +19,300 @@ macro_rules! p {
 pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
     if !name.starts_with("v") { return None }
     Some(match &name["v".len()..] {
+        "sqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4),
+        "sqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2),
+
+        "hadd_s8" => p!("vhadds.v8i8", (i8x8, i8x8) -> i8x8),
+        "haddq_s8" => p!("vhadds.v16i8", (i8x16, i8x16) -> i8x16),
+        "hadd_s16" => p!("vhadds.v4i16", (i16x4, i16x4) -> i16x4),
+        "haddq_s16" => p!("vhadds.v8i16", (i16x8, i16x8) -> i16x8),
+        "hadd_s32" => p!("vhadds.v2i32", (i32x2, i32x2) -> i32x2),
+        "haddq_s32" => p!("vhadds.v4i32", (i32x4, i32x4) -> i32x4),
+        "hadd_u8" => p!("vhaddu.v8i8", (i8x8, i8x8) -> i8x8),
+        "haddq_u8" => p!("vhaddu.v16i8", (i8x16, i8x16) -> i8x16),
+        "hadd_u16" => p!("vhaddu.v4i16", (i16x4, i16x4) -> i16x4),
+        "haddq_u16" => p!("vhaddu.v8i16", (i16x8, i16x8) -> i16x8),
+        "hadd_u32" => p!("vhaddu.v2i32", (i32x2, i32x2) -> i32x2),
+        "haddq_u32" => p!("vhaddu.v4i32", (i32x4, i32x4) -> i32x4),
+        "rhadd_s8" => p!("vrhadds.v8i8", (i8x8, i8x8) -> i8x8),
+        "rhaddq_s8" => p!("vrhadds.v16i8", (i8x16, i8x16) -> i8x16),
+        "rhadd_s16" => p!("vrhadds.v4i16", (i16x4, i16x4) -> i16x4),
+        "rhaddq_s16" => p!("vrhadds.v8i16", (i16x8, i16x8) -> i16x8),
+        "rhadd_s32" => p!("vrhadds.v2i32", (i32x2, i32x2) -> i32x2),
+        "rhaddq_s32" => p!("vrhadds.v4i32", (i32x4, i32x4) -> i32x4),
+        "rhadd_u8" => p!("vrhaddu.v8i8", (i8x8, i8x8) -> i8x8),
+        "rhaddq_u8" => p!("vrhaddu.v16i8", (i8x16, i8x16) -> i8x16),
+        "rhadd_u16" => p!("vrhaddu.v4i16", (i16x4, i16x4) -> i16x4),
+        "rhaddq_u16" => p!("vrhaddu.v8i16", (i16x8, i16x8) -> i16x8),
+        "rhadd_u32" => p!("vrhaddu.v2i32", (i32x2, i32x2) -> i32x2),
+        "rhaddq_u32" => p!("vrhaddu.v4i32", (i32x4, i32x4) -> i32x4),
+        "qadd_s8" => p!("vqadds.v8i8", (i8x8, i8x8) -> i8x8),
+        "qaddq_s8" => p!("vqadds.v16i8", (i8x16, i8x16) -> i8x16),
+        "qadd_s16" => p!("vqadds.v4i16", (i16x4, i16x4) -> i16x4),
+        "qaddq_s16" => p!("vqadds.v8i16", (i16x8, i16x8) -> i16x8),
+        "qadd_s32" => p!("vqadds.v2i32", (i32x2, i32x2) -> i32x2),
+        "qaddq_s32" => p!("vqadds.v4i32", (i32x4, i32x4) -> i32x4),
+        "qadd_s64" => p!("vqaddu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qaddq_s64" => p!("vqaddu.v2i64", (i64x2, i64x2) -> i64x2),
+        "qadd_u8" => p!("vqaddu.v8i8", (i8x8, i8x8) -> i8x8),
+        "qaddq_u8" => p!("vqaddu.v16i8", (i8x16, i8x16) -> i8x16),
+        "qadd_u16" => p!("vqaddu.v4i16", (i16x4, i16x4) -> i16x4),
+        "qaddq_u16" => p!("vqaddu.v8i16", (i16x8, i16x8) -> i16x8),
+        "qadd_u32" => p!("vqaddu.v2i32", (i32x2, i32x2) -> i32x2),
+        "qaddq_u32" => p!("vqaddu.v4i32", (i32x4, i32x4) -> i32x4),
+        "qadd_u64" => p!("vqaddu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qaddq_u64" => p!("vqaddu.v2i64", (i64x2, i64x2) -> i64x2),
+        "raddhn_s16" => p!("vraddhn.v8i8", (i16x8, i16x8) -> i8x8),
+        "raddhn_s32" => p!("vraddhn.v4i16", (i32x4, i32x4) -> i16x4),
+        "raddhn_s64" => p!("vraddhn.v2i32", (i64x2, i64x2) -> i32x2),
+        "fma_f32" => plain!("llvm.fma.v2f32", (f32x2, f32x2, f32x2) -> f32x2),
+        "fmaq_f32" => plain!("llvm.fma.v4f32", (f32x4, f32x4, f32x4) -> f32x4),
+        "qdmulh_s16" => p!("vqdmulh.v4i16", (i16x4, i16x4) -> i16x4),
+        "qdmulhq_s16" => p!("vqdmulh.v8i16", (i16x8, i16x8) -> i16x8),
+        "qdmulh_s32" => p!("vqdmulh.v2i32", (i32x2, i32x2) -> i32x4),
+        "qdmulhq_s32" => p!("vqdmulh.v4i32", (i32x4, i32x4) -> i32x4),
+        "qrdmulh_s16" => p!("vqrdmulh.v4i16", (i16x4, i16x4) -> i16x4),
+        "qrdmulhqr_s16" => p!("vqrdmulh.v8i16", (i16x8, i16x8) -> i16x8),
+        "qrdmulh_s32" => p!("vqrdmulh.v2i32", (i32x2, i32x2) -> i32x4),
+        "qrdmulhqr_s32" => p!("vqrdmulh.v4i32", (i32x4, i32x4) -> i32x4),
+        "mull_s8" => p!("vmulls.v8i16", (i8x8, i8x8) -> i16x8),
+        "mull_s16" => p!("vmulls.v4i32", (i16x4, i16x4) -> i32x4),
+        "mull_s32" => p!("vmulls.v2i64", (i32x2, i32x2) -> i64x2),
+        "mull_u8" => p!("vmullu.v8i16", (i8x8, i8x8) -> i16x8),
+        "mull_u16" => p!("vmullu.v4i32", (i16x4, i16x4) -> i32x4),
+        "mull_u32" => p!("vmullu.v2i64", (i32x2, i32x2) -> i64x2),
+        "qdmull_s16" => p!("vqdmull.v4i32", (i16x4, i16x4) -> i32x4),
+        "qdmull_s32" => p!("vqdmull.v2i64", (i32x2, i32x2) -> i64x2),
+        "hsub_s8" => p!("vhsubs.v8i8", (i8x8, i8x8) -> i8x8),
+        "hsubq_s8" => p!("vhsubs.v16i8", (i8x16, i8x16) -> i8x16),
+        "hsub_s16" => p!("vhsubs.v4i16", (i16x4, i16x4) -> i16x4),
+        "hsubq_s16" => p!("vhsubs.v8i16", (i16x8, i16x8) -> i16x8),
+        "hsub_s32" => p!("vhsubs.v2i32", (i32x2, i32x2) -> i32x2),
+        "hsubq_s32" => p!("vhsubs.v4i32", (i32x4, i32x4) -> i32x4),
+        "hsub_u8" => p!("vhsubu.v8i8", (i8x8, i8x8) -> i8x8),
+        "hsubq_u8" => p!("vhsubu.v16i8", (i8x16, i8x16) -> i8x16),
+        "hsub_u16" => p!("vhsubu.v4i16", (i16x4, i16x4) -> i16x4),
+        "hsubq_u16" => p!("vhsubu.v8i16", (i16x8, i16x8) -> i16x8),
+        "hsub_u32" => p!("vhsubu.v2i32", (i32x2, i32x2) -> i32x2),
+        "hsubq_u32" => p!("vhsubu.v4i32", (i32x4, i32x4) -> i32x4),
+        "qsub_s8" => p!("vqsubs.v8i8", (i8x8, i8x8) -> i8x8),
+        "qsubq_s8" => p!("vqsubs.v16i8", (i8x16, i8x16) -> i8x16),
+        "qsub_s16" => p!("vqsubs.v4i16", (i16x4, i16x4) -> i16x4),
+        "qsubq_s16" => p!("vqsubs.v8i16", (i16x8, i16x8) -> i16x8),
+        "qsub_s32" => p!("vqsubs.v2i32", (i32x2, i32x2) -> i32x2),
+        "qsubq_s32" => p!("vqsubs.v4i32", (i32x4, i32x4) -> i32x4),
+        "qsub_s64" => p!("vqsubu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qsubq_s64" => p!("vqsubu.v2i64", (i64x2, i64x2) -> i64x2),
+        "qsub_u8" => p!("vqsubu.v8i8", (i8x8, i8x8) -> i8x8),
+        "qsubq_u8" => p!("vqsubu.v16i8", (i8x16, i8x16) -> i8x16),
+        "qsub_u16" => p!("vqsubu.v4i16", (i16x4, i16x4) -> i16x4),
+        "qsubq_u16" => p!("vqsubu.v8i16", (i16x8, i16x8) -> i16x8),
+        "qsub_u32" => p!("vqsubu.v2i32", (i32x2, i32x2) -> i32x2),
+        "qsubq_u32" => p!("vqsubu.v4i32", (i32x4, i32x4) -> i32x4),
+        "qsub_u64" => p!("vqsubu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qsubq_u64" => p!("vqsubu.v2i64", (i64x2, i64x2) -> i64x2),
+        "abd_s8" => p!("vabds.v8i8", (i8x8, i8x8) -> i8x8),
+        "abdq_s8" => p!("vabds.v16i8", (i8x16, i8x16) -> i8x16),
+        "abd_s16" => p!("vabds.v4i16", (i16x4, i16x4) -> i16x4),
+        "abdq_s16" => p!("vabds.v8i16", (i16x8, i16x8) -> i16x8),
+        "abd_s32" => p!("vabds.v2i32", (i32x2, i32x2) -> i32x2),
+        "abdq_s32" => p!("vabds.v4i32", (i32x4, i32x4) -> i32x4),
+        "abd_u8" => p!("vabdu.v8i8", (i8x8, i8x8) -> i8x8),
+        "abdq_u8" => p!("vabdu.v16i8", (i8x16, i8x16) -> i8x16),
+        "abd_u16" => p!("vabdu.v4i16", (i16x4, i16x4) -> i16x4),
+        "abdq_u16" => p!("vabdu.v8i16", (i16x8, i16x8) -> i16x8),
+        "abd_u32" => p!("vabdu.v2i32", (i32x2, i32x2) -> i32x2),
+        "abdq_u32" => p!("vabdu.v4i32", (i32x4, i32x4) -> i32x4),
+        "abd_f32" => p!("vabds.v2f32", (f32x2, f32x2) -> f32x2),
+        "abdq_f32" => p!("vabds.v4f32", (f32x4, f32x4) -> f32x4),
+        "max_s8" => p!("vmaxs.v8i8", (i8x8, i8x8) -> i8x8),
+        "maxq_s8" => p!("vmaxs.v16i8", (i8x16, i8x16) -> i8x16),
+        "max_s16" => p!("vmaxs.v4i16", (i16x4, i16x4) -> i16x4),
+        "maxq_s16" => p!("vmaxs.v8i16", (i16x8, i16x8) -> i16x8),
+        "max_s32" => p!("vmaxs.v2i32", (i32x2, i32x2) -> i32x2),
+        "maxq_s32" => p!("vmaxs.v4i32", (i32x4, i32x4) -> i32x4),
+        "max_u8" => p!("vmaxu.v8i8", (i8x8, i8x8) -> i8x8),
+        "maxq_u8" => p!("vmaxu.v16i8", (i8x16, i8x16) -> i8x16),
+        "max_u16" => p!("vmaxu.v4i16", (i16x4, i16x4) -> i16x4),
+        "maxq_u16" => p!("vmaxu.v8i16", (i16x8, i16x8) -> i16x8),
+        "max_u32" => p!("vmaxu.v2i32", (i32x2, i32x2) -> i32x2),
+        "maxq_u32" => p!("vmaxu.v4i32", (i32x4, i32x4) -> i32x4),
+        "max_f32" => p!("vmaxs.v2f32", (f32x2, f32x2) -> f32x2),
         "maxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4),
+        "min_s8" => p!("vmins.v8i8", (i8x8, i8x8) -> i8x8),
+        "minq_s8" => p!("vmins.v16i8", (i8x16, i8x16) -> i8x16),
+        "min_s16" => p!("vmins.v4i16", (i16x4, i16x4) -> i16x4),
+        "minq_s16" => p!("vmins.v8i16", (i16x8, i16x8) -> i16x8),
+        "min_s32" => p!("vmins.v2i32", (i32x2, i32x2) -> i32x2),
+        "minq_s32" => p!("vmins.v4i32", (i32x4, i32x4) -> i32x4),
+        "min_u8" => p!("vminu.v8i8", (i8x8, i8x8) -> i8x8),
+        "minq_u8" => p!("vminu.v16i8", (i8x16, i8x16) -> i8x16),
+        "min_u16" => p!("vminu.v4i16", (i16x4, i16x4) -> i16x4),
+        "minq_u16" => p!("vminu.v8i16", (i16x8, i16x8) -> i16x8),
+        "min_u32" => p!("vminu.v2i32", (i32x2, i32x2) -> i32x2),
+        "minq_u32" => p!("vminu.v4i32", (i32x4, i32x4) -> i32x4),
+        "min_f32" => p!("vmins.v2f32", (f32x2, f32x2) -> f32x2),
         "minq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4),
+        "shl_s8" => p!("vshifts.v8i8", (i8x8, i8x8) -> i8x8),
+        "shlq_s8" => p!("vshifts.v16i8", (i8x16, i8x16) -> i8x16),
+        "shl_s16" => p!("vshifts.v4i16", (i16x4, i16x4) -> i16x4),
+        "shlq_s16" => p!("vshifts.v8i16", (i16x8, i16x8) -> i16x8),
+        "shl_s32" => p!("vshifts.v2i32", (i32x2, i32x2) -> i32x2),
+        "shlq_s32" => p!("vshifts.v4i32", (i32x4, i32x4) -> i32x4),
+        "shl_s64" => p!("vshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "shlq_s64" => p!("vshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "shl_u8" => p!("vshiftu.v8i8", (i8x8, i8x8) -> i8x8),
+        "shlq_u8" => p!("vshiftu.v16i8", (i8x16, i8x16) -> i8x16),
+        "shl_u16" => p!("vshiftu.v4i16", (i16x4, i16x4) -> i16x4),
+        "shlq_u16" => p!("vshiftu.v8i16", (i16x8, i16x8) -> i16x8),
+        "shl_u32" => p!("vshiftu.v2i32", (i32x2, i32x2) -> i32x2),
+        "shlq_u32" => p!("vshiftu.v4i32", (i32x4, i32x4) -> i32x4),
+        "shl_u64" => p!("vshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "shlq_u64" => p!("vshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "qshl_s8" => p!("vqshifts.v8i8", (i8x8, i8x8) -> i8x8),
+        "qshlq_s8" => p!("vqshifts.v16i8", (i8x16, i8x16) -> i8x16),
+        "qshl_s16" => p!("vqshifts.v4i16", (i16x4, i16x4) -> i16x4),
+        "qshlq_s16" => p!("vqshifts.v8i16", (i16x8, i16x8) -> i16x8),
+        "qshl_s32" => p!("vqshifts.v2i32", (i32x2, i32x2) -> i32x2),
+        "qshlq_s32" => p!("vqshifts.v4i32", (i32x4, i32x4) -> i32x4),
+        "qshl_s64" => p!("vqshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qshlq_s64" => p!("vqshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "qshl_u8" => p!("vqshiftu.v8i8", (i8x8, i8x8) -> i8x8),
+        "qshlq_u8" => p!("vqshiftu.v16i8", (i8x16, i8x16) -> i8x16),
+        "qshl_u16" => p!("vqshiftu.v4i16", (i16x4, i16x4) -> i16x4),
+        "qshlq_u16" => p!("vqshiftu.v8i16", (i16x8, i16x8) -> i16x8),
+        "qshl_u32" => p!("vqshiftu.v2i32", (i32x2, i32x2) -> i32x2),
+        "qshlq_u32" => p!("vqshiftu.v4i32", (i32x4, i32x4) -> i32x4),
+        "qshl_u64" => p!("vqshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qshlq_u64" => p!("vqshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "rshl_s8" => p!("vrshifts.v8i8", (i8x8, i8x8) -> i8x8),
+        "rshlr_s8" => p!("vrshifts.v16i8", (i8x16, i8x16) -> i8x16),
+        "rshl_s16" => p!("vrshifts.v4i16", (i16x4, i16x4) -> i16x4),
+        "rshlr_s16" => p!("vrshifts.v8i16", (i16x8, i16x8) -> i16x8),
+        "rshl_s32" => p!("vrshifts.v2i32", (i32x2, i32x2) -> i32x2),
+        "rshlr_s32" => p!("vrshifts.v4i32", (i32x4, i32x4) -> i32x4),
+        "rshl_s64" => p!("vrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "rshlr_s64" => p!("vrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "rshl_u8" => p!("vrshiftu.v8i8", (i8x8, i8x8) -> i8x8),
+        "rshlr_u8" => p!("vrshiftu.v16i8", (i8x16, i8x16) -> i8x16),
+        "rshl_u16" => p!("vrshiftu.v4i16", (i16x4, i16x4) -> i16x4),
+        "rshlr_u16" => p!("vrshiftu.v8i16", (i16x8, i16x8) -> i16x8),
+        "rshl_u32" => p!("vrshiftu.v2i32", (i32x2, i32x2) -> i32x2),
+        "rshlr_u32" => p!("vrshiftu.v4i32", (i32x4, i32x4) -> i32x4),
+        "rshl_u64" => p!("vrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "rshlr_u64" => p!("vrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "qrshl_s8" => p!("vqrshifts.v8i8", (i8x8, i8x8) -> i8x8),
+        "qrshlqr_s8" => p!("vqrshifts.v16i8", (i8x16, i8x16) -> i8x16),
+        "qrshl_s16" => p!("vqrshifts.v4i16", (i16x4, i16x4) -> i16x4),
+        "qrshlqr_s16" => p!("vqrshifts.v8i16", (i16x8, i16x8) -> i16x8),
+        "qrshl_s32" => p!("vqrshifts.v2i32", (i32x2, i32x2) -> i32x2),
+        "qrshlqr_s32" => p!("vqrshifts.v4i32", (i32x4, i32x4) -> i32x4),
+        "qrshl_s64" => p!("vqrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qrshlqr_s64" => p!("vqrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "qrshl_u8" => p!("vqrshiftu.v8i8", (i8x8, i8x8) -> i8x8),
+        "qrshlqr_u8" => p!("vqrshiftu.v16i8", (i8x16, i8x16) -> i8x16),
+        "qrshl_u16" => p!("vqrshiftu.v4i16", (i16x4, i16x4) -> i16x4),
+        "qrshlqr_u16" => p!("vqrshiftu.v8i16", (i16x8, i16x8) -> i16x8),
+        "qrshl_u32" => p!("vqrshiftu.v2i32", (i32x2, i32x2) -> i32x2),
+        "qrshlqr_u32" => p!("vqrshiftu.v4i32", (i32x4, i32x4) -> i32x4),
+        "qrshl_u64" => p!("vqrshiftu.v1i64", (i64x1, i64x1) -> i64x1),
+        "qrshlqr_u64" => p!("vqrshiftu.v2i64", (i64x2, i64x2) -> i64x2),
+        "qmovn_s16" => p!("vqmovns.v8i8", (i16x8) -> i8x8),
+        "qmovn_s32" => p!("vqmovns.v4i16", (i32x4) -> i16x4),
+        "qmovn_s64" => p!("vqmovns.v2i32", (i64x2) -> i32x2),
+        "qmovn_u16" => p!("vqmovnu.v8i8", (i16x8) -> i8x8),
+        "qmovn_u32" => p!("vqmovnu.v4i16", (i32x4) -> i16x4),
+        "qmovn_u64" => p!("vqmovnu.v2i32", (i64x2) -> i32x2),
+        "qmovun_s16" => p!("vqmovnsu.v8i8", (i16x8) -> i8x8),
+        "qmovun_s32" => p!("vqmovnsu.v4i16", (i32x4) -> i16x4),
+        "qmovun_s64" => p!("vqmovnsu.v2i32", (i64x2) -> i32x2),
+        "abs_s8" => p!("vabs.v8i8", (i8x8, i8x8) -> i8x8),
+        "absq_s8" => p!("vabs.v16i8", (i8x16, i8x16) -> i8x16),
+        "abs_s16" => p!("vabs.v4i16", (i16x4, i16x4) -> i16x4),
+        "absq_s16" => p!("vabs.v8i16", (i16x8, i16x8) -> i16x8),
+        "abs_s32" => p!("vabs.v2i32", (i32x2, i32x2) -> i32x2),
+        "absq_s32" => p!("vabs.v4i32", (i32x4, i32x4) -> i32x4),
+        "abs_f32" => p!("vabs.v2f32", (f32x2, f32x2) -> f32x2),
+        "absq_f32" => p!("vabs.v4f32", (f32x4, f32x4) -> f32x4),
+        "qabs_s8" => p!("vqabs.v8i8", (i8x8, i8x8) -> i8x8),
+        "qabsq_s8" => p!("vqabs.v16i8", (i8x16, i8x16) -> i8x16),
+        "qabs_s16" => p!("vqabs.v4i16", (i16x4, i16x4) -> i16x4),
+        "qabsq_s16" => p!("vqabs.v8i16", (i16x8, i16x8) -> i16x8),
+        "qabs_s32" => p!("vqabs.v2i32", (i32x2, i32x2) -> i32x2),
+        "qabsq_s32" => p!("vqabs.v4i32", (i32x4, i32x4) -> i32x4),
+        "neg_s8" => p!("vneg.v8i8", (i8x8) -> i8x8),
+        "negq_s8" => p!("vneg.v16i8", (i8x16) -> i8x16),
+        "neg_s16" => p!("vneg.v4i16", (i16x4) -> i16x4),
+        "negq_s16" => p!("vneg.v8i16", (i16x8) -> i16x8),
+        "neg_s32" => p!("vneg.v2i32", (i32x2) -> i32x2),
+        "negq_s32" => p!("vneg.v4i32", (i32x4) -> i32x4),
+        "neg_f32" => p!("vneg.v2f32", (f32x2) -> f32x2),
+        "negq_f32" => p!("vneg.v4f32", (f32x4) -> f32x4),
+        "qneg_s8" => p!("vqneg.v8i8", (i8x8) -> i8x8),
+        "qnegq_s8" => p!("vqneg.v16i8", (i8x16) -> i8x16),
+        "qneg_s16" => p!("vqneg.v4i16", (i16x4) -> i16x4),
+        "qnegq_s16" => p!("vqneg.v8i16", (i16x8) -> i16x8),
+        "qneg_s32" => p!("vqneg.v2i32", (i32x2) -> i32x2),
+        "qnegq_s32" => p!("vqneg.v4i32", (i32x4) -> i32x4),
+        "cls_s8" => p!("vcls.v8i8", (i8x8) -> i8x8),
+        "clsq_s8" => p!("vcls.v16i8", (i8x16) -> i8x16),
+        "cls_s16" => p!("vcls.v4i16", (i16x4) -> i16x4),
+        "clsq_s16" => p!("vcls.v8i16", (i16x8) -> i16x8),
+        "cls_s32" => p!("vcls.v2i32", (i32x2) -> i32x2),
+        "clsq_s32" => p!("vcls.v4i32", (i32x4) -> i32x4),
+        "clz_s8" => p!("vclz.v8i8", (i8x8) -> i8x8),
+        "clzq_s8" => p!("vclz.v16i8", (i8x16) -> i8x16),
+        "clz_s16" => p!("vclz.v4i16", (i16x4) -> i16x4),
+        "clzq_s16" => p!("vclz.v8i16", (i16x8) -> i16x8),
+        "clz_s32" => p!("vclz.v2i32", (i32x2) -> i32x2),
+        "clzq_s32" => p!("vclz.v4i32", (i32x4) -> i32x4),
+        "cnt_s8" => p!("vcnt.v8i8", (i8x8) -> i8x8),
+        "cntq_s8" => p!("vcnt.v16i8", (i8x16) -> i8x16),
+        "recpe_u32" => p!("vrecpe.v2i32", (i32x2) -> i32x2),
+        "recpeq_u32" => p!("vrecpe.v4i32", (i32x4) -> i32x4),
+        "recpe_f32" => p!("vrecpe.v2f32", (f32x2) -> f32x2),
+        "recpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4),
+        "recps_f32" => p!("vrecps.v2f32", (f32x2, f32x2) -> f32x2),
+        "recpsq_f32" => p!("vrecps.v4f32", (f32x4, f32x4) -> f32x4),
+        "rsqrte_u32" => p!("vrsqrte.v2i32", (i32x2) -> i32x2),
+        "rsqrteq_u32" => p!("vrsqrte.v4i32", (i32x4) -> i32x4),
+        "rsqrte_f32" => p!("vrsqrte.v2f32", (f32x2) -> f32x2),
+        "rsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4),
+        "rsqrts_f32" => p!("vrsqrts.v2f32", (f32x2, f32x2) -> f32x2),
+        "rsqrtsq_f32" => p!("vrsqrts.v4f32", (f32x4, f32x4) -> f32x4),
+        "bsl_s8" => p!("vsl.v8i8", (i8x8, i8x8, i8x8) -> i8x8),
+        "bslq_s8" => p!("vsl.v16i8", (i8x16, i8x16, i8x16) -> i8x16),
+        "padd_s8" => p!("vpadd.v8i8", (i8x8, i8x8) -> i8x8),
+        "padd_s16" => p!("vpadd.v4i16", (i16x4, i16x4) -> i16x4),
+        "padd_s32" => p!("vpadd.v2i32", (i32x2, i32x2) -> i32x2),
+        "padd_u8" => p!("vpadd.v8i8", (i8x8, i8x8) -> i8x8),
+        "padd_u16" => p!("vpadd.v4i16", (i16x4, i16x4) -> i16x4),
+        "padd_u32" => p!("vpadd.v2i32", (i32x2, i32x2) -> i32x2),
+        "padd_f32" => p!("vpadd.v2f32", (f32x2, f32x2) -> f32x2),
+        "paddl_s8" => p!("vpaddls.v4i16.v8i8", (i8x8) -> i16x4),
+        "paddlq_s8" => p!("vpaddls.v8i16.v16i8", (i8x16) -> i16x8),
+        "paddl_s16" => p!("vpaddls.v2i32.v4i16", (i16x4) -> i32x2),
+        "paddlq_s16" => p!("vpaddls.v4i32.v8i16", (i16x8) -> i32x4),
+        "paddl_s32" => p!("vpaddls.v1i64.v2i32", (i32x2) -> i64x1),
+        "paddlq_s32" => p!("vpaddls.v2i64.v4i32", (i32x4) -> i64x2),
+        "paddl_u8" => p!("vpaddlu.v4i16.v8i8", (i8x8) -> i16x4),
+        "paddlq_u8" => p!("vpaddlu.v8i16.v16i8", (i8x16) -> i16x8),
+        "paddl_u16" => p!("vpaddlu.v2i32.v4i16", (i16x4) -> i32x2),
+        "paddlq_u16" => p!("vpaddlu.v4i32.v8i16", (i16x8) -> i32x4),
+        "paddl_u32" => p!("vpaddlu.v1i64.v2i32", (i32x2) -> i64x1),
+        "paddlq_u32" => p!("vpaddlu.v2i64.v4i32", (i32x4) -> i64x2),
+        "padal_s8" => p!("vpadals.v4i16.v8i8", (i16x4, i8x8) -> i16x4),
+        "padalq_s8" => p!("vpadals.v8i16.v16i8", (i16x8, i8x16) -> i16x8),
+        "padal_s16" => p!("vpadals.v2i32.v4i16", (i32x2, i16x4) -> i32x2),
+        "padalq_s16" => p!("vpadals.v4i32.v8i16", (i32x4, i16x8) -> i32x4),
+        "padal_s32" => p!("vpadals.v1i64.v2i32", (i64x1, i32x2) -> i64x1),
+        "padalq_s32" => p!("vpadals.v2i64.v4i32", (i64x2, i32x4) -> i64x2),
+        "padal_u8" => p!("vpadalu.v4i16.v8i8", (i16x4, i8x8) -> i16x4),
+        "padalq_u8" => p!("vpadalu.v8i16.v16i8", (i16x8, i8x16) -> i16x8),
+        "padal_u16" => p!("vpadalu.v2i32.v4i16", (i32x2, i16x4) -> i32x2),
+        "padalq_u16" => p!("vpadalu.v4i32.v8i16", (i32x4, i16x8) -> i32x4),
+        "padal_u32" => p!("vpadalu.v1i64.v2i32", (i64x1, i32x2) -> i64x1),
+        "padalq_u32" => p!("vpadalu.v2i64.v4i32", (i64x2, i32x4) -> i64x2),
         "pmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4),
         "pmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2),
         "pmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8),
@@ -33,11 +325,23 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
         "pmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4),
         "pmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2),
         "pmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8),
-        "recpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4),
-        "rsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4),
-        "rsqrteq_f64" => p!("vrsqrte.v2f64", (f64x2) -> f64x2),
-        "sqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4),
-        "sqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2),
+        "tbl1_s8" => p!("vtbl1", (i8x8, i8x8) -> i8x8),
+        "tbl1_u8" => p!("vtbl1", (i8x8, i8x8) -> i8x8),
+        // these aren't exactly the C intrinsics (they take one argument)
+        "tbl2_s8" => p!("vtbl2", (i8x8, i8x8, i8x8) -> i8x8),
+        "tbl2_u8" => p!("vtbl2", (i8x8, i8x8, i8x8) -> i8x8),
+        "tbl3_s8" => p!("vtbl3", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbl3_u8" => p!("vtbl3", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbl4_s8" => p!("vtbl4", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbl4_u8" => p!("vtbl4", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbx1_s8" => p!("vtbx1", (i8x8, i8x8, i8x8) -> i8x8),
+        "tbx1_u8" => p!("vtbx1", (i8x8, i8x8, i8x8) -> i8x8),
+        "tbx2_s8" => p!("vtbx2", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbx2_u8" => p!("vtbx2", (i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbx3_s8" => p!("vtbx3", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbx3_u8" => p!("vtbx3", (i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbx4_s8" => p!("vtbx4", (i8x8, i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
+        "tbx4_u8" => p!("vtbx4", (i8x8, i8x8, i8x8, i8x8, i8x8, i8x8) -> i8x8),
         _ => return None,
     })
 }

diff --git a/src/librustc_platform_intrinsics/lib.rs b/src/librustc_platform_intrinsics/lib.rs
index a7dfc188417d1ce701855df1979884008f7701ee..134b4c66419b6c4408d9aa9006b269b68364bb40 100755 (executable)
--- a/src/librustc_platform_intrinsics/lib.rs
+++ b/src/librustc_platform_intrinsics/lib.rs
@@ -65,6 +65,7 @@ macro_rules! ty {
     (i8x8) => (v(i(8), 8));
     (i16x4) => (v(i(16), 4));
     (i32x2) => (v(i(32), 2));
+    (i64x1)=> (v(i(64), 1));
 
     (i64) => (i(64));
     (i32) => (i(32));