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(merge: 32a6a95 fbb56bc)
Rollup merge of #56826 - alexcrichton:atomic-u128, r=gnzlbg
authorMazdak Farrokhzad <twingoow@gmail.com>
Sun, 16 Dec 2018 13:08:32 +0000 (14:08 +0100)
committerGitHub <noreply@github.com>
Sun, 16 Dec 2018 13:08:32 +0000 (14:08 +0100)
commit95d52a872497180787810dc31c580531cc4062f6
tree17e7b4217f52938d02e6f2406407f83b3608601btree | snapshot
parent32a6a95f4103d2ea5a0f9f8f51a762355c2b4d26commit | diff
parentfbb56bcf44d28e65a9495decf091b6d0386e540ccommit | diff
Rollup merge of #56826 - alexcrichton:atomic-u128, r=gnzlbg

rustc: Add the `cmpxchg16b` target feature on x86/x86_64

This appears to be called `cx16` in LLVM and a few other locations, but
the Intel Intrinsic Guide doesn't have a name for this and the CPU
manual from Intel only mentions `cmpxchg16b`, so that's the name chosen
here.
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