X-Git-Url: https://git.lizzy.rs/?a=blobdiff_plain;f=sys%2Fsrc%2F9%2Fpc%2Fetheriwl.c;h=20211df0608cd4b8d22f562b896cbbb66a88ef43;hb=8243b6600f4c8d60e520aa1b20368ae9575aabf9;hp=22e92884bbda48457c733c1a8d220d2e8f11e325;hpb=3bebd3f5e278d77b1eb526cd9f924b0777043d2b;p=plan9front.git

diff --git a/sys/src/9/pc/etheriwl.c b/sys/src/9/pc/etheriwl.c
index 22e92884b..20211df06 100644
--- a/sys/src/9/pc/etheriwl.c
+++ b/sys/src/9/pc/etheriwl.c
@@ -321,11 +321,11 @@ struct Ctlr {
 	QLock;
 
 	Ctlr *link;
+	uvlong port;
 	Pcidev *pdev;
 	Wifi *wifi;
 
 	int type;
-	int port;
 	int power;
 	int active;
 	int broken;
@@ -2457,6 +2457,8 @@ iwlpci(void)
 			continue;
 		if(pdev->vid != 0x8086)
 			continue;
+		if(pdev->mem[0].bar & 1)
+			continue;
 
 		switch(pdev->did){
 		default:
@@ -2493,10 +2495,10 @@ iwlpci(void)
 			print("iwl: unable to alloc Ctlr\n");
 			continue;
 		}
-		ctlr->port = pdev->mem[0].bar & ~0x0F;
-		mem = vmap(pdev->mem[0].bar & ~0x0F, pdev->mem[0].size);
+		ctlr->port = pdev->mem[0].bar & ~0xF;
+		mem = vmap(ctlr->port, pdev->mem[0].size);
 		if(mem == nil) {
-			print("iwl: can't map %8.8luX\n", pdev->mem[0].bar);
+			print("iwl: can't map %llux\n", ctlr->port);
 			free(ctlr);
 			continue;
 		}