]> git.lizzy.rs Git - plan9front.git/blobdiff - sys/src/9/pc/usbohci.c
kernel: cleanup makefile for $CONF.$O target
[plan9front.git] / sys / src / 9 / pc / usbohci.c
index ef9b07df93e569dd1beae6deef9a9ee0843df748..d24f2388e463ca2ffa944d066054035bc7f746be 100644 (file)
@@ -350,6 +350,7 @@ struct Ctlr
        Qtree*  tree;           /* tree for t Ep i/o */
        int     ntree;          /* number of dummy Eds in tree */
        Pcidev* pcidev;
+       uintptr base;
 };
 
 #define dqprint                if(debug || io && io->debug)print
@@ -2378,7 +2379,7 @@ init(Hci *hp)
 static void
 scanpci(void)
 {
-       ulong mem;
+       uintptr io;
        Ctlr *ctlr;
        Pcidev *p;
        int i;
@@ -2392,27 +2393,26 @@ scanpci(void)
                /*
                 * Find Ohci controllers (Programming Interface = 0x10).
                 */
-               if(p->ccrb != Pcibcserial || p->ccru != Pciscusb ||
-                   p->ccrp != 0x10)
+               if(p->ccrb != Pcibcserial || p->ccru != Pciscusb || p->ccrp != 0x10)
                        continue;
-               mem = p->mem[0].bar & ~0x0F;
-               dprint("ohci: %x/%x port 0x%lux size 0x%x irq %d\n",
-                       p->vid, p->did, mem, p->mem[0].size, p->intl);
-               if(mem == 0){
-                       print("ohci: failed to map registers\n");
+               io = p->mem[0].bar & ~0x0F;
+               if(io == 0)
                        continue;
-               }
-
+               print("usbohci: %#x %#x: port %#p size %#x irq %d\n",
+                       p->vid, p->did, io, p->mem[0].size, p->intl);
                ctlr = malloc(sizeof(Ctlr));
                if(ctlr == nil){
                        print("ohci: no memory\n");
                        continue;
                }
+               if((ctlr->ohci = vmap(io, p->mem[0].size)) == nil){
+                       print("ohci: can't map ohci\n");
+                       free(ctlr);
+                       continue;
+               }
                ctlr->pcidev = p;
-               ctlr->ohci = vmap(mem, p->mem[0].size);
+               ctlr->base = io;
                dprint("scanpci: ctlr %#p, ohci %#p\n", ctlr, ctlr->ohci);
-               pcisetbme(p);
-               pcisetpms(p, 0);
                for(i = 0; i < Nhcis; i++)
                        if(ctlrs[i] == nil){
                                ctlrs[i] = ctlr;
@@ -2571,7 +2571,7 @@ reset(Hci *hp)
        for(i = 0; i < Nhcis && ctlrs[i] != nil; i++){
                ctlr = ctlrs[i];
                if(ctlr->active == 0)
-               if(hp->port == 0 || hp->port == PADDR(ctlr->ohci)){
+               if(hp->port == 0 || hp->port == ctlr->base){
                        ctlr->active = 1;
                        break;
                }
@@ -2579,13 +2579,17 @@ reset(Hci *hp)
        iunlock(&resetlck);
        if(ctlrs[i] == nil || i == Nhcis)
                return -1;
-       if(ctlr->ohci->control == ~0)
-               return -1;
-
 
        p = ctlr->pcidev;
+       pcienable(p);
+
+       if(ctlr->ohci->control == ~0){
+               pcidisable(p);
+               return -1;
+       }
+
        hp->aux = ctlr;
-       hp->port = PADDR(ctlr->ohci);
+       hp->port = ctlr->base;
        hp->irq = p->intl;
        hp->tbdf = p->tbdf;
        ctlr->nports = hp->nports = ctlr->ohci->rhdesca & 0xff;
@@ -2593,6 +2597,8 @@ reset(Hci *hp)
        ohcireset(ctlr);
        ohcimeminit(ctlr);
 
+       pcisetbme(p);
+
        /*
         * Linkage to the generic HCI driver.
         */
@@ -2610,14 +2616,6 @@ reset(Hci *hp)
        hp->shutdown = shutdown;
        hp->debug = usbdebug;
        hp->type = "ohci";
-
-       /*
-        * IRQ2 doesn't really exist, it's used to gang the interrupt
-        * controllers together. A device set to IRQ2 will appear on
-        * the second interrupt controller as IRQ9.
-        */
-       if(hp->irq == 2)
-               hp->irq = 9;
        intrenable(hp->irq, hp->interrupt, hp, hp->tbdf, hp->type);
 
        return 0;