kernel: expose no execute bit to portable mmu code as SG_NOEXEC / PTENOEXEC, add...

[plan9front.git] / sys / src / 9 / pc / mem.h

diff --git a/sys/src/9/pc/mem.h b/sys/src/9/pc/mem.h
index 3a688a675383937c2e3d717febc678bb15db810b..417430a90c9ed7840061c0abca6943f9ead821c3 100644 (file)
--- a/sys/src/9/pc/mem.h
+++ b/sys/src/9/pc/mem.h
@@ -19,6 +19,7 @@
 #define        ROUND(s, sz)    (((s)+((sz)-1))&~((sz)-1))
 #define        PGROUND(s)      ROUND(s, BY2PG)
 #define        BLOCKALIGN      8
+#define        FPalign         16
 
 /*
  * In 32-bit mode, the MAXMACH limit is 32 without
@@ -51,32 +52,40 @@
 #define        UTZERO          (UZERO+BY2PG)           /* first address in user text */
 #define        USTKTOP         (VMAP-BY2PG)            /* byte just beyond user stack */
 #define        USTKSIZE        (16*1024*1024)          /* size of user stack */
-#define        TSTKTOP         (USTKTOP-USTKSIZE)      /* end of new stack in sysexec */
-#define        TSTKSIZ         100                     /* pages in new stack; limits exec args */
 
 /*
  * Fundamental addresses - bottom 64kB saved for return to real mode
  */
 #define        CONFADDR        (KZERO+0x1200)          /* info passed from boot loader */
-#define        TMPADDR         (KZERO+0x2000)          /* used for temporary mappings */
-#define        APBOOTSTRAP     (KZERO+0x3000)          /* AP bootstrap code */
-#define        RMBUF           (KZERO+0x9000)          /* buffer for user space - known to vga */
+#define        APBOOTSTRAP     (KZERO+0x7000)          /* AP bootstrap code (overlaps CONFADDR) */
+#define        TMPADDR         (KZERO+0x8000)          /* used for temporary mappings */
 #define        IDTADDR         (KZERO+0x10800)         /* idt */
 #define        REBOOTADDR      (0x11000)               /* reboot code - physical address */
 #define        CPU0PDB         (KZERO+0x12000)         /* bootstrap processor PDB */
 #define        CPU0PTE         (KZERO+0x13000)         /* bootstrap processor PTE's for 0-4MB */
-#define        CPU0GDT         (KZERO+0x14000)         /* bootstrap processor GDT */
-#define        MACHADDR        (KZERO+0x15000)         /* as seen by current processor */
-#define        CPU0MACH        (KZERO+0x16000)         /* Mach for bootstrap processor */
+#define        CPU0PTE1        (KZERO+0x14000)         /* bootstrap processor PTE's for 4-8MB */
+#define        CPU0PTE2        (KZERO+0x15000)         /* bootstrap processor PTE's for 8-12MB */
+#define        CPU0PTE3        (KZERO+0x16000)         /* bootstrap processor PTE's for 12-16MB */
+#define        CPU0GDT         (KZERO+0x17000)         /* bootstrap processor GDT */
+#define        MACHADDR        (KZERO+0x18000)         /* as seen by current processor */
+#define        CPU0MACH        (KZERO+0x19000)         /* Mach for bootstrap processor */
 #define        MACHSIZE        BY2PG
-#define CPU0PTE1       (KZERO+0x17000)         /* bootstrap processor PTE's for 4MB-8MB */
-#define CPU0END                (CPU0PTE1+BY2PG)
+#define        CPU0END         (CPU0MACH+BY2PG)
 /*
  * N.B.  ramscan knows that CPU0END is the end of reserved data
  * N.B.  _startPADDR knows that CPU0PDB is the first reserved page
  * and that there are 6 of them.
  */
 
+/*
+ * Where configuration info is left for the loaded programme.
+ * There are 24064 bytes available at CONFADDR.
+ */
+#define BOOTLINE       ((char*)CONFADDR)
+#define BOOTLINELEN    64
+#define BOOTARGS       ((char*)(CONFADDR+BOOTLINELEN))
+#define BOOTARGSLEN    (0x6000-0x200-BOOTLINELEN)
+
 /*
  *  known x86 segments (in GDT) and their selectors
  */
@@ -147,6 +156,7 @@
 #define        PTEVALID        (1<<0)
 #define        PTEWT           (1<<3)
 #define        PTEUNCACHED     (1<<4)
+#define        PTECACHED       (0<<4)
 #define        PTEWRITE        (1<<1)
 #define        PTERONLY        (0<<1)
 #define        PTEKERNEL       (0<<2)