]> git.lizzy.rs Git - plan9front.git/blobdiff - sys/src/9/pc/ether82563.c
devdraw: get rid of softscreen==0xa110c hack and make attachscreen() return Memdata*
[plan9front.git] / sys / src / 9 / pc / ether82563.c
index 1fa71c6f600f06cb0f10cafd23d1d7d8b8951895..62d2217366daeeaf499473933e94d51e3ca27d71 100644 (file)
@@ -463,6 +463,7 @@ enum {
        F79phy  = 1<<5,
        Fnofct  = 1<<6,
        Fbadcsum= 1<<7,
+       Fnofca  = 1<<8,
 };
 
 typedef struct Ctlrtype Ctlrtype;
@@ -479,7 +480,7 @@ static Ctlrtype cttab[Nctlrtype] = {
 [i82567m]      "i82567m",      1514,   Fload,
 [i82571]       "i82571",       9234,   Fpba,
 [i82572]       "i82572",       9234,   Fpba,
-[i82573]       "i82573",       8192,   Fert          /* terrible perf above 8k */
+[i82573]       "i82573",       8192,   Fert|Fbadcsum,          /* terrible perf above 8k */
 [i82574]       "i82574",       9018,   0,
 [i82575]       "i82575",       9728,   F75|Fflashea,
 [i82576]       "i82576",       9728,   F75,
@@ -491,9 +492,9 @@ static Ctlrtype cttab[Nctlrtype] = {
 [i82580]       "i82580",       9728,   F75|F79phy,
 [i82583]       "i82583",       1514,   0,
 [i210]         "i210",         9728,   F75|Fnofct|Fert,
-[i217]         "i217",         9728,   Fload|Fnofct|Fert|Fbadcsum,
-[i218]         "i218",         9728,   Fload|Fert|F79phy|Fnofct|Fbadcsum,
-[i219]         "i219",         9728,   Fload|Fert|F79phy|Fnofct|Fbadcsum,
+[i217]         "i217",         2048,   Fload|Fert|F79phy|Fnofct|Fnofca|Fbadcsum,/* 9018, but unstable above 2k */
+[i218]         "i218",         9018,   Fload|Fert|F79phy|Fnofct|Fnofca|Fbadcsum,
+[i219]         "i219",         9018,   Fload|Fert|F79phy|Fnofct|Fnofca|Fbadcsum,
 [i350]         "i350",         9728,   F75|F79phy|Fnofct,
 };
 
@@ -512,7 +513,7 @@ struct Ctlr {
        void    *alloc;                 /* receive/transmit descriptors */
        int     nrd;
        int     ntd;
-       uint    rbsz;
+       int     rbsz;
 
        u32int  *nic;
        Lock    imlock;
@@ -942,8 +943,6 @@ i82563rxinit(Ctlr *ctlr)
                csr32w(ctlr, Rctl, Dpf|Bsize2048|Bam|RdtmsHALF);
        else{
                i = ctlr->rbsz / 1024;
-               if(ctlr->rbsz % 1024)
-                       i++;
                if(cttab[ctlr->type].flag & F75){
                        csr32w(ctlr, Rctl, Lpe|Dpf|Bsize2048|Bam|RdtmsHALF|Secrc);
                        if(ctlr->type != i82575)
@@ -1098,7 +1097,7 @@ phyread(Ctlr *c, int phyno, int reg)
                microdelay(1);
        }
        if((phy & (MDIe|MDIready)) != MDIready){
-               print("%s: phy %d wedged %.8ux\n", cttab[c->type].name, phyno, phy);
+               print("%s: phy %d wedged %.8ux\n", cname(c), phyno, phy);
                return ~0;
        }
        return phy & 0xffff;
@@ -1194,7 +1193,7 @@ lsleep(Ctlr *c, uint m)
 static void
 phyl79proc(void *v)
 {
-       uint a, i, r, phy, phyno;
+       uint i, r, phy, phyno;
        Ctlr *c;
        Ether *e;
 
@@ -1207,19 +1206,21 @@ phyl79proc(void *v)
                lsleep(c, Lsc);
 
        for(;;){
-               phy = phyread(c, phyno, Phystat);
-               if(phy == ~0){
-                       phy = 0;
-                       i = 3;
-                       goto next;
+               phy = 0;
+               for(i=0; i<4; i++){
+                       tsleep(&up->sleep, return0, 0, 150);
+                       phy = phyread(c, phyno, Phystat);
+                       if(phy == ~0)
+                               continue;
+                       if(phy & Ans){
+                               r = phyread(c, phyno, Phyctl);
+                               if(r == ~0)
+                                       continue;
+                               phywrite(c, phyno, Phyctl, r | Ran | Ean);
+                       }
+                       break;
                }
                i = (phy>>8) & 3;
-               a = phy & Ans;
-               if(a){
-                       r = phyread(c, phyno, Phyctl);
-                       phywrite(c, phyno, Phyctl, r | Ran | Ean);
-               }
-next:
                e->link = i != 3 && (phy & Link) != 0;
                if(e->link == 0)
                        i = 3;
@@ -1787,8 +1788,10 @@ i82563reset(Ctlr *ctlr)
        memset(ctlr->mta, 0, sizeof(ctlr->mta));
        for(i = 0; i < 128; i++)
                csr32w(ctlr, Mta + i*4, 0);
-       csr32w(ctlr, Fcal, 0x00C28001);
-       csr32w(ctlr, Fcah, 0x0100);
+       if((flag & Fnofca) == 0){
+               csr32w(ctlr, Fcal, 0x00C28001);
+               csr32w(ctlr, Fcah, 0x0100);
+       }
        if((flag & Fnofct) == 0)
                csr32w(ctlr, Fct, 0x8808);
        csr32w(ctlr, Fcttv, 0x0100);
@@ -2032,7 +2035,7 @@ i82563pci(void)
                }
                ctlr->type = type;
                ctlr->pcidev = p;
-               ctlr->rbsz = cttab[type].mtu;
+               ctlr->rbsz = ROUND(cttab[type].mtu, 1024);
                ctlr->port = p->mem[0].bar & ~0x0F;
                if(i82563ctlrhead != nil)
                        i82563ctlrtail->next = ctlr;
@@ -2053,11 +2056,13 @@ setup(Ctlr *ctlr)
                print("%s: can't map 0x%lux\n", cname(ctlr), ctlr->port);
                return -1;
        }
+       pcienable(p);
        if(i82563reset(ctlr)){
+               pcidisable(p);
                vunmap(ctlr->nic, p->mem[0].size);
                return -1;
        }
-       pcisetbme(ctlr->pcidev);
+       pcisetbme(p);
        return 0;
 }
 
@@ -2096,7 +2101,7 @@ pnp(Ether *edev, int type)
        edev->irq = ctlr->pcidev->intl;
        edev->tbdf = ctlr->pcidev->tbdf;
        edev->mbps = 1000;
-       edev->maxmtu = ctlr->rbsz;
+       edev->maxmtu = cttab[ctlr->type].mtu;
        memmove(edev->ea, ctlr->ra, Eaddrlen);
 
        /*