#include "io.h"
#include "../port/error.h"
#include "../port/netif.h"
-
-#include "etherif.h"
-#include "ethermii.h"
+#include "../port/etherif.h"
+#include "../port/ethermii.h"
enum { /* registers */
Idr0 = 0x00, /* MAC address */
Macv28 = 0x2c000000, /* RTL8111/8168B */
Macv29 = 0x40800000, /* RTL8101/8102E */
Macv30 = 0x24000000, /* RTL8101E? (untested) */
+ Macv39 = 0x44800000, /* RTL8106E */
Macv40 = 0x4c000000, /* RTL8168G */
+ Macv42 = 0x50800000, /* RTL8168GU */
+ Macv44 = 0x5c800000, /* RTL8411B */
+ Macv45 = 0x54000000, /* RTL8111HN */
+
Ifg0 = 0x01000000, /* Interframe Gap 0 */
Ifg1 = 0x02000000, /* Interframe Gap 1 */
};
u32int r;
Block *bp;
Ctlr *ctlr;
- u8int cplusc;
+ u16int cplusc;
ctlr = edev->ctlr;
ilock(ctlr);
cplusc |= Txenb|Mulrw;
switch(ctlr->macv){
case Macv40:
+ case Macv44:
cplusc |= Macstatdis;
break;
default:
csr32w(ctlr, Tcr, Ifg1|Ifg0|Mtxdmaunlimited);
ctlr->tcr = csr32r(ctlr, Tcr);
- ctlr->rcr = Rxfthnone|Mrxdmaunlimited|Ab|Am|Apm;
+ switch(ctlr->macv){
+ case Macv42:
+ case Macv45:
+ ctlr->rcr = Rxfth256|Mrxdmaunlimited|Ab|Am|Apm;
+ break;
+ default:
+ ctlr->rcr = Rxfthnone|Mrxdmaunlimited|Ab|Am|Apm;
+ break;
+ }
ctlr->mchash = 0;
csr32w(ctlr, Mar0, 0);
csr32w(ctlr, Mar0+4, 0);
ctlr = edev->ctlr;
+ r = csr8r(ctlr, Phystatus);
/*
* Maybe the link changed - do we care very much?
* Could stall transmits if no link, maybe?
*/
- if(!((r = csr8r(ctlr, Phystatus)) & Linksts)){
- edev->link = 0;
- return;
- }
- edev->link = 1;
+ edev->link = (r & Linksts) != 0;
limit = 256*1024;
if(r & Speed10){
int x;
ctlr = edev->ctlr;
- x = ctlr->rdh;
- for(;;){
+ if(ctlr->nrq < ctlr->nrd/2)
+ rtl8169replenish(ctlr);
+
+ for(x = ctlr->rdh; x != ctlr->rdt;){
d = &ctlr->rd[x];
if((control = d->control) & Own)
break;
bp->flag |= Bipck;
break;
}
- etheriq(edev, bp, 1);
+ etheriq(edev, bp);
}else{
if(!(control & Res))
ctlr->frag++;
case Macv28:
case Macv29:
case Macv30:
+ case Macv39:
case Macv40:
+ case Macv42:
+ case Macv44:
+ case Macv45:
break;
}
return 0;
ctlr->pciv = i;
ctlr->pcie = pcie;
+ pcienable(p);
if(vetmacv(ctlr, &macv) == -1){
+ pcidisable(p);
iofree(port);
free(ctlr);
print("rtl8169: unknown mac %.4ux %.8ux\n", p->did, macv);
continue;
}
- if(pcigetpms(p) > 0){
- pcisetpms(p, 0);
-
- for(i = 0; i < 6; i++)
- pcicfgw32(p, PciBAR0+i*4, p->mem[i].bar);
- pcicfgw8(p, PciINTL, p->intl);
- pcicfgw8(p, PciLTR, p->ltr);
- pcicfgw8(p, PciCLS, p->cls);
- pcicfgw16(p, PciPCR, p->pcr);
- }
-
if(rtl8169reset(ctlr)){
+ pcidisable(p);
iofree(port);
free(ctlr);
print("rtl8169: reset failed\n");
edev->attach = rtl8169attach;
edev->transmit = rtl8169transmit;
- edev->interrupt = rtl8169interrupt;
edev->ifstat = rtl8169ifstat;
edev->arg = edev;
rtl8169link(edev);
+ intrenable(edev->irq, rtl8169interrupt, edev, edev->tbdf, edev->name);
+
return 0;
}