kernel: clean up Mach structure

[plan9front.git] / sys / src / 9 / bcm64 / dat.h

diff --git a/sys/src/9/bcm64/dat.h b/sys/src/9/bcm64/dat.h
index d41ff3f4f11ed34611e8171af2e2fe31c9494039..fc27e351f24824cdaf46f7e878042a5015fd22ca 100644 (file)
--- a/sys/src/9/bcm64/dat.h
+++ b/sys/src/9/bcm64/dat.h
@@ -24,6 +24,7 @@ typedef struct MMMU   MMMU;
 typedef struct Mach    Mach;
 typedef struct Page    Page;
 typedef struct PhysUart        PhysUart;
+typedef struct Pcidev  Pcidev;
 typedef struct PMMU    PMMU;
 typedef struct Proc    Proc;
 typedef u64int         PTE;
@@ -33,6 +34,7 @@ typedef struct Ureg   Ureg;
 typedef uvlong         Tval;
 typedef void           KMap;
 
+#pragma incomplete Pcidev
 #pragma incomplete Ureg
 
 #define MAXSYSARG      5       /* for mount(fd, mpt, flag, arg, srv) */
@@ -96,7 +98,7 @@ struct Conf
 {
        ulong   nmach;          /* processors */
        ulong   nproc;          /* processes */
-       Confmem mem[1];         /* physical memory */
+       Confmem mem[4];         /* physical memory */
        ulong   npage;          /* total physical pages of memory */
        usize   upages;         /* user page pool */
        ulong   copymode;       /* 0 is copy on write, 1 is copy on reference */
@@ -115,7 +117,7 @@ struct Conf
  */
 struct MMMU
 {
-       PTE*    mmul1;          /* l1 for this processor */
+       PTE*    mmutop;         /* first level user page table */
 };
 
 /*
@@ -125,16 +127,12 @@ struct MMMU
 
 struct PMMU
 {
-       Page*   mmul1;
-       Page*   mmul1tail;
-
-       Page*   mmul2;
-       Page*   mmul2tail;
-
-       Page*   mmufree;
-
+       union {
+       Page    *mmufree;       /* mmuhead[0] is freelist head */
+       Page    *mmuhead[PTLEVELS];
+       };
+       Page    *mmutail[PTLEVELS];
        int     asid;
-
        uintptr tpidr;
 };
 
@@ -144,41 +142,17 @@ struct Mach
 {
        int     machno;                 /* physical id of processor */
        uintptr splpc;                  /* pc of last caller to splhi */
-
-       Proc*   proc;                   /* current process */
+       Proc*   proc;                   /* current process on this processor */
+       /* end of offsets known to asm */
 
        MMMU;
-       int     flushmmu;               /* flush current proc mmu state */
-
-       ulong   ticks;                  /* of the clock since boot time */
-       Label   sched;                  /* scheduler wakeup */
-       Lock    alarmlock;              /* access to alarm list */
-       void*   alarm;                  /* alarms bound to this clock */
 
-       Proc*   readied;                /* for runproc */
-       ulong   schedticks;             /* next forced context switch */
+       PMach;
 
        int     cputype;
        ulong   delayloop;
-
-       /* stats */
-       int     tlbfault;
-       int     tlbpurge;
-       int     pfault;
-       int     cs;
-       int     syscall;
-       int     load;
-       int     intr;
-       uvlong  fastclock;              /* last sampled value */
-       uvlong  inidle;                 /* time spent in idlehands() */
-       ulong   spuriousintr;
-       int     lastintr;
-       int     ilockdepth;
-       Perf    perf;                   /* performance counters */
-
        int     cpumhz;
        uvlong  cpuhz;                  /* speed of cpu */
-       uvlong  cyclefreq;              /* Frequency of user readable cycle counter */
 
        int     stack[1];
 };
@@ -194,7 +168,6 @@ struct
 extern register Mach* m;                       /* R27 */
 extern register Proc* up;                      /* R26 */
 extern int normalprint;
-extern ulong memsize;
 
 /*
  *  a parsed plan9.ini line
@@ -203,7 +176,7 @@ extern ulong memsize;
 
 struct ISAConf {
        char    *type;
-       ulong   port;
+       uvlong  port;
        int     irq;
        ulong   dma;
        ulong   mem;
@@ -246,17 +219,18 @@ struct DevConf
 
 struct Soc {                   /* SoC dependent configuration */
        ulong   dramsize;
-       uintptr physio;
        uintptr busdram;
+       ulong   iosize;
        uintptr busio;
+       uintptr physio;
+       uintptr virtio;
        uintptr armlocal;
-       u32int  l1ptedramattrs;
-       u32int  l2ptedramattrs;
+       uintptr pciwin;         /* PCI outbound window CPU->PCI */
+       uintptr pcidmawin;      /* PCI inbound window PCI->DRAM */
+       int     oscfreq;
 };
 extern Soc soc;
 
-#define BUSUNKNOWN -1
-
 /*
  * GPIO
  */