vmx \- x86 virtualization interface
.SH SYNOPSIS
.nf
-.B #X/ctl
-.B #X/fpregs
-.B #X/map
-.B #X/regs
-.B #X/status
-.B #X/wait
+.B #X/clone
+.B #X/n
+.B #X/n/ctl
+.B #X/n/fpregs
+.B #X/n/map
+.B #X/n/regs
+.B #X/n/status
+.B #X/n/wait
.fi
.SH DESCRIPTION
The
.I vmx
device is restricted to the hostowner.
.PP
+The top level directory contains a
+.B clone
+file and numbered subdirectories representing the
+allocated virtual CPUs.
+Opening the clone file allocates a new virtual CPU
+and returns the file descriptor to its
+.B ctl
+file.
The
.B ctl
-file provides the main control interface.
-See below for a list of commands.
+file provides the main control interface. See below for
+a list of commands. Reading returns the subdirectory number.
+Removing the
+.B ctl
+file marks the virtual CPU as moribund.
The
.B status
file contains the current status of the virtual CPU, which is one of
-.TF \fLinactive\fR
-.TP
-\fLinactive\fR
-No virtual CPU.
+.TF \fLrunning\fR
.TP
\fLinit\fR
The virtual CPU is being initialized.
.TP
\fLready\fR
-The virtual CPU is idle and waiting for commands from user space.
+The virtual CPU is idle.
.TP
\fLrunning\fR
-The virtual CPU is busy.
+The virtual CPU is executing code.
.TP
\fLdead\fR
The virtual CPU suffered a fatal error.
Writes to the file (in the same format) write to the referenced registers (if possible).
Multiple lines can be written at once but all lines written must be newline terminated.
+.PP
+Some registers (\fLCR0\fR and \fLCR4\fR) are split into three registers, suffixed \fLreal\fR, \fLfake\fR and \fLmask\fR.
+In this case, \fLreal\fR corresponds to the bits that affect actual CPU execution, \fLfake\fR corresponds to the bits read back by the guest and the bits set in \fLmask\fR are those "owned" by the host.
+The guest is free to modify the bits that it owns (in which case it always has the same value in both \fLreal\fR and \fLfake\fR), but attempting to change a host-owned bit from the status in \fLfake\fR causes a VM exit.
+Certain bits are owned by the kernel, which means they are fixed in both \fLmask\fR and \fLreal\fR.
+
.PP
Reading the
.B wait
.TP
\fL#\fR\fIexception\fR
Exception of the specified type (e.g. \fL#gp\fR for general protection fault).
+Currently only debug exceptions are configured to cause VM exits.
.TP
\fLtriplef\fR
Triple fault.
.TP
\fLeptfault\fR
-The virtual CPU attempted a memory access that does not match any entry in the \Lmap\fR file.
+The virtual CPU attempted a memory access that does not match any entry in the \fLmap\fR file.
+.TP
+\fLmovcr\fR
+Illegal access to a control register (see above).
.IP "\fL.\fR\fIinstr\fR"
The virtual CPU attempted to execute the instruction \fIinstr\fR.
.TP
.IR proc (3).
.SS Control messages
-.TF "\fLexc\fR \fI[excep]\fR"
-.TP
-.B init
-Create a new virtual CPU.
+.TF "\fLextrap\fR [ \fIexcep\fR ]"
.TP
.B quit
Destroy the current virtual CPU.
.TP
-.BI go [regs]
+\fLgo\fR [ \fIregs\fR ]
Launch the virtual CPU.
\fIRegs\fR is an optional list of register changes in the format \fIname\fL=\fIvalue\fL;\fR that will be applied before launching.
.TP
-\fLstep\fR [ \fL-map\fR \fIaddr segment offset\fR \fB]\fR
+.B stop
+Stop the virtual CPU.
+.TP
+\fLstep\fR [ \fIregs\fR ]
Executes a single instruction with the virtual CPU.
-If the \fL-map\fR option is specified, a 4 KB page at address \fIaddr\fR will be temporarily (for the duration of the step) mapped to the spceified \fIsegment\fR and \fIoffset\fR.
-A step can fail, in which case a VM exit message is sent to
-.BR wait .
+\fIRegs\fR is optinal, same as \fLgo\fR.
.TP
-.BI exc excep
+\fLexc\fR \fIexcep\fR
The exception \fIexcep\fR is triggered in the virtual CPU.
\fIExcep\fR can either be a named exception (such as \fL#gp\fR, in lower case) or an exception number.
A number may be preeded by \fL#\fR to mark it as an exception, otherwise it is delivered as an interrupt (but always disregarding whether interrupts are enabled).
.TP
-.BI irq [excep]
+\fLirq\fR [ \fIexcep\fR ]
An Interrupt is posted, i.e. the exception \fIexcep\fR will be triggered the next time interrupts are enabled in the virtual CPU, at which point a
.B *ack
message is sent to
.IExcep\fR uses the same format as the argument of \fBexc\fR.
.B Irq
cancels any interrupts that have been previously posted but not yet delivered and it can be called with no argument to cancel an interrupt.
+.TP
+\fLextrap\fR \fIbitmap\fR
+Changes the exception bitmap. Set bits cause a VM exits.
.SH SOURCE
.B /sys/src/9/pc/devvmx.c
.SH "SEE ALSO"
Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3B, Chapters 23-33.
.SH BUGS
-Currently only one virtual CPU is supported and it is tied to the bootstrap processor.
-.PP
-The interface will almost certainly change in the future.
-.PP
.I Devvmx
can and will crash your kernel.
.SH HISTORY
projects / plan9front.git / blobdiff