-use crate::llvm;
+use crate::builder::Builder;
use crate::context::CodegenCx;
+use crate::llvm;
use crate::type_of::LayoutLlvmExt;
-use crate::builder::Builder;
use crate::value::Value;
-use rustc::hir;
-use rustc_codegen_ssa::traits::*;
-use rustc_codegen_ssa::mir::place::PlaceRef;
use rustc_codegen_ssa::mir::operand::OperandValue;
-use syntax_pos::Span;
+use rustc_codegen_ssa::mir::place::PlaceRef;
+use rustc_codegen_ssa::traits::*;
+use rustc_hir as hir;
+use rustc_span::Span;
+use libc::{c_char, c_uint};
+use log::debug;
use std::ffi::{CStr, CString};
-use libc::{c_uint, c_char};
-
impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
fn codegen_inline_asm(
inputs = indirect_outputs;
}
- let clobbers = ia.clobbers.iter()
- .map(|s| format!("~{{{}}}", &s));
+ let clobbers = ia.clobbers.iter().map(|s| format!("~{{{}}}", &s));
// Default per-arch clobbers
// Basically what clang does
let arch_clobbers = match &self.sess().target.target.arch[..] {
- "x86" | "x86_64" => vec!["~{dirflag}", "~{fpsr}", "~{flags}"],
+ "x86" | "x86_64" => vec!["~{dirflag}", "~{fpsr}", "~{flags}"],
"mips" | "mips64" => vec!["~{$1}"],
- _ => Vec::new()
+ _ => Vec::new(),
};
- let all_constraints =
- ia.outputs.iter().map(|out| out.constraint.to_string())
- .chain(ia.inputs.iter().map(|s| s.to_string()))
- .chain(ext_constraints)
- .chain(clobbers)
- .chain(arch_clobbers.iter().map(|s| s.to_string()))
- .collect::<Vec<String>>().join(",");
+ let all_constraints = ia
+ .outputs
+ .iter()
+ .map(|out| out.constraint.to_string())
+ .chain(ia.inputs.iter().map(|s| s.to_string()))
+ .chain(ext_constraints)
+ .chain(clobbers)
+ .chain(arch_clobbers.iter().map(|s| s.to_string()))
+ .collect::<Vec<String>>()
+ .join(",");
debug!("Asm Constraints: {}", &all_constraints);
let output_type = match num_outputs {
0 => self.type_void(),
1 => output_types[0],
- _ => self.type_struct(&output_types, false)
+ _ => self.type_struct(&output_types, false),
};
let asm = CString::new(ia.asm.as_str().as_bytes()).unwrap();
output_type,
ia.volatile,
ia.alignstack,
- ia.dialect
+ ia.dialect,
);
if r.is_none() {
return false;
// back to source locations. See #17552.
unsafe {
let key = "srcloc";
- let kind = llvm::LLVMGetMDKindIDInContext(self.llcx,
- key.as_ptr() as *const c_char, key.len() as c_uint);
+ let kind = llvm::LLVMGetMDKindIDInContext(
+ self.llcx,
+ key.as_ptr() as *const c_char,
+ key.len() as c_uint,
+ );
let val: &'ll Value = self.const_i32(span.ctxt().outer_expn().as_u32() as i32);
- llvm::LLVMSetMetadata(r, kind,
- llvm::LLVMMDNodeInContext(self.llcx, &val, 1));
+ llvm::LLVMSetMetadata(r, kind, llvm::LLVMMDNodeInContext(self.llcx, &val, 1));
}
true
alignstack: bool,
dia: ::syntax::ast::AsmDialect,
) -> Option<&'ll Value> {
- let volatile = if volatile { llvm::True }
- else { llvm::False };
- let alignstack = if alignstack { llvm::True }
- else { llvm::False };
-
- let argtys = inputs.iter().map(|v| {
- debug!("Asm Input Type: {:?}", *v);
- bx.cx.val_ty(*v)
- }).collect::<Vec<_>>();
+ let volatile = if volatile { llvm::True } else { llvm::False };
+ let alignstack = if alignstack { llvm::True } else { llvm::False };
+
+ let argtys = inputs
+ .iter()
+ .map(|v| {
+ debug!("Asm Input Type: {:?}", *v);
+ bx.cx.val_ty(*v)
+ })
+ .collect::<Vec<_>>();
debug!("Asm Output Type: {:?}", output);
let fty = bx.cx.type_func(&argtys[..], output);