1 - // MIR for `t32` before Inline
2 + // MIR for `t32` after Inline
5 let mut _0: (); // return place in scope 0 at $DIR/inline_instruction_set.rs:+0:14: +0:14
6 let _1: (); // in scope 0 at $DIR/inline_instruction_set.rs:+1:5: +1:26
7 let _2: (); // in scope 0 at $DIR/inline_instruction_set.rs:+2:5: +2:26
8 let _3: (); // in scope 0 at $DIR/inline_instruction_set.rs:+3:5: +3:30
9 let _4: (); // in scope 0 at $DIR/inline_instruction_set.rs:+4:5: +4:41
10 + scope 1 (inlined instruction_set_t32) { // at $DIR/inline_instruction_set.rs:50:5: 50:26
12 + scope 2 (inlined instruction_set_default) { // at $DIR/inline_instruction_set.rs:51:5: 51:30
16 StorageLive(_1); // scope 0 at $DIR/inline_instruction_set.rs:+1:5: +1:26
17 _1 = instruction_set_a32() -> bb1; // scope 0 at $DIR/inline_instruction_set.rs:+1:5: +1:26
19 // + span: $DIR/inline_instruction_set.rs:49:5: 49:24
20 // + literal: Const { ty: fn() {instruction_set_a32}, val: Value(<ZST>) }
24 StorageDead(_1); // scope 0 at $DIR/inline_instruction_set.rs:+1:26: +1:27
25 StorageLive(_2); // scope 0 at $DIR/inline_instruction_set.rs:+2:5: +2:26
26 - _2 = instruction_set_t32() -> bb2; // scope 0 at $DIR/inline_instruction_set.rs:+2:5: +2:26
28 - // + span: $DIR/inline_instruction_set.rs:50:5: 50:24
29 - // + literal: Const { ty: fn() {instruction_set_t32}, val: Value(<ZST>) }
33 StorageDead(_2); // scope 0 at $DIR/inline_instruction_set.rs:+2:26: +2:27
34 StorageLive(_3); // scope 0 at $DIR/inline_instruction_set.rs:+3:5: +3:30
35 - _3 = instruction_set_default() -> bb3; // scope 0 at $DIR/inline_instruction_set.rs:+3:5: +3:30
37 - // + span: $DIR/inline_instruction_set.rs:51:5: 51:28
38 - // + literal: Const { ty: fn() {instruction_set_default}, val: Value(<ZST>) }
42 StorageDead(_3); // scope 0 at $DIR/inline_instruction_set.rs:+3:30: +3:31
43 StorageLive(_4); // scope 0 at $DIR/inline_instruction_set.rs:+4:5: +4:41
44 - _4 = inline_always_and_using_inline_asm() -> bb4; // scope 0 at $DIR/inline_instruction_set.rs:+4:5: +4:41
45 + _4 = inline_always_and_using_inline_asm() -> bb2; // scope 0 at $DIR/inline_instruction_set.rs:+4:5: +4:41
47 // + span: $DIR/inline_instruction_set.rs:52:5: 52:39
48 // + literal: Const { ty: fn() {inline_always_and_using_inline_asm}, val: Value(<ZST>) }
53 StorageDead(_4); // scope 0 at $DIR/inline_instruction_set.rs:+4:41: +4:42
54 _0 = const (); // scope 0 at $DIR/inline_instruction_set.rs:+0:14: +5:2
55 return; // scope 0 at $DIR/inline_instruction_set.rs:+5:2: +5:2