1 // assembly-output: emit-asm
3 // compile-flags: --target aarch64-unknown-linux-gnu
4 // needs-llvm-components: aarch64
6 #![feature(no_core, lang_items, rustc_attrs)]
7 #![crate_type = "rlib"]
9 #![allow(asm_sub_register)]
11 #[rustc_builtin_macro]
15 #[rustc_builtin_macro]
16 macro_rules! stringify {
28 ($func:ident $reg:ident $code:literal) => {
29 // -O and extern "C" guarantee that the selected register is always r0/s0/d0/q0
31 pub unsafe extern "C" fn $func() -> i32 {
32 // Hack to avoid function merging
34 fn dont_merge(s: &str);
36 dont_merge(stringify!($func));
39 asm!($code, out($reg) y);
49 check!(reg reg "mov {0}, {0}");
51 // CHECK-LABEL: reg_w:
55 check!(reg_w reg "mov {0:w}, {0:w}");
57 // CHECK-LABEL: reg_x:
61 check!(reg_x reg "mov {0:x}, {0:x}");
65 // CHECK: add v0.4s, v0.4s, v0.4s
67 check!(vreg vreg "add {0}.4s, {0}.4s, {0}.4s");
69 // CHECK-LABEL: vreg_b:
71 // CHECK: ldr b0, [x0]
73 check!(vreg_b vreg "ldr {:b}, [x0]");
75 // CHECK-LABEL: vreg_h:
77 // CHECK: ldr h0, [x0]
79 check!(vreg_h vreg "ldr {:h}, [x0]");
81 // CHECK-LABEL: vreg_s:
83 // CHECK: ldr s0, [x0]
85 check!(vreg_s vreg "ldr {:s}, [x0]");
87 // CHECK-LABEL: vreg_d:
89 // CHECK: ldr d0, [x0]
91 check!(vreg_d vreg "ldr {:d}, [x0]");
93 // CHECK-LABEL: vreg_q:
95 // CHECK: ldr q0, [x0]
97 check!(vreg_q vreg "ldr {:q}, [x0]");
99 // CHECK-LABEL: vreg_v:
101 // CHECK: add v0.4s, v0.4s, v0.4s
103 check!(vreg_v vreg "add {0:v}.4s, {0:v}.4s, {0:v}.4s");
105 // CHECK-LABEL: vreg_low16:
107 // CHECK: add v0.4s, v0.4s, v0.4s
109 check!(vreg_low16 vreg_low16 "add {0}.4s, {0}.4s, {0}.4s");
111 // CHECK-LABEL: vreg_low16_b:
113 // CHECK: ldr b0, [x0]
115 check!(vreg_low16_b vreg_low16 "ldr {:b}, [x0]");
117 // CHECK-LABEL: vreg_low16_h:
119 // CHECK: ldr h0, [x0]
121 check!(vreg_low16_h vreg_low16 "ldr {:h}, [x0]");
123 // CHECK-LABEL: vreg_low16_s:
125 // CHECK: ldr s0, [x0]
127 check!(vreg_low16_s vreg_low16 "ldr {:s}, [x0]");
129 // CHECK-LABEL: vreg_low16_d:
131 // CHECK: ldr d0, [x0]
133 check!(vreg_low16_d vreg_low16 "ldr {:d}, [x0]");
135 // CHECK-LABEL: vreg_low16_q:
137 // CHECK: ldr q0, [x0]
139 check!(vreg_low16_q vreg_low16 "ldr {:q}, [x0]");
141 // CHECK-LABEL: vreg_low16_v:
143 // CHECK: add v0.4s, v0.4s, v0.4s
145 check!(vreg_low16_v vreg_low16 "add {0:v}.4s, {0:v}.4s, {0:v}.4s");