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Rollup merge of #107048 - DebugSteven:newer-x-check-cargo, r=albertlarsan68
[rust.git] / tests / assembly / asm / aarch64-modifiers.rs
1 // assembly-output: emit-asm
2 // compile-flags: -O
3 // compile-flags: --target aarch64-unknown-linux-gnu
4 // needs-llvm-components: aarch64
5
6 #![feature(no_core, lang_items, rustc_attrs)]
7 #![crate_type = "rlib"]
8 #![no_core]
9 #![allow(asm_sub_register)]
10
11 #[rustc_builtin_macro]
12 macro_rules! asm {
13     () => {};
14 }
15 #[rustc_builtin_macro]
16 macro_rules! stringify {
17     () => {};
18 }
19
20 #[lang = "sized"]
21 trait Sized {}
22 #[lang = "copy"]
23 trait Copy {}
24
25 impl Copy for i32 {}
26
27 macro_rules! check {
28     ($func:ident $reg:ident $code:literal) => {
29         // -O and extern "C" guarantee that the selected register is always r0/s0/d0/q0
30         #[no_mangle]
31         pub unsafe extern "C" fn $func() -> i32 {
32             // Hack to avoid function merging
33             extern "Rust" {
34                 fn dont_merge(s: &str);
35             }
36             dont_merge(stringify!($func));
37
38             let y;
39             asm!($code, out($reg) y);
40             y
41         }
42     };
43 }
44
45 // CHECK-LABEL: reg:
46 // CHECK: //APP
47 // CHECK: mov x0, x0
48 // CHECK: //NO_APP
49 check!(reg reg "mov {0}, {0}");
50
51 // CHECK-LABEL: reg_w:
52 // CHECK: //APP
53 // CHECK: mov w0, w0
54 // CHECK: //NO_APP
55 check!(reg_w reg "mov {0:w}, {0:w}");
56
57 // CHECK-LABEL: reg_x:
58 // CHECK: //APP
59 // CHECK: mov x0, x0
60 // CHECK: //NO_APP
61 check!(reg_x reg "mov {0:x}, {0:x}");
62
63 // CHECK-LABEL: vreg:
64 // CHECK: //APP
65 // CHECK: add v0.4s, v0.4s, v0.4s
66 // CHECK: //NO_APP
67 check!(vreg vreg "add {0}.4s, {0}.4s, {0}.4s");
68
69 // CHECK-LABEL: vreg_b:
70 // CHECK: //APP
71 // CHECK: ldr b0, [x0]
72 // CHECK: //NO_APP
73 check!(vreg_b vreg "ldr {:b}, [x0]");
74
75 // CHECK-LABEL: vreg_h:
76 // CHECK: //APP
77 // CHECK: ldr h0, [x0]
78 // CHECK: //NO_APP
79 check!(vreg_h vreg "ldr {:h}, [x0]");
80
81 // CHECK-LABEL: vreg_s:
82 // CHECK: //APP
83 // CHECK: ldr s0, [x0]
84 // CHECK: //NO_APP
85 check!(vreg_s vreg "ldr {:s}, [x0]");
86
87 // CHECK-LABEL: vreg_d:
88 // CHECK: //APP
89 // CHECK: ldr d0, [x0]
90 // CHECK: //NO_APP
91 check!(vreg_d vreg "ldr {:d}, [x0]");
92
93 // CHECK-LABEL: vreg_q:
94 // CHECK: //APP
95 // CHECK: ldr q0, [x0]
96 // CHECK: //NO_APP
97 check!(vreg_q vreg "ldr {:q}, [x0]");
98
99 // CHECK-LABEL: vreg_v:
100 // CHECK: //APP
101 // CHECK: add v0.4s, v0.4s, v0.4s
102 // CHECK: //NO_APP
103 check!(vreg_v vreg "add {0:v}.4s, {0:v}.4s, {0:v}.4s");
104
105 // CHECK-LABEL: vreg_low16:
106 // CHECK: //APP
107 // CHECK: add v0.4s, v0.4s, v0.4s
108 // CHECK: //NO_APP
109 check!(vreg_low16 vreg_low16 "add {0}.4s, {0}.4s, {0}.4s");
110
111 // CHECK-LABEL: vreg_low16_b:
112 // CHECK: //APP
113 // CHECK: ldr b0, [x0]
114 // CHECK: //NO_APP
115 check!(vreg_low16_b vreg_low16 "ldr {:b}, [x0]");
116
117 // CHECK-LABEL: vreg_low16_h:
118 // CHECK: //APP
119 // CHECK: ldr h0, [x0]
120 // CHECK: //NO_APP
121 check!(vreg_low16_h vreg_low16 "ldr {:h}, [x0]");
122
123 // CHECK-LABEL: vreg_low16_s:
124 // CHECK: //APP
125 // CHECK: ldr s0, [x0]
126 // CHECK: //NO_APP
127 check!(vreg_low16_s vreg_low16 "ldr {:s}, [x0]");
128
129 // CHECK-LABEL: vreg_low16_d:
130 // CHECK: //APP
131 // CHECK: ldr d0, [x0]
132 // CHECK: //NO_APP
133 check!(vreg_low16_d vreg_low16 "ldr {:d}, [x0]");
134
135 // CHECK-LABEL: vreg_low16_q:
136 // CHECK: //APP
137 // CHECK: ldr q0, [x0]
138 // CHECK: //NO_APP
139 check!(vreg_low16_q vreg_low16 "ldr {:q}, [x0]");
140
141 // CHECK-LABEL: vreg_low16_v:
142 // CHECK: //APP
143 // CHECK: add v0.4s, v0.4s, v0.4s
144 // CHECK: //NO_APP
145 check!(vreg_low16_v vreg_low16 "add {0:v}.4s, {0:v}.4s, {0:v}.4s");