7 #include "/sparc64/include/ureg.h"
10 #define REGOFF(x) (ulong)(&((struct Ureg *) 0)->x)
15 #define R15 REGOFF(r15)
17 #define REGSIZE sizeof(struct Ureg)
18 #define FP_REG(x) (REGSIZE+4*(x))
19 #define FPREGSIZE (33*4)
21 Reglist sparc64reglist[] = {
22 {"Y", REGOFF(y), RINT|RRDONLY, 'X'},
23 {"TT", REGOFF(tt), RINT|RRDONLY, 'X'},
24 {"PSTATE", REGOFF(pstate), RINT|RRDONLY, 'X'},
25 {"PC", REGOFF(pc), RINT, 'X'},
26 {"SP", REGOFF(sp), RINT, 'X'}, /* also R1 */
27 {"R2", REGOFF(r2), RINT, 'X'},
28 {"R3", REGOFF(r3), RINT, 'X'},
29 {"R4", REGOFF(r4), RINT, 'X'},
30 {"R5", REGOFF(r5), RINT, 'X'},
31 {"R6", REGOFF(r6), RINT, 'X'},
32 {"R7", REGOFF(r7), RINT, 'X'},
33 {"R8", REGOFF(r8), RINT, 'X'},
34 {"R9", REGOFF(r9), RINT, 'X'},
35 {"R10", REGOFF(r10), RINT, 'X'},
36 {"R11", REGOFF(r11), RINT, 'X'},
37 {"R12", REGOFF(r12), RINT, 'X'},
38 {"R13", REGOFF(r13), RINT, 'X'},
39 {"R14", REGOFF(r14), RINT, 'X'},
40 {"R15", REGOFF(r15), RINT, 'X'},
41 {"R16", REGOFF(r16), RINT, 'X'},
42 {"R17", REGOFF(r17), RINT, 'X'},
43 {"R18", REGOFF(r18), RINT, 'X'},
44 {"R19", REGOFF(r19), RINT, 'X'},
45 {"R20", REGOFF(r20), RINT, 'X'},
46 {"R21", REGOFF(r21), RINT, 'X'},
47 {"R22", REGOFF(r22), RINT, 'X'},
48 {"R23", REGOFF(r23), RINT, 'X'},
49 {"R24", REGOFF(r24), RINT, 'X'},
50 {"R25", REGOFF(r25), RINT, 'X'},
51 {"R26", REGOFF(r26), RINT, 'X'},
52 {"R27", REGOFF(r27), RINT, 'X'},
53 {"R28", REGOFF(r28), RINT, 'X'},
54 {"R29", REGOFF(r29), RINT, 'X'},
55 {"R30", REGOFF(r30), RINT, 'X'},
56 {"R31", REGOFF(r31), RINT, 'X'},
57 {"NPC", REGOFF(npc), RINT, 'X'},
59 {"F0", FP_REG(0), RFLT, 'F'},
60 {"F1", FP_REG(1), RFLT, 'f'},
61 {"F2", FP_REG(2), RFLT, 'F'},
62 {"F3", FP_REG(3), RFLT, 'f'},
63 {"F4", FP_REG(4), RFLT, 'F'},
64 {"F5", FP_REG(5), RFLT, 'f'},
65 {"F6", FP_REG(6), RFLT, 'F'},
66 {"F7", FP_REG(7), RFLT, 'f'},
67 {"F8", FP_REG(8), RFLT, 'F'},
68 {"F9", FP_REG(9), RFLT, 'f'},
69 {"F10", FP_REG(10), RFLT, 'F'},
70 {"F11", FP_REG(11), RFLT, 'f'},
71 {"F12", FP_REG(12), RFLT, 'F'},
72 {"F13", FP_REG(13), RFLT, 'f'},
73 {"F14", FP_REG(14), RFLT, 'F'},
74 {"F15", FP_REG(15), RFLT, 'f'},
75 {"F16", FP_REG(16), RFLT, 'F'},
76 {"F17", FP_REG(17), RFLT, 'f'},
77 {"F18", FP_REG(18), RFLT, 'F'},
78 {"F19", FP_REG(19), RFLT, 'f'},
79 {"F20", FP_REG(20), RFLT, 'F'},
80 {"F21", FP_REG(21), RFLT, 'f'},
81 {"F22", FP_REG(22), RFLT, 'F'},
82 {"F23", FP_REG(23), RFLT, 'f'},
83 {"F24", FP_REG(24), RFLT, 'F'},
84 {"F25", FP_REG(25), RFLT, 'f'},
85 {"F26", FP_REG(26), RFLT, 'F'},
86 {"F27", FP_REG(27), RFLT, 'f'},
87 {"F28", FP_REG(28), RFLT, 'F'},
88 {"F29", FP_REG(29), RFLT, 'f'},
89 {"F30", FP_REG(30), RFLT, 'F'},
90 {"F31", FP_REG(31), RFLT, 'f'},
91 {"FSR", FP_REG(32), RINT, 'X'},
92 {"FPRS", FP_REG(33), RINT, 'X'},
97 * sparc64 has same stack format as mips
102 MSPARC64, /* machine type */
103 sparc64reglist, /* register list */
104 REGSIZE, /* register set size in bytes */
105 FPREGSIZE, /* floating point register size in bytes */
106 "PC", /* name of PC */
107 "R1", /* name of SP */
108 "R15", /* name of link register */
109 "setSB", /* static base register name */
111 0x2000, /* page size */
112 0x80000000ULL, /* kernel base */
113 0x80000000ULL, /* kernel text mask */
114 0x7FFFFFFFULL, /* user stack top */
115 4, /* quantization of pc */