3 * forsyth@terzarima.net
7 #include "/power/include/ureg.h"
11 #define REGOFF(x) (ulong) (&((struct Ureg *) 0)->x)
15 #define R3 REGOFF(r3) /* return reg */
17 #define R31 REGOFF(r31)
18 #define FP_REG(x) (R31+4+8*(x))
20 #define REGSIZE sizeof(struct Ureg)
21 #define FPREGSIZE (8*33)
23 Reglist powerreglist[] = {
24 {"CAUSE", REGOFF(cause), RINT|RRDONLY, 'X'},
25 {"SRR1", REGOFF(srr1), RINT|RRDONLY, 'X'},
26 {"PC", REGOFF(pc), RINT, 'X'},
27 {"LR", REGOFF(lr), RINT, 'X'},
28 {"CR", REGOFF(cr), RINT, 'X'},
29 {"XER", REGOFF(xer), RINT, 'X'},
30 {"CTR", REGOFF(ctr), RINT, 'X'},
31 {"PC", PC, RINT, 'X'},
32 {"SP", SP, RINT, 'X'},
33 {"R0", REGOFF(r0), RINT, 'X'},
35 {"R2", REGOFF(r2), RINT, 'X'},
36 {"R3", REGOFF(r3), RINT, 'X'},
37 {"R4", REGOFF(r4), RINT, 'X'},
38 {"R5", REGOFF(r5), RINT, 'X'},
39 {"R6", REGOFF(r6), RINT, 'X'},
40 {"R7", REGOFF(r7), RINT, 'X'},
41 {"R8", REGOFF(r8), RINT, 'X'},
42 {"R9", REGOFF(r9), RINT, 'X'},
43 {"R10", REGOFF(r10), RINT, 'X'},
44 {"R11", REGOFF(r11), RINT, 'X'},
45 {"R12", REGOFF(r12), RINT, 'X'},
46 {"R13", REGOFF(r13), RINT, 'X'},
47 {"R14", REGOFF(r14), RINT, 'X'},
48 {"R15", REGOFF(r15), RINT, 'X'},
49 {"R16", REGOFF(r16), RINT, 'X'},
50 {"R17", REGOFF(r17), RINT, 'X'},
51 {"R18", REGOFF(r18), RINT, 'X'},
52 {"R19", REGOFF(r19), RINT, 'X'},
53 {"R20", REGOFF(r20), RINT, 'X'},
54 {"R21", REGOFF(r21), RINT, 'X'},
55 {"R22", REGOFF(r22), RINT, 'X'},
56 {"R23", REGOFF(r23), RINT, 'X'},
57 {"R24", REGOFF(r24), RINT, 'X'},
58 {"R25", REGOFF(r25), RINT, 'X'},
59 {"R26", REGOFF(r26), RINT, 'X'},
60 {"R27", REGOFF(r27), RINT, 'X'},
61 {"R28", REGOFF(r28), RINT, 'X'},
62 {"R29", REGOFF(r29), RINT, 'X'},
63 {"R30", REGOFF(r30), RINT, 'X'},
64 {"R31", REGOFF(r31), RINT, 'X'},
65 {"F0", FP_REG(0), RFLT, 'F'},
66 {"F1", FP_REG(1), RFLT, 'F'},
67 {"F2", FP_REG(2), RFLT, 'F'},
68 {"F3", FP_REG(3), RFLT, 'F'},
69 {"F4", FP_REG(4), RFLT, 'F'},
70 {"F5", FP_REG(5), RFLT, 'F'},
71 {"F6", FP_REG(6), RFLT, 'F'},
72 {"F7", FP_REG(7), RFLT, 'F'},
73 {"F8", FP_REG(8), RFLT, 'F'},
74 {"F9", FP_REG(9), RFLT, 'F'},
75 {"F10", FP_REG(10), RFLT, 'F'},
76 {"F11", FP_REG(11), RFLT, 'F'},
77 {"F12", FP_REG(12), RFLT, 'F'},
78 {"F13", FP_REG(13), RFLT, 'F'},
79 {"F14", FP_REG(14), RFLT, 'F'},
80 {"F15", FP_REG(15), RFLT, 'F'},
81 {"F16", FP_REG(16), RFLT, 'F'},
82 {"F17", FP_REG(17), RFLT, 'F'},
83 {"F18", FP_REG(18), RFLT, 'F'},
84 {"F19", FP_REG(19), RFLT, 'F'},
85 {"F20", FP_REG(20), RFLT, 'F'},
86 {"F21", FP_REG(21), RFLT, 'F'},
87 {"F22", FP_REG(22), RFLT, 'F'},
88 {"F23", FP_REG(23), RFLT, 'F'},
89 {"F24", FP_REG(24), RFLT, 'F'},
90 {"F25", FP_REG(25), RFLT, 'F'},
91 {"F26", FP_REG(26), RFLT, 'F'},
92 {"F27", FP_REG(27), RFLT, 'F'},
93 {"F28", FP_REG(28), RFLT, 'F'},
94 {"F29", FP_REG(29), RFLT, 'F'},
95 {"F30", FP_REG(30), RFLT, 'F'},
96 {"F31", FP_REG(31), RFLT, 'F'},
97 {"FPSCR", FP_REG(32)+4, RFLT, 'X'},
101 /* the machine description */
105 MPOWER, /* machine type */
106 powerreglist, /* register set */
107 REGSIZE, /* number of bytes in register set */
108 FPREGSIZE, /* number of bytes in FP register set */
109 "PC", /* name of PC */
110 "SP", /* name of SP */
111 "LR", /* name of link register */
112 "setSB", /* static base register name */
114 0x100000, /* page size */
115 0x80000000ULL, /* kernel base */
116 0xF0000000ULL, /* kernel text mask */
117 0x7FFFFFFFULL, /* user stack top */
118 4, /* quantization of pc */