sys/src/libmach/q.c

   1 /*
   2  * PowerPC definition
   3  *      forsyth@terzarima.net
   4  */
   5 #include <u.h>
   6 #include <libc.h>
   7 #include <bio.h>
   8 #include <mach.h>
   9
  10 #pragma pack on
  11 #include "/power/include/ureg.h"
  12 #pragma pack off
  13
  14 #define REGOFF(x)       (uintptr) (&((struct Ureg *) 0)->x)
  15
  16 #define SP              REGOFF(sp)
  17 #define PC              REGOFF(pc)
  18 #define R3              REGOFF(r3)      /* return reg */
  19 #define LR              REGOFF(lr)
  20 #define R31             REGOFF(r31)
  21 #define FP_REG(x)       (R31+4+8*(x))
  22
  23 #define REGSIZE         sizeof(struct Ureg)
  24 #define FPREGSIZE       (8*33)
  25
  26 Reglist powerreglist[] = {
  27         {"CAUSE",       REGOFF(cause),  RINT|RRDONLY,   'X'},
  28         {"SRR1",        REGOFF(srr1),   RINT|RRDONLY,   'X'},
  29         {"PC",          REGOFF(pc),     RINT,           'X'},
  30         {"LR",          REGOFF(lr),     RINT,           'X'},
  31         {"CR",          REGOFF(cr),     RINT,           'X'},
  32         {"XER",         REGOFF(xer),    RINT,           'X'},
  33         {"CTR",         REGOFF(ctr),    RINT,           'X'},
  34         {"PC",          PC,             RINT,           'X'},
  35         {"SP",          SP,             RINT,           'X'},
  36         {"R0",          REGOFF(r0),     RINT,           'X'},
  37         /* R1 is SP */
  38         {"R2",          REGOFF(r2),     RINT,           'X'},
  39         {"R3",          REGOFF(r3),     RINT,           'X'},
  40         {"R4",          REGOFF(r4),     RINT,           'X'},
  41         {"R5",          REGOFF(r5),     RINT,           'X'},
  42         {"R6",          REGOFF(r6),     RINT,           'X'},
  43         {"R7",          REGOFF(r7),     RINT,           'X'},
  44         {"R8",          REGOFF(r8),     RINT,           'X'},
  45         {"R9",          REGOFF(r9),     RINT,           'X'},
  46         {"R10",         REGOFF(r10),    RINT,           'X'},
  47         {"R11",         REGOFF(r11),    RINT,           'X'},
  48         {"R12",         REGOFF(r12),    RINT,           'X'},
  49         {"R13",         REGOFF(r13),    RINT,           'X'},
  50         {"R14",         REGOFF(r14),    RINT,           'X'},
  51         {"R15",         REGOFF(r15),    RINT,           'X'},
  52         {"R16",         REGOFF(r16),    RINT,           'X'},
  53         {"R17",         REGOFF(r17),    RINT,           'X'},
  54         {"R18",         REGOFF(r18),    RINT,           'X'},
  55         {"R19",         REGOFF(r19),    RINT,           'X'},
  56         {"R20",         REGOFF(r20),    RINT,           'X'},
  57         {"R21",         REGOFF(r21),    RINT,           'X'},
  58         {"R22",         REGOFF(r22),    RINT,           'X'},
  59         {"R23",         REGOFF(r23),    RINT,           'X'},
  60         {"R24",         REGOFF(r24),    RINT,           'X'},
  61         {"R25",         REGOFF(r25),    RINT,           'X'},
  62         {"R26",         REGOFF(r26),    RINT,           'X'},
  63         {"R27",         REGOFF(r27),    RINT,           'X'},
  64         {"R28",         REGOFF(r28),    RINT,           'X'},
  65         {"R29",         REGOFF(r29),    RINT,           'X'},
  66         {"R30",         REGOFF(r30),    RINT,           'X'},
  67         {"R31",         REGOFF(r31),    RINT,           'X'},
  68         {"F0",          FP_REG(0),      RFLT,           'F'},
  69         {"F1",          FP_REG(1),      RFLT,           'F'},
  70         {"F2",          FP_REG(2),      RFLT,           'F'},
  71         {"F3",          FP_REG(3),      RFLT,           'F'},
  72         {"F4",          FP_REG(4),      RFLT,           'F'},
  73         {"F5",          FP_REG(5),      RFLT,           'F'},
  74         {"F6",          FP_REG(6),      RFLT,           'F'},
  75         {"F7",          FP_REG(7),      RFLT,           'F'},
  76         {"F8",          FP_REG(8),      RFLT,           'F'},
  77         {"F9",          FP_REG(9),      RFLT,           'F'},
  78         {"F10",         FP_REG(10),     RFLT,           'F'},
  79         {"F11",         FP_REG(11),     RFLT,           'F'},
  80         {"F12",         FP_REG(12),     RFLT,           'F'},
  81         {"F13",         FP_REG(13),     RFLT,           'F'},
  82         {"F14",         FP_REG(14),     RFLT,           'F'},
  83         {"F15",         FP_REG(15),     RFLT,           'F'},
  84         {"F16",         FP_REG(16),     RFLT,           'F'},
  85         {"F17",         FP_REG(17),     RFLT,           'F'},
  86         {"F18",         FP_REG(18),     RFLT,           'F'},
  87         {"F19",         FP_REG(19),     RFLT,           'F'},
  88         {"F20",         FP_REG(20),     RFLT,           'F'},
  89         {"F21",         FP_REG(21),     RFLT,           'F'},
  90         {"F22",         FP_REG(22),     RFLT,           'F'},
  91         {"F23",         FP_REG(23),     RFLT,           'F'},
  92         {"F24",         FP_REG(24),     RFLT,           'F'},
  93         {"F25",         FP_REG(25),     RFLT,           'F'},
  94         {"F26",         FP_REG(26),     RFLT,           'F'},
  95         {"F27",         FP_REG(27),     RFLT,           'F'},
  96         {"F28",         FP_REG(28),     RFLT,           'F'},
  97         {"F29",         FP_REG(29),     RFLT,           'F'},
  98         {"F30",         FP_REG(30),     RFLT,           'F'},
  99         {"F31",         FP_REG(31),     RFLT,           'F'},
 100         {"FPSCR",       FP_REG(32)+4,   RFLT,           'X'},
 101         {  0 }
 102 };
 103
 104         /* the machine description */
 105 Mach mpower =
 106 {
 107         "power",
 108         MPOWER,         /* machine type */
 109         powerreglist,   /* register set */
 110         REGSIZE,        /* number of bytes in register set */
 111         FPREGSIZE,      /* number of bytes in FP register set */
 112         "PC",           /* name of PC */
 113         "SP",           /* name of SP */
 114         "LR",           /* name of link register */
 115         "setSB",        /* static base register name */
 116         0,              /* value */
 117         0x100000,       /* page size */
 118         0x80000000ULL,  /* kernel base */
 119         0xF0000000ULL,  /* kernel text mask */
 120         0x7FFFFFFFULL,  /* user stack top */
 121         4,              /* quantization of pc */
 122         4,              /* szaddr */
 123         4,              /* szreg */
 124         4,              /* szfloat */
 125         8,              /* szdouble */
 126 };