16 Afcdefault = 0xF830A1,
17 // Hsburst = 37, /* from original linux driver */
29 /* USB vendor requests */
33 /* device registers */
97 Adall = Ad10h|Ad10f|Ad100h|Ad100f,
105 wr(Dev *d, int reg, int val)
109 ret = usbcmd(d, Rh2d|Rvendor|Rdev, Writereg, 0, reg,
110 (uchar*)&val, sizeof(val));
112 fprint(2, "%s: wr(%x, %x): %r", argv0, reg, val);
121 ret = usbcmd(d, Rd2h|Rvendor|Rdev, Readreg, 0, reg,
122 (uchar*)&rval, sizeof(rval));
124 fprint(2, "%s: rr(%x): %r", argv0, reg);
131 miird(Dev *d, int idx)
133 while(rr(d, MIIaddr) & MIIbusy)
135 wr(d, MIIaddr, PHYinternal<<11 | idx<<6 | MIIread);
136 while(rr(d, MIIaddr) & MIIbusy)
138 return rr(d, MIIdata);
142 miiwr(Dev *d, int idx, int val)
144 while(rr(d, MIIaddr) & MIIbusy)
147 wr(d, MIIaddr, PHYinternal<<11 | idx<<6 | MIIwrite);
148 while(rr(d, MIIaddr) & MIIbusy)
153 eepromr(Dev *d, int off, uchar *buf, int len)
157 for(i = 0; i < E2pbusytime; i++)
158 if((rr(d, E2pcmd) & Busy) == 0)
162 for(i = 0; i < len; i++){
163 wr(d, E2pcmd, Busy|Read|(i+off));
164 while((v = rr(d, E2pcmd) & (Busy|Timeout)) == Busy)
168 buf[i] = rr(d, E2pdata);
178 miiwr(d, Bmcr, Bmcrreset|Anenable);
179 for(i = 0; i < Resettime/10; i++){
180 if((miird(d, Bmcr) & Bmcrreset) == 0)
184 miiwr(d, Advertise, Adcsma|Adall|Adpause|Adpauseasym);
185 // miiwr(d, Advertise, Adcsma|Ad10f|Ad10h|Adpause|Adpauseasym);
187 miiwr(d, Phyintmask, Anegcomp|Linkdown);
188 miiwr(d, Bmcr, miird(d, Bmcr)|Anenable|Anrestart);
193 doreset(Dev *d, int reg, int bit)
197 if(wr(d, reg, bit) < 0)
199 for(i = 0; i < Resettime/10; i++){
200 if((rr(d, reg) & bit) == 0)
215 b = allocb(Hsburst*512);
217 b = allocb(Maxpkt+4);
218 if((n = read(ep->dfd, b->wp, b->lim - b->base)) < 0){
229 if((hd & Rxerror) == 0){
234 etheriq(copyblock(b, n));
236 b->rp += (n + 3) & ~3;
243 smsctransmit(Dev *ep, Block *b)
249 PUT4(b->rp, n | Txfirst | Txlast);
251 write(ep->dfd, b->rp, BLEN(b));
256 smscpromiscuous(Dev *d, int on)
260 rxctl = rr(d, Maccr);
265 return wr(d, Maccr, rxctl);
269 smscmulticast(Dev *d, uchar *, int)
273 rxctl = rr(d, Maccr);
278 return wr(d, Maccr, rxctl);
284 if(!doreset(d, Hwcfg, Lrst) || !doreset(d, Pmctrl, Phyrst))
287 if(eepromr(d, MACoffset, macaddr, Eaddrlen) < 0)
289 wr(d, Addrl, GET4(macaddr));
290 wr(d, Addrh, GET2(macaddr+4));
292 wr(d, Hwcfg, (rr(d,Hwcfg)&~Rxdoff)|Bir|Mef|Bce);
293 wr(d, Burstcap, Hsburst);
295 wr(d, Hwcfg, (rr(d,Hwcfg)&~(Rxdoff|Mef|Bce))|Bir);
298 wr(d, Bulkdelay, Defbulkdly);
300 wr(d, Ledgpio, Ledspd|Ledlnk|Ledfdx);
302 wr(d, Afccfg, Afcdefault);
303 wr(d, Vlan1, Ethp8021q);
304 wr(d, Coecr, rr(d,Coecr)&~(Txcoe|Rxcoe)); /* TODO could offload checksums? */
308 wr(d, Maccr, rr(d,Maccr)&~(Prms|Mcpas|Hpfilt));
312 wr(d, Intepctl, rr(d, Intepctl)|Phyint);
313 wr(d, Maccr, rr(d, Maccr)|Txen|Rxen);
316 eptransmit = smsctransmit;
317 epreceive = smscreceive;
318 eppromiscuous = smscpromiscuous;
319 epmulticast = smscmulticast;