37 { add, "add", Iarith },
38 { and, "and", Iarith },
40 { xor, "xor", Iarith },
41 { sub, "sub", Iarith },
42 { andn, "andn", Iarith },
44 { xnor, "xnor", Iarith },
45 { addx, "addx", Iarith },
53 { addcc, "addcc", Iarith },
54 { andcc, "andcc", Iarith },
55 { orcc, "orcc", Iarith },
56 { xorcc, "xorcc", Iarith },
57 { subcc, "subcc", Iarith },
58 { andncc, "andncc",Iarith },
59 { orncc, "orncc", Iarith },
60 { xnorcc, "xnorcc",Iarith },
61 { addxcc, "addxcc",Iarith },
73 { mulscc, "mulscc", Iarith },
74 { sll, "sll", Iarith },
75 { srl, "srl", Iarith },
76 { sra, "sra", Iarith },
89 { farith, "farith", Ifloat },
90 { fcmp, "fcmp", Ifloat },
93 { jmpl, "jmpl", Ibranch },
95 { ta, "ta", Isyscall },
123 { ldub, "ldub", Iload },
124 { lduh, "lduh", Iload },
125 { ldd, "ldd", Iload },
126 { st, "st", Istore },
127 { stb, "stb", Istore },
128 { sth, "sth", Istore },
129 { std, "std", Istore },
131 { ldsb, "ldsb", Iload },
132 { ldsh, "ldsh", Iload },
135 { ldstub, "ldstub", Iload },
137 { swap, "swap", Iload },
154 { ldf, "ldf", Ifloat },
157 { lddf, "lddf", Ifloat },
158 { stf, "stf", Ifloat },
161 { stdf, "stdf", Ifloat },
197 { bicc, "bicc", Ibranch },
199 { sethi, "sethi",Iarith },
201 { fbcc, "fbcc", Ibranch },
203 /* This is a fake and connot be reached by op0 decode */
204 { call, "call", Ibranch },
215 reg.ir = ifetch(reg.pc);
218 ci = &op0[(reg.ir>>22)&0x07];
228 ci = &op2[(reg.ir>>19)&0x3f];
233 ci = &op3[(reg.ir>>19)&0x3f];
240 brkchk(reg.pc, Instruction);
249 ir = getmem_4(reg.pc+4);
255 if(((ir>>20)&0x1f) == 0x1a) /* floating point */
258 if(rd == ((ir>>14)&0x1f)) {
280 ci = &op0[(reg.ir>>22)&0x07];
290 ci = &op2[(reg.ir>>19)&0x3f];
298 ci = &op3[(reg.ir>>19)&0x3f];
311 /* Bprint(bioout, "op=%d op2=%d op3=%d\n", ir>>30, (ir>>21)&0x7, (ir>>19)&0x3f); */
312 Bprint(bioout, "illegal_instruction IR #%.8lux\n", ir);
326 itrace("sub\tr%d,#0x%x,r%d", rs1, v, rd);
331 itrace("sub\tr%d,r%d,r%d", rs1, rs2, rd);
333 reg.r[rd] = reg.r[rs1] - v;
346 itrace("sll\tr%d,#0x%x,r%d", rs1, v, rd);
351 itrace("sll\tr%d,r%d,r%d", rs1, rs2, rd);
353 reg.r[rd] = reg.r[rs1] << v;
366 itrace("srl\tr%d,#0x%x,r%d", rs1, v, rd);
371 itrace("srl\tr%d,r%d,r%d", rs1, rs2, rd);
373 reg.r[rd] = (ulong)reg.r[rs1] >> v;
386 itrace("sra\tr%d,#0x%x,r%d", rs1, v, rd);
391 itrace("sra\tr%d,r%d,r%d", rs1, rs2, rd);
393 if(reg.r[rs1]&SIGNBIT)
394 reg.r[rd] = reg.r[rs1]>>v | ~((1<<(32-v))-1);
396 reg.r[rd] = reg.r[rs1]>>v;
403 int b31rs1, b31op2, b31res, r, rd, rs1, rs2;
409 itrace("subcc\tr%d,#0x%x,r%d", rs1, v, rd);
414 itrace("subcc\tr%d,r%d,r%d", rs1, rs2, rd);
417 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
423 b31rs1 = reg.r[rs1]>>31;
427 if((b31rs1 & ~b31op2 & ~b31res)|(~b31rs1 & b31op2 & b31res))
430 if((~b31rs1 & b31op2)|(b31res & (~b31rs1|b31op2)))
447 itrace("add\tr%d,#0x%x,r%d", rs1, v, rd);
452 itrace("add\tr%d,r%d,r%d", rs1, rs2, rd);
454 reg.r[rd] = reg.r[rs1] + v;
461 int rd, rs1, rs2, b31rs1, b31op2, b31r;
467 itrace("addcc\tr%d,#0x%x,r%d", rs1, v, rd);
472 itrace("addcc\tr%d,r%d,r%d", rs1, rs2, rd);
475 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
481 b31rs1 = reg.r[rs1]>>31;
484 if((b31rs1 & b31op2 & ~b31r)|(~b31rs1 & ~b31op2 & b31r))
486 if((b31rs1 & b31op2) | (~b31r & (b31rs1 | b31op2)))
502 itrace("addx\tr%d,#0x%x,r%d", rs1, v, rd);
507 itrace("addx\tr%d,r%d,r%d", rs1, rs2, rd);
511 reg.r[rd] = reg.r[rs1] + v;
518 int rd, rs1, rs2, b31rs1, b31op2, b31r;
524 itrace("addxcc\tr%d,#0x%x,r%d", rs1, v, rd);
529 itrace("addxcc\tr%d,r%d,r%d", rs1, rs2, rd);
535 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
541 b31rs1 = reg.r[rs1]>>31;
544 if((b31rs1 & b31op2 & ~b31r)|(~b31rs1 & ~b31op2 & b31r))
546 if((b31rs1 & b31op2) | (~b31r & (b31rs1 | b31op2)))
564 itrace("wry\tr%d,#0x%x,Y", rs1, v);
569 itrace("wry\tr%d,r%d,Y", rs1, rs2);
571 reg.Y = reg.r[rs1] + v;
585 itrace("rdy\tY,r%d", rd);
600 itrace("and\tr%d,#0x%x,r%d", rs1, v, rd);
605 itrace("and\tr%d,r%d,r%d", rs1, rs2, rd);
607 reg.r[rd] = reg.r[rs1] & v;
620 itrace("andcc\tr%d,#0x%x,r%d", rs1, v, rd);
625 itrace("andcc\tr%d,r%d,r%d", rs1, rs2, rd);
628 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
647 itrace("orcc\tr%d,#0x%x,r%d", rs1, v, rd);
652 itrace("orcc\tr%d,r%d,r%d", rs1, rs2, rd);
655 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
667 int b, n, v, rd, rs1, rs2;
668 long o1, o2, r, b31o1, b31o2, b31r;
674 itrace("mulscc\tr%d,#0x%x,r%d", rs1, o2, rd);
679 itrace("mulscc\tr%d,r%d,r%d", rs1, rs2, rd);
682 n = reg.psr&PSR_n ? 1 : 0;
683 v = reg.psr&PSR_v ? 1 : 0;
690 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
699 if((b31o1 & b31o2 & ~b31r) | (~b31o1 & ~b31o2 & b31r))
701 if((b31o1 & b31o2) | (~b31r & (b31o1 | b31o2)))
705 reg.Y = (reg.Y>>1)|(b<<31);
719 itrace("or\tr%d,#0x%x,r%d", rs1, v, rd);
724 itrace("or\tr%d,r%d,r%d", rs1, rs2, rd);
726 reg.r[rd] = reg.r[rs1] | v;
739 itrace("xor\tr%d,#0x%x,r%d", rs1, v, rd);
744 itrace("xor\tr%d,r%d,r%d", rs1, rs2, rd);
746 reg.r[rd] = reg.r[rs1] ^ v;
759 itrace("xorcc\tr%d,#0x%x,r%d", rs1, v, rd);
764 itrace("xorcc\tr%d,r%d,r%d", rs1, rs2, rd);
767 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
786 itrace("andn\tr%d,#0x%x,r%d", rs1, v, rd);
791 itrace("andn\tr%d,r%d,r%d", rs1, rs2, rd);
793 reg.r[rd] = reg.r[rs1] & ~v;
806 itrace("andncc\tr%d,#0x%x,r%d", rs1, v, rd);
811 itrace("andncc\tr%d,r%d,r%d", rs1, rs2, rd);
814 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
830 if(rd == 0 && rs1 == 0) /* ken used orn r0,r0,r0 as nop */
836 itrace("orn\tr%d,#0x%x,r%d", rs1, v, rd);
841 itrace("orn\tr%d,r%d,r%d", rs1, rs2, rd);
843 reg.r[rd] = reg.r[rs1] | ~v;
856 itrace("orncc\tr%d,#0x%x,r%d", rs1, v, rd);
861 itrace("orncc\tr%d,r%d,r%d", rs1, rs2, rd);
864 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
883 itrace("xnor\tr%d,#0x%x,r%d", rs1, v, rd);
888 itrace("xnor\tr%d,r%d,r%d", rs1, rs2, rd);
890 reg.r[rd] = reg.r[rs1] ^ ~v;
903 itrace("xnorcc\tr%d,#0x%x,r%d", rs1, v, rd);
908 itrace("xnorcc\tr%d,r%d,r%d", rs1, rs2, rd);
911 reg.psr &= ~(PSR_z|PSR_n|PSR_c|PSR_v);
930 itrace("st\tr%d,0x%lux(r%d) %lux=%lux",
931 rd, ea, rs1, ea+reg.r[rs1], reg.r[rd]);
935 ea = reg.r[rs1] + reg.r[rs2];
937 itrace("st\tr%d,[r%d+r%d] %lux=%lux",
938 rd, rs1, rs2, ea, reg.r[rd]);
941 putmem_w(ea, reg.r[rd]);
954 itrace("std\tr%d,0x%lux(r%d) %lux=%lux",
955 rd, ea, rs1, ea+reg.r[rs1], reg.r[rd]);
959 ea = reg.r[rs1] + reg.r[rs2];
961 itrace("std\tr%d,[r%d+r%d] %lux=%lux",
962 rd, rs1, rs2, ea, reg.r[rd]);
965 putmem_w(ea, reg.r[rd]);
966 putmem_w(ea+4, reg.r[rd+1]);
979 itrace("stb\tr%d,0x%lux(r%d) %lux=%lux",
980 rd, ea, rs1, ea+reg.r[rs1], reg.r[rd]&0xff);
984 ea = reg.r[rs1] + reg.r[rs2];
986 itrace("stb\tr%d,[r%d+r%d] %lux=%lux",
987 rd, rs1, rs2, ea, reg.r[rd]&0xff);
990 putmem_b(ea, reg.r[rd]);
1003 itrace("sth\tr%d,0x%lux(r%d) %lux=%lux",
1004 rd, ea, rs1, ea+reg.r[rs1], reg.r[rd]&0xffff);
1008 ea = reg.r[rs1] + reg.r[rs2];
1010 itrace("sth\tr%d,[r%d+r%d] %lux=%lux",
1011 rd, rs1, rs2, ea, reg.r[rd]&0xffff);
1014 putmem_h(ea, reg.r[rd]);
1027 itrace("ld\tr%d,0x%lux(r%d) ea=%lux",rd, ea, rs1, ea+reg.r[rs1]);
1031 ea = reg.r[rs1] + reg.r[rs2];
1033 itrace("ld\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1036 reg.r[rd] = getmem_w(ea);
1050 itrace("swap\tr%d,0x%lux(r%d) ea=%lux",
1051 rd, ea, rs1, ea+reg.r[rs1]);
1055 ea = reg.r[rs1] + reg.r[rs2];
1057 itrace("swap\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1061 reg.r[rd] = getmem_w(ea);
1075 itrace("ldd\tr%d,0x%lux(r%d) ea=%lux",rd, ea, rs1, ea+reg.r[rs1]);
1079 ea = reg.r[rs1] + reg.r[rs2];
1081 itrace("ldd\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1084 reg.r[rd] = getmem_w(ea);
1085 reg.r[rd+1] = getmem_w(ea+4);
1098 itrace("ldub\tr%d,0x%lux(r%d) ea=%lux",
1099 rd, ea, rs1, ea+reg.r[rs1]);
1103 ea = reg.r[rs1] + reg.r[rs2];
1105 itrace("ldub\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1108 reg.r[rd] = getmem_b(ea) & 0xff;
1122 itrace("ldstub\tr%d,0x%lux(r%d) ea=%lux",
1123 rd, ea, rs1, ea+reg.r[rs1]);
1127 ea = reg.r[rs1] + reg.r[rs2];
1129 itrace("ldstub\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1132 reg.r[rd] = getmem_b(ea) & 0xff;
1146 itrace("ldsb\tr%d,0x%lux(r%d) ea=%lux",
1147 rd, ea, rs1, ea+reg.r[rs1]);
1151 ea = reg.r[rs1] + reg.r[rs2];
1153 itrace("ldsb\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1156 reg.r[rd] = (schar)getmem_b(ea);
1170 itrace("lduh\tr%d,0x%lux(r%d) ea=%lux",
1171 rd, ea, rs1, ea+reg.r[rs1]);
1175 ea = reg.r[rs1] + reg.r[rs2];
1177 itrace("lduh\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1180 reg.r[rd] = getmem_h(ea) & 0xffff;
1194 itrace("ldsh\tr%d,0x%lux(r%d) ea=%lux",
1195 rd, ea, rs1, ea+reg.r[rs1]);
1199 ea = reg.r[rs1] + reg.r[rs2];
1201 itrace("ldsh\tr%d,[r%d+r%d] ea=%lux", rd, rs1, rs2, ea);
1204 reg.r[rd] = (short)getmem_h(ea);
1215 v = (ir&0x3FFFFF)<<10;
1221 itrace("sethi\t0x%lux,r%d", v, rd);
1232 npc = (ir<<2) + reg.pc;
1234 itrace("call\t%lux", npc);
1238 reg.ir = ifetch(reg.pc+4);
1242 findsym(npc, CTEXT, &s);
1243 Bprint(bioout, "%8lux %s(", reg.pc, s.name);
1244 printparams(&s, reg.r[1]);
1245 Bprint(bioout, "from ");
1246 printsource(reg.pc);
1247 Bputc(bioout, '\n');
1265 itrace("jmpl\t0x%lux(r%d),r%d", ea, rs1, rd);
1268 if(calltree && rd == 0 && o == 8) {
1269 findsym(ea-4, CTEXT, &s);
1270 Bprint(bioout, "%8lux return to %lux %s r7=%lux\n",
1271 reg.pc, ea-4, s.name, reg.r[7]);
1275 ea = reg.r[rs1] + reg.r[rs2];
1277 itrace("jmpl\t[r%d+r%d],r%d", rs1, rs2, rd);
1282 reg.ir = ifetch(reg.pc+4);
1291 ulong npc, anul, ba;
1292 int takeit, z, v, n, c;
1296 switch((ir>>25)&0x0F) {
1303 takeit = reg.psr&PSR_z;
1307 z = reg.psr&PSR_z ? 1 : 0;
1308 v = reg.psr&PSR_v ? 1 : 0;
1309 n = reg.psr&PSR_n ? 1 : 0;
1310 takeit = z | (n ^ v);
1314 v = reg.psr&PSR_v ? 1 : 0;
1315 n = reg.psr&PSR_n ? 1 : 0;
1320 z = reg.psr&PSR_z ? 1 : 0;
1321 c = reg.psr&PSR_c ? 1 : 0;
1326 takeit = reg.psr&PSR_c;
1330 takeit = reg.psr&PSR_n;
1334 takeit = reg.psr&PSR_v;
1343 takeit = !(reg.psr&PSR_z);
1347 z = reg.psr&PSR_z ? 1 : 0;
1348 v = reg.psr&PSR_v ? 1 : 0;
1349 n = reg.psr&PSR_n ? 1 : 0;
1350 takeit = !(z | (n ^ v));
1354 v = reg.psr&PSR_v ? 1 : 0;
1355 n = reg.psr&PSR_n ? 1 : 0;
1360 z = reg.psr&PSR_z ? 1 : 0;
1361 c = reg.psr&PSR_c ? 1 : 0;
1366 takeit = !(reg.psr&PSR_c);
1370 takeit = !(reg.psr&PSR_n);
1374 takeit = !(reg.psr&PSR_v);
1378 npc = ir & 0x3FFFFF;
1380 npc |= ~((1<<22)-1);
1381 npc = (npc<<2) + reg.pc;
1386 itrace("%s,a\t%lux", op, npc);
1388 itrace("%s\t%lux", op, npc);
1394 reg.ir = ifetch(reg.pc);
1408 reg.ir = ifetch(reg.pc+4);