sys/src/cmd/aux/vga/s3928.c

   1 #include <u.h>
   2 #include <libc.h>
   3 #include <bio.h>
   4
   5 #include "pci.h"
   6 #include "vga.h"
   7
   8 /*
   9  * S3 86C928 GUI Accelerator.
  10  */
  11 static void
  12 snarf(Vga* vga, Ctlr* ctlr)
  13 {
  14         s3generic.snarf(vga, ctlr);
  15 }
  16
  17 static void
  18 options(Vga*, Ctlr* ctlr)
  19 {
  20         ctlr->flag |= Hlinear|Henhanced|Foptions;
  21 }
  22
  23 static void
  24 init(Vga* vga, Ctlr* ctlr)
  25 {
  26         Mode *mode;
  27         ulong x;
  28
  29         /*
  30          * s3generic.init() will perform the same test.
  31          * We need to do it here too so that the Crt registers
  32          * will be correct when s3generic.init() calculates
  33          * the overflow bits.
  34          */
  35         if(vga->mode->z > 8)
  36                 error("depth %d not supported\n", vga->mode->z);
  37
  38         mode = vga->mode;
  39         if((ctlr->flag & Henhanced) && mode->x >= 1024 && mode->z == 8){
  40                 resyncinit(vga, ctlr, Uenhanced, 0);
  41                 vga->crt[0x00] = ((mode->ht/4)>>3)-5;
  42                 vga->crt[0x01] = ((mode->x/4)>>3)-1;
  43                 vga->crt[0x02] = ((mode->shb/4)>>3)-1;
  44
  45                 x = (mode->ehb/4)>>3;
  46                 vga->crt[0x03] = 0x80|(x & 0x1F);
  47                 vga->crt[0x04] = (mode->shs/4)>>3;
  48                 vga->crt[0x05] = ((mode->ehs/4)>>3) & 0x1F;
  49                 if(x & 0x20)
  50                         vga->crt[0x05] |= 0x80;
  51
  52                 vga->crt[0x13] = mode->x/8;
  53                 if(mode->z == 1)
  54                         vga->crt[0x13] /= 8;
  55         }
  56         s3generic.init(vga, ctlr);
  57         vga->crt[0x3B] = (vga->crt[0]+vga->crt[4]+1)/2;
  58
  59         /*
  60          * Set up write-posting and read-ahead-cache.
  61          */
  62         vga->crt[0x54] = 0xA7;
  63         if(ctlr->flag & Uenhanced){
  64                 vga->crt[0x58] |= 0x04;
  65                 vga->crt[0x40] |= 0x08;
  66         }
  67         else{
  68                 vga->crt[0x58] &= ~0x04;
  69                 vga->crt[0x40] &= ~0x08;
  70         }
  71
  72         /*
  73          * Set up parallel VRAM and the external
  74          * SID enable on the 86C928
  75          */
  76         vga->crt[0x53] &= ~0x20;                        /* parallel VRAM */
  77         vga->crt[0x55] &= ~0x48;                        /* external SID */
  78         vga->crt[0x65] &= ~0x60;                        /* 2 86C928 E-step chip bugs */
  79         if(ctlr->flag & Uenhanced){
  80                 if(vga->ramdac->flag & Hpvram)
  81                         vga->crt[0x53] |= 0x20;
  82                 if(vga->ramdac->flag & Hextsid)
  83                         vga->crt[0x55] |= 0x48;
  84                 vga->crt[0x65] |= 0x60;
  85         }
  86 }
  87
  88 static void
  89 load(Vga* vga, Ctlr* ctlr)
  90 {
  91         ushort advfunc;
  92
  93         (*s3generic.load)(vga, ctlr);
  94         vgaxo(Crtx, 0x65, vga->crt[0x65]);
  95
  96         advfunc = 0x0000;
  97         if(ctlr->flag & Uenhanced){
  98                 if(vga->mode->x == 1024 || vga->mode->x == 800)
  99                         advfunc = 0x0057;
 100                 else
 101                         advfunc = 0x0053;
 102         }
 103         outportw(0x4AE8, advfunc);
 104 }
 105
 106 static void
 107 dump(Vga* vga, Ctlr* ctlr)
 108 {
 109         (*s3generic.dump)(vga, ctlr);
 110 }
 111
 112 Ctlr s3928 = {
 113         "s3928",                        /* name */
 114         snarf,                          /* snarf */
 115         options,                        /* options */
 116         init,                           /* init */
 117         load,                           /* load */
 118         dump,                           /* dump */
 119 };