20 * calculate addressability as follows
23 * REGISTER ==> 11 register
24 * INDREG ==> 12 *[(reg)+offset]
26 * ADD(2, 20) ==> 2 $name+offset
27 * ADD(3, 20) ==> 3 $(reg)+offset
28 * &12 ==> 3 $(reg)+offset
31 * *3 ==> 12 *(reg)+offset
32 * calculate complexity (number of registers)
84 if(l->addable == 20) {
90 if(r->addable == 20) {
106 r->type = types[TINT];
112 if(typev[n->type->etype]){
113 /* try to lift 32->64 bit cast */
114 if(typev[l->type->etype] && l->op == OCAST && typeil[l->left->type->etype]
115 && typeu[n->type->etype] == typeu[l->left->type->etype])
117 if(typev[r->type->etype] && r->op == OCAST && typeil[r->left->type->etype]
118 && typeu[n->type->etype] == typeu[r->left->type->etype])
121 if(typeil[l->type->etype] && typeil[r->type->etype]){
137 r->type = types[TINT];
146 r->type = types[TINT];
157 r->type = types[TINT];
168 r->type = types[TINT];
195 if(typeil[n->type->etype])
211 n->complex = l->complex;
213 if(r->complex == n->complex)
214 n->complex = r->complex+1;
216 if(r->complex > n->complex)
217 n->complex = r->complex;
237 * immediate operators, make const on right
239 if(l->op == OCONST) {