5 #define IO(t,x) ((t*)(KSEG1|((ulong)x)))
16 #define IRQISDN_ISAC 8
18 #define IRQISDN_HSCX 10
33 * Local Interrupt registers (INT2)
35 #define INT2_IP20 0x1fb801c0
36 #define INT2_IP22 0x1fbd9000
37 #define INT2_IP24 0x1fbd9880
39 #define INT2_BASE INT2_IP24 /* indy */
41 #define LIO_0_ISR (INT2_BASE+0x3)
42 #define LIO_0_MASK (INT2_BASE+0x7)
43 #define LIO_1_ISR (INT2_BASE+0xb)
44 #define LIO_1_MASK (INT2_BASE+0xf)
45 #define LIO_2_ISR (INT2_BASE+0x13)
46 #define LIO_2_MASK (INT2_BASE+0x17)
48 #define HPC3_ETHER 0x1fb80000
49 #define HPC3_KBDMS 0x1fbd9800
50 #define GIO_NEWPORT 0x1f0f0000 /* indy */
52 #define MEMCFG0 0x1fa000c4 /* mem. size config. reg. 0 (w, rw) */
53 #define MEMCFG1 0x1fa000cc /* mem. size config. reg. 1 (w, rw) */