1 typedef struct Mii Mii;
2 typedef struct MiiPhy MiiPhy;
5 Bmcr = 0x00, /* Basic Mode Control */
6 Bmsr = 0x01, /* Basic Mode Status */
7 Phyidr1 = 0x02, /* PHY Identifier #1 */
8 Phyidr2 = 0x03, /* PHY Identifier #2 */
9 Anar = 0x04, /* Auto-Negotiation Advertisement */
10 Anlpar = 0x05, /* AN Link Partner Ability */
11 Aner = 0x06, /* AN Expansion */
12 Annptr = 0x07, /* AN Next Page TX */
13 Annprr = 0x08, /* AN Next Page RX */
14 Mscr = 0x09, /* MASTER-SLAVE Control */
15 Mssr = 0x0A, /* MASTER-SLAVE Status */
16 Mmdctrl = 0x0D, /* MMD Access Control */
17 Mmddata = 0x0E, /* MMD Access Data Register */
18 Esr = 0x0F, /* Extended Status */
25 BmcrSs1 = 0x0040, /* Speed Select[1] */
26 BmcrCte = 0x0080, /* Collision Test Enable */
27 BmcrDm = 0x0100, /* Duplex Mode */
28 BmcrRan = 0x0200, /* Restart Auto-Negotiation */
29 BmcrI = 0x0400, /* Isolate */
30 BmcrPd = 0x0800, /* Power Down */
31 BmcrAne = 0x1000, /* Auto-Negotiation Enable */
32 BmcrSs0 = 0x2000, /* Speed Select[0] */
33 BmcrLe = 0x4000, /* Loopback Enable */
34 BmcrR = 0x8000, /* Reset */
38 BmsrEc = 0x0001, /* Extended Capability */
39 BmsrJd = 0x0002, /* Jabber Detect */
40 BmsrLs = 0x0004, /* Link Status */
41 BmsrAna = 0x0008, /* Auto-Negotiation Ability */
42 BmsrRf = 0x0010, /* Remote Fault */
43 BmsrAnc = 0x0020, /* Auto-Negotiation Complete */
44 BmsrPs = 0x0040, /* Preamble Suppression Capable */
45 BmsrEs = 0x0100, /* Extended Status */
46 Bmsr100T2HD = 0x0200, /* 100BASE-T2 HD Capable */
47 Bmsr100T2FD = 0x0400, /* 100BASE-T2 FD Capable */
48 Bmsr10THD = 0x0800, /* 10BASE-T HD Capable */
49 Bmsr10TFD = 0x1000, /* 10BASE-T FD Capable */
50 Bmsr100TXHD = 0x2000, /* 100BASE-TX HD Capable */
51 Bmsr100TXFD = 0x4000, /* 100BASE-TX FD Capable */
52 Bmsr100T4 = 0x8000, /* 100BASE-T4 Capable */
55 enum { /* Anar/Anlpar */
56 Ana10HD = 0x0020, /* Advertise 10BASE-T */
57 Ana10FD = 0x0040, /* Advertise 10BASE-T FD */
58 AnaTXHD = 0x0080, /* Advertise 100BASE-TX */
59 AnaTXFD = 0x0100, /* Advertise 100BASE-TX FD */
60 AnaT4 = 0x0200, /* Advertise 100BASE-T4 */
61 AnaP = 0x0400, /* Pause */
62 AnaAP = 0x0800, /* Asymmetrical Pause */
63 AnaRf = 0x2000, /* Remote Fault */
64 AnaAck = 0x4000, /* Acknowledge */
65 AnaNp = 0x8000, /* Next Page Indication */
69 Mscr1000THD = 0x0100, /* Advertise 1000BASE-T HD */
70 Mscr1000TFD = 0x0200, /* Advertise 1000BASE-T FD */
74 Mssr1000THD = 0x0400, /* Link Partner 1000BASE-T HD able */
75 Mssr1000TFD = 0x0800, /* Link Partner 1000BASE-T FD able */
79 Esr1000THD = 0x1000, /* 1000BASE-T HD Capable */
80 Esr1000TFD = 0x2000, /* 1000BASE-T FD Capable */
81 Esr1000XHD = 0x4000, /* 1000BASE-X HD Capable */
82 Esr1000XFD = 0x8000, /* 1000BASE-X FD Capable */
93 int (*mir)(Mii*, int, int);
94 int (*miw)(Mii*, int, int, int);
97 typedef struct MiiPhy {
114 extern int mii(Mii*, int);
115 extern int miiane(Mii*, int, int, int);
116 extern int miimir(Mii*, int);
117 extern int miimiw(Mii*, int, int);
118 extern int miireset(Mii*);
119 extern int miistatus(Mii*);
121 extern int miimmdr(Mii*, int, int);
122 extern int miimmdw(Mii*, int, int, int);