1 typedef struct BIOS32si BIOS32si;
2 typedef struct BIOS32ci BIOS32ci;
3 typedef struct Conf Conf;
4 typedef struct Confmem Confmem;
5 typedef union FPsave FPsave;
6 typedef struct Fxsave Fxsave;
7 typedef struct FPstate FPstate;
8 typedef struct ISAConf ISAConf;
9 typedef struct Label Label;
10 typedef struct Lock Lock;
11 typedef struct MMU MMU;
12 typedef struct Mach Mach;
13 typedef struct Notsave Notsave;
14 typedef struct PCArch PCArch;
15 typedef struct Pcidev Pcidev;
16 typedef struct PCMmap PCMmap;
17 typedef struct PCMslot PCMslot;
18 typedef struct Page Page;
19 typedef struct PMMU PMMU;
20 typedef struct Proc Proc;
21 typedef struct Segdesc Segdesc;
23 typedef struct Ureg Ureg;
24 typedef struct Vctl Vctl;
26 #pragma incomplete BIOS32si
27 #pragma incomplete Pcidev
28 #pragma incomplete Ureg
30 #define MAXSYSARG 5 /* for mount(fd, afd, mpt, flag, arg) */
33 * parameters for sysproc.c
35 #define AOUT_MAGIC (S_MAGIC)
64 /* the following is a bit that can be or'd into the state */
69 * the FP regs must be stored here, not somewhere pointed to from here.
70 * port code assumes this.
73 u16int fcw; /* x87 control word */
74 u16int fsw; /* x87 status word */
75 u8int ftw; /* x87 tag word */
77 u16int fop; /* last x87 opcode */
78 u64int rip; /* last x87 instruction pointer */
79 u64int rdp; /* last x87 data pointer */
80 u32int mxcsr; /* MMX control and status */
81 u32int mxcsrmask; /* supported MMX feature bits */
82 uchar st[128]; /* shared 64-bit media and x87 regs */
83 uchar xmm[256]; /* 128-bit media regs */
84 uchar ign[96]; /* reserved, ignored */
102 ulong nmach; /* processors */
103 ulong nproc; /* processes */
104 ulong monitor; /* has monitor? */
105 Confmem mem[16]; /* physical memory */
106 ulong npage; /* total physical pages of memory */
107 ulong upages; /* user page pool */
108 ulong nimage; /* number of page cache image headers */
109 ulong nswap; /* number of swap pages */
110 int nswppo; /* max # of pageouts per segment pass */
111 ulong copymode; /* 0 is copy on write, 1 is copy on reference */
112 ulong ialloc; /* max interrupt time allocation in bytes */
113 ulong pipeqsize; /* size in bytes of pipe queues */
114 int nuart; /* number of uart devices */
124 * MMU structure for PDP, PD, PT pages.
150 * things saved in the Proc structure during a notify
159 #include "../port/portdat.h"
174 int machno; /* physical id of processor (KNOWN TO ASSEMBLY) */
175 uintptr splpc; /* pc of last caller to splhi (KNOWN TO ASSEMBLY) */
177 Proc* proc; /* current process on this processor (KNOWN TO ASSEMBLY) */
179 u64int* pml4; /* pml4 base for this processor (va) */
180 Tss* tss; /* tss for this processor */
181 Segdesc *gdt; /* gdt for this processor */
183 u64int mmumap[4]; /* bitmap of pml4 entries for zapping */
184 MMU* mmufree; /* freelist for MMU structures */
185 ulong mmucount; /* number of MMU structures in freelist */
187 ulong ticks; /* of the clock since boot time */
188 Label sched; /* scheduler wakeup */
189 Lock alarmlock; /* access to alarm list */
190 void* alarm; /* alarms bound to this clock */
193 Proc* readied; /* for runproc */
194 ulong schedticks; /* next forced context switch */
203 int flushmmu; /* make current proc flush it's mmu state */
205 Perf perf; /* performance counters */
213 uvlong cyclefreq; /* Frequency of user readable cycle counter */
231 #define VA(k) ((void*)k)
236 int machs; /* bitmap of active CPUs */
237 int exiting; /* shutdown */
238 int ispanic; /* shutdown in response to a panic */
239 int thunderbirdsarego; /* lets the added processors continue to schedinit */
243 * routines for things outside the PC model, like power management
248 int (*ident)(void); /* this should be in the model */
249 void (*reset)(void); /* this should be in the model */
250 int (*serialpower)(int); /* 1 == on, 0 == off */
251 int (*modempower)(int); /* 1 == on, 0 == off */
253 void (*intrinit)(void);
254 int (*intrenable)(Vctl*);
255 int (*intrvecno)(int);
256 int (*intrdisable)(int);
257 void (*introff)(void);
258 void (*intron)(void);
260 void (*clockenable)(void);
261 uvlong (*fastclock)(uvlong*);
262 void (*timerset)(uvlong);
265 /* cpuid instruction result register bits */
272 Vmex = 1<<1, /* virtual-mode extensions */
273 Pse = 1<<3, /* page size extensions */
274 Tsc = 1<<4, /* time-stamp counter */
275 Cpumsr = 1<<5, /* model-specific registers, rdmsr/wrmsr */
276 Pae = 1<<6, /* physical-addr extensions */
277 Mce = 1<<7, /* machine-check exception */
280 Mtrr = 1<<12, /* memory-type range regs. */
281 Pge = 1<<13, /* page global extension */
282 Mca = 1<<14, /* machine-check architecture */
283 Pse2 = 1<<17, /* more page size extensions */
285 Acpif = 1<<22, /* therm control msr */
287 Fxsr = 1<<24, /* have SSE FXSAVE/FXRSTOR */
288 Sse = 1<<25, /* thus sfence instr. */
289 Sse2 = 1<<26, /* thus mfence & lfence instr.s */
290 Rdrnd = 1<<30, /* RDRAND support bit */
294 PerfEvtbase = 0xc0010000, /* Performance Event Select */
295 PerfCtrbase = 0xc0010004, /* Performance Counters */
297 Efer = 0xc0000080, /* Extended Feature Enable */
298 Star = 0xc0000081, /* Legacy Target IP and [CS]S */
299 Lstar = 0xc0000082, /* Long Mode Target IP */
300 Cstar = 0xc0000083, /* Compatibility Target IP */
301 Sfmask = 0xc0000084, /* SYSCALL Flags Mask */
302 FSbase = 0xc0000100, /* 64-bit FS Base Address */
303 GSbase = 0xc0000101, /* 64-bit GS Base Address */
304 KernelGSbase = 0xc0000102, /* SWAPGS instruction */
308 * a parsed plan9.ini line
325 extern PCArch *arch; /* PC architecture */
327 Mach* machp[MAXMACH];
329 #define MACHP(n) (machp[n])
331 extern register Mach* m; /* R15 */
332 extern register Proc* up; /* R14 */
335 * hardware info about a device
344 ulong intnum; /* interrupt number */
345 char *type; /* card type, malloced */
346 int nports; /* Number of ports */
347 Devport *ports; /* The ports themselves */
350 typedef struct BIOS32ci { /* BIOS32 Calling Interface */