2 * USB Universal Host Controller Interface (sic) driver.
5 * - Too many delays and ilocks.
6 * - bandwidth admission control must be done per-frame.
7 * - interrupt endpoints should go on a tree like [oe]hci.
8 * - must warn of power overruns.
12 #include "../port/lib.h"
17 #include "../port/error.h"
18 #include "../port/usb.h"
20 typedef struct Ctlio Ctlio;
21 typedef struct Ctlr Ctlr;
22 typedef struct Isoio Isoio;
24 typedef struct Qhpool Qhpool;
25 typedef struct Qio Qio;
27 typedef struct Tdpool Tdpool;
31 Resetdelay = 100, /* delay after a controller reset (ms) */
32 Enabledelay = 100, /* waiting for a port to enable */
33 Abortdelay = 5, /* delay after cancelling Tds (ms) */
34 Incr = 64, /* for Td and Qh pools */
36 Tdatomic = 8, /* max nb. of Tds per bulk I/O op. */
38 /* Queue states (software) */
50 Nframes = 1024, /* 2ⁿ for xspanalloc; max 1024 */
51 Align = 16, /* for data structures */
53 /* Size of small buffer kept within Tds. (software) */
54 /* Keep as a multiple of Align to maintain alignment of Tds in pool */
58 * Some ports are short, some are long, some are byte.
59 * We use ins[bsl] and not vmap.
63 Chcreset = 0x02, /* host controller reset */
64 Cgreset = 0x04, /* global reset */
65 Cegsm = 0x08, /* enter global suspend */
66 Cfgr = 0x10, /* forge global resume */
67 Cdbg = 0x20, /* single step, debug */
68 Cmaxp = 0x80, /* max packet */
71 Susbintr = 0x01, /* interrupt */
72 Seintr = 0x02, /* error interrupt */
73 Sresume = 0x04, /* resume detect */
74 Shserr = 0x08, /* host system error */
75 Shcerr = 0x10, /* host controller error */
76 Shalted = 0x20, /* controller halted */
80 Itmout = 0x01, /* timeout or crc */
81 Iresume = 0x02, /* resume interrupt enable */
82 Ioc = 0x04, /* interrupt on complete */
83 Ishort = 0x08, /* short packet interrupt */
87 SOFmod = 0xC, /* start of frame modifier register */
90 PSpresent = 0x0001, /* device present */
91 PSstatuschg = 0x0002, /* PSpresent changed */
92 PSenable = 0x0004, /* device enabled */
93 PSchange = 0x0008, /* PSenable changed */
94 PSresume = 0x0040, /* resume detected */
95 PSreserved1 = 0x0080, /* always read as 1; reserved */
96 PSslow = 0x0100, /* device has low speed */
97 PSreset = 0x0200, /* port reset */
98 PSsuspend = 0x1000, /* port suspended */
100 /* Transfer descriptor link */
101 Tdterm = 0x1, /* nil (terminate) */
102 Tdlinkqh = 0x2, /* link refers to a QH */
103 Tdvf = 0x4, /* run linked Tds first (depth-first)*/
105 /* Transfer status bits */
106 Tdbitstuff = 0x00020000, /* bit stuffing error */
107 Tdcrcto = 0x00040000, /* crc or timeout error */
108 Tdnak = 0x00080000, /* nak packet received */
109 Tdbabble = 0x00100000, /* babble detected */
110 Tddberr = 0x00200000, /* data buf. error */
111 Tdstalled = 0x00400000, /* serious error to ep. */
112 Tdactive = 0x00800000, /* enabled/in use by hw */
113 /* Transfer control bits */
114 Tdioc = 0x01000000, /* interrupt on complete */
115 Tdiso = 0x02000000, /* isochronous select */
116 Tdlow = 0x04000000, /* low speed device */
117 Tderr1 = 0x08000000, /* bit 0 of error counter */
118 Tderr2 = 0x10000000, /* bit 1 of error counter */
119 Tdspd = 0x20000000, /* short packet detect */
121 Tdlen = 0x000003FF, /* actual length field */
123 Tdfatalerr = Tdnak|Tdbabble|Tdstalled, /* hw retries others */
124 Tderrors = Tdfatalerr|Tdbitstuff|Tdcrcto|Tddberr,
126 /* Transfer descriptor token bits */
128 Tddata1 = 0x80000, /* data toggle (1==DATA1) */
133 Tdmaxpkt = 0x800, /* max packet size */
135 /* Queue head bits */
136 QHterm = 1<<0, /* nil (terminate) */
137 QHlinkqh = 1<<1, /* link refers to a QH */
138 QHvf = 1<<2, /* vertical first (depth first) */
143 Lock; /* for ilock. qh lists and basic ctlr I/O */
144 QLock portlck; /* for port resets/enable... */
147 int port; /* I/O address */
148 Qh* qhs; /* list of Qhs for this controller */
149 Qh* qh[Tmax]; /* Dummy Qhs to insert Qhs after */
150 Isoio* iso; /* list of active iso I/O */
151 ulong* frames; /* frame list (used by hw) */
152 ulong load; /* max load for a single frame */
153 ulong isoload; /* max iso load for a single frame */
154 int nintr; /* number of interrupts attended */
155 int ntdintr; /* number of intrs. with something to do */
156 int nqhintr; /* number of intrs. for Qhs */
157 int nisointr; /* number of intrs. for iso transfers */
162 QLock; /* for the entire I/O process */
163 Rendez; /* wait for completion */
164 Qh* qh; /* Td list (field const after init) */
165 int usbid; /* usb address for endpoint/device */
166 int toggle; /* Tddata0/Tddata1 */
167 int tok; /* Tdtoksetup, Tdtokin, Tdtokout */
168 ulong iotime; /* time of last I/O */
169 int debug; /* debug flag from the endpoint */
170 char* err; /* error string */
175 Qio; /* a single Qio for each RPC */
176 uchar* data; /* read from last ctl req. */
177 int ndata; /* number of bytes read */
183 Rendez; /* wait for space/completion/errors */
184 int usbid; /* address used for device/endpoint */
185 int tok; /* Tdtokin or Tdtokout */
186 int state; /* Qrun -> Qdone -> Qrun... -> Qclose */
187 int nframes; /* Nframes/ep->pollival */
188 uchar* data; /* iso data buffers if not embedded */
189 int td0frno; /* frame number for first Td */
190 Td* tdu; /* next td for user I/O in tdps */
191 Td* tdi; /* next td processed by interrupt */
192 char* err; /* error string */
193 int nerrs; /* nb of consecutive I/O errors */
194 long nleft; /* number of bytes left from last write */
195 int debug; /* debug flag from the endpoint */
196 Isoio* next; /* in list of active Isoios */
197 Td* tdps[Nframes]; /* pointer to Td used for i-th frame or nil */
223 * Queue header (known by hw).
224 * 16-byte aligned. first two words used by hw.
225 * They are taken from the pool upon endpoint opening and
226 * queued after the dummy queue header for the endpoint type
227 * in the controller. Actual I/O happens as Tds are linked into it.
228 * The driver does I/O in lock-step.
229 * The user builds a list of Tds and links it into the Qh,
230 * then the Qh goes from Qidle to Qrun and nobody touches it until
231 * it becomes Qdone at interrupt time.
232 * At that point the user collects the Tds and it goes Qidle.
233 * A premature cancel may set the state to Qclose and abort I/O.
234 * The Ctlr lock protects change of state for Qhs in use.
238 ulong link; /* link to next horiz. item (eg. Qh) */
239 ulong elink; /* link to element (eg. Td; updated by hw) */
241 ulong state; /* Qidle -> Qinstall -> Qrun -> Qdone | Qclose */
242 Qio* io; /* for this queue */
244 Qh* next; /* in active or free list */
245 Td* tds; /* Td list in this Qh (initially, elink) */
246 char* tag; /* debug and align, mostly */
251 * Transfer descriptor.
252 * 16-byte aligned. first two words used by hw. Next 4 by sw.
253 * We keep an embedded buffer for small I/O transfers.
254 * They are taken from the pool when buffers are needed for I/O
255 * and linked at the Qh/Isoio for the endpoint and direction requiring it.
256 * The block keeps actual data. They are protected from races by
257 * the queue or the pool keeping it. The owner of the link to the Td
258 * is free to use it and can be the only one using it.
262 ulong link; /* Link to next Td or Qh */
263 ulong csw; /* control and status word (updated by hw) */
264 ulong token; /* endpt, device, pid */
265 ulong buffer; /* buffer pointer */
267 Td* next; /* in qh or Isoio or free list */
268 ulong ndata; /* bytes available/used at data */
269 uchar* data; /* pointer to actual data */
270 void* buff; /* allocated data, for large transfers */
272 uchar sbuff[Tdndata]; /* embedded buffer, for small transfers */
275 #define INB(x) inb(ctlr->port+(x))
276 #define INS(x) ins(ctlr->port+(x))
277 #define INL(x) inl(ctlr->port+(x))
278 #define OUTB(x, v) outb(ctlr->port+(x), (v))
279 #define OUTS(x, v) outs(ctlr->port+(x), (v))
280 #define OUTL(x, v) outl(ctlr->port+(x), (v))
281 #define TRUNC(x, sz) ((x) & ((sz)-1))
282 #define PTR(q) ((void*)KADDR((ulong)(q) & ~ (0xF|PCIWINDOW)))
283 #define QPTR(q) ((Qh*)PTR(q))
284 #define TPTR(q) ((Td*)PTR(q))
285 #define PORT(p) (Portsc0 + 2*(p))
286 #define diprint if(debug || iso->debug)print
287 #define ddiprint if(debug>1 || iso->debug>1)print
288 #define dqprint if(debug || (qh->io && qh->io->debug))print
289 #define ddqprint if(debug>1 || (qh->io && qh->io->debug>1))print
291 static Ctlr* ctlrs[Nhcis];
293 static Tdpool tdpool;
294 static Qhpool qhpool;
297 static char* qhsname[] = { "idle", "install", "run", "done", "close", "FREE" };
300 uhcicmd(Ctlr *ctlr, int c)
306 uhcirun(Ctlr *ctlr, int on)
310 ddprint("uhci %#ux setting run to %d\n", ctlr->port, on);
313 uhcicmd(ctlr, INS(Cmd)|Crun);
315 uhcicmd(ctlr, INS(Cmd) & ~Crun);
316 for(i = 0; i < 100; i++)
317 if(on == 0 && (INS(Status) & Shalted) != 0)
319 else if(on != 0 && (INS(Status) & Shalted) == 0)
324 dprint("uhci %#x run cmd timed out\n", ctlr->port);
325 ddprint("uhci %#ux cmd %#ux sts %#ux\n",
326 ctlr->port, INS(Cmd), INS(Status));
332 return (td->csw+1) & Tdlen;
338 return ((td->token>>21)+1) & (Tdmaxpkt-1);
344 return td->token & 0xFF;
348 seprinttd(char *s, char *se, Td *td)
350 s = seprint(s, se, "%#p link %#ulx", td, td->link);
351 if((td->link & Tdvf) != 0)
352 s = seprint(s, se, "V");
353 if((td->link & Tdterm) != 0)
354 s = seprint(s, se, "T");
355 if((td->link & Tdlinkqh) != 0)
356 s = seprint(s, se, "Q");
357 s = seprint(s, se, " csw %#ulx ", td->csw);
358 if(td->csw & Tdactive)
359 s = seprint(s, se, "a");
361 s = seprint(s, se, "I");
363 s = seprint(s, se, "i");
365 s = seprint(s, se, "l");
366 if((td->csw & (Tderr1|Tderr2)) == 0)
367 s = seprint(s, se, "z");
368 if(td->csw & Tderrors)
369 s = seprint(s, se, " err %#ulx", td->csw & Tderrors);
370 if(td->csw & Tdstalled)
371 s = seprint(s, se, "s");
372 if(td->csw & Tddberr)
373 s = seprint(s, se, "d");
374 if(td->csw & Tdbabble)
375 s = seprint(s, se, "b");
377 s = seprint(s, se, "n");
378 if(td->csw & Tdcrcto)
379 s = seprint(s, se, "c");
380 if(td->csw & Tdbitstuff)
381 s = seprint(s, se, "B");
382 s = seprint(s, se, " stslen %d", tdlen(td));
384 s = seprint(s, se, " token %#ulx", td->token);
385 if(td->token == 0) /* the BWS loopback Td, ignore rest */
387 s = seprint(s, se, " maxlen %d", maxtdlen(td));
388 if(td->token & Tddata1)
389 s = seprint(s, se, " d1");
391 s = seprint(s, se, " d0");
392 s = seprint(s, se, " id %#ulx:", (td->token>>15) & Epmax);
393 s = seprint(s, se, "%#ulx", (td->token>>8) & Devmax);
396 s = seprint(s, se, " in");
399 s = seprint(s, se, " out");
402 s = seprint(s, se, " setup");
405 s = seprint(s, se, " BADPID");
407 s = seprint(s, se, "\n\t buffer %#ulx data %#p", td->buffer, td->data);
408 s = seprint(s, se, " ndata %uld sbuff %#p buff %#p",
409 td->ndata, td->sbuff, td->buff);
411 s = seprintdata(s, se, td->data, td->ndata);
416 isodump(Isoio *iso, int all)
422 print("iso %#p %s state %d nframes %d"
423 " td0 %#p tdu %#p tdi %#p data %#p\n",
424 iso, iso->tok == Tdtokin ? "in" : "out",
425 iso->state, iso->nframes, iso->tdps[iso->td0frno],
426 iso->tdu, iso->tdi, iso->data);
428 print("\terr='%s'\n", iso->err);
430 seprinttd(buf, buf+sizeof(buf), iso->tdu);
431 print("\ttdu %s\n", buf);
432 seprinttd(buf, buf+sizeof(buf), iso->tdi);
433 print("\ttdi %s\n", buf);
435 td = iso->tdps[iso->td0frno];
436 for(i = 0; i < iso->nframes; i++){
437 seprinttd(buf, buf+sizeof(buf), td);
442 print("\t%s\n", buf);
449 sameptr(void *p, ulong l)
457 dumptd(Td *td, char *pref)
465 se = buf+sizeof(buf);
466 for(; td != nil; td = td->next){
467 s = seprinttd(buf, se, td);
468 if(!sameptr(td->next, td->link))
469 seprint(s, se, " next %#p != link %#ulx %#p",
470 td->next, td->link, TPTR(td->link));
471 print("%std %s\n", pref, buf);
473 print("...more tds...\n");
480 qhdump(Qh *qh, char *pref)
489 se = buf+sizeof(buf);
490 s = seprint(s, se, "%sqh %s %#p state %s link %#ulx", pref,
491 qh->tag, qh, qhsname[qh->state], qh->link);
492 if(!sameptr(qh->tds, qh->elink))
493 s = seprint(s, se, " [tds %#p != elink %#ulx %#p]",
494 qh->tds, qh->elink, TPTR(qh->elink));
495 if(!sameptr(qh->next, qh->link))
496 s = seprint(s, se, " [next %#p != link %#ulx %#p]",
497 qh->next, qh->link, QPTR(qh->link));
498 if((qh->link & Tdterm) != 0)
499 s = seprint(s, se, "T");
500 if((qh->link & Tdlinkqh) != 0)
501 s = seprint(s, se, "Q");
502 s = seprint(s, se, " elink %#ulx", qh->elink);
503 if((qh->elink & Tdterm) != 0)
504 s = seprint(s, se, "T");
505 if((qh->elink & Tdlinkqh) != 0)
506 s = seprint(s, se, "Q");
507 s = seprint(s, se, " io %#p", qh->io);
508 if(qh->io != nil && qh->io->err != nil)
509 seprint(s, se, " err='%s'", qh->io->err);
511 dumptd(qh->tds, "\t");
512 if((qh->elink & QHterm) == 0){
515 for(td = qh->elink; (td & Tdterm) == 0; td = TPTR(td)->link){
517 if(td == TPTR(td)->link) /* BWS Td */
529 xdump(Ctlr *ctlr, int doilock)
536 if(ctlr == ctlrs[0]){
538 print("tds: alloc %d = inuse %d + free %d\n",
539 tdpool.nalloc, tdpool.ninuse, tdpool.nfree);
542 print("qhs: alloc %d = inuse %d + free %d\n",
543 qhpool.nalloc, qhpool.ninuse, qhpool.nfree);
548 print("uhci port %#x frames %#p nintr %d ntdintr %d",
549 ctlr->port, ctlr->frames, ctlr->nintr, ctlr->ntdintr);
550 print(" nqhintr %d nisointr %d\n", ctlr->nqhintr, ctlr->nisointr);
551 print("cmd %#ux sts %#ux fl %#ulx ps1 %#ux ps2 %#ux frames[0] %#ulx\n",
552 INS(Cmd), INS(Status),
553 INL(Flbaseadd), INS(PORT(0)), INS(PORT(1)),
555 for(iso = ctlr->iso; iso != nil; iso = iso->next)
558 for(qh = ctlr->qhs; qh != nil; qh = qh->next){
584 if(tdpool.free == nil){
585 ddprint("uhci: tdalloc %d Tds\n", Incr);
586 pool = xspanalloc(Incr*sizeof(Td), Align, 0);
589 for(i=Incr; --i>=0;){
590 pool[i].next = tdpool.free;
591 tdpool.free = &pool[i];
593 tdpool.nalloc += Incr;
594 tdpool.nfree += Incr;
597 tdpool.free = td->next;
602 memset(td, 0, sizeof(Td));
604 assert(((ulong)td & 0xF) == 0);
616 td->next = tdpool.free;
624 qhlinkqh(Qh* qh, Qh* next)
629 next->link = qh->link;
630 next->next = qh->next;
631 qh->link = PCIWADDR(next)|QHlinkqh;
637 qhlinktd(Qh *qh, Td *td)
641 qh->elink = QHvf|QHterm;
643 qh->elink = PCIWADDR(td);
647 tdlinktd(Td *td, Td *next)
653 td->link = PCIWADDR(next)|Tdvf;
657 qhalloc(Ctlr *ctlr, Qh *prev, Qio *io, char *tag)
664 if(qhpool.free == nil){
665 ddprint("uhci: qhalloc %d Qhs\n", Incr);
666 pool = xspanalloc(Incr*sizeof(Qh), Align, 0);
669 for(i=Incr; --i>=0;){
670 pool[i].next = qhpool.free;
671 qhpool.free = &pool[i];
673 qhpool.nalloc += Incr;
674 qhpool.nfree += Incr;
677 qhpool.free = qh->next;
689 kstrdup(&qh->tag, tag);
698 assert(((ulong)qh & 0xF) == 0);
703 qhfree(Ctlr *ctlr, Qh *qh)
713 for(q = ctlr->qhs; q != nil; q = q->next)
717 panic("qhfree: nil q");
722 for(td = qh->tds; td != nil; td = ltd){
727 qh->state = Qfree; /* paranoia */
728 qh->next = qhpool.free;
735 ddprint("qhfree: qh %#p\n", qh);
744 return "crc/timeout error";
746 return "babble detected";
750 return "bit stuffing error";
762 return iso->state == Qclose ||
763 (iso->state == Qrun &&
764 iso->tok == Tdtokin && iso->tdi != iso->tdu);
773 return iso->state == Qclose ||
774 (iso->state == Qrun &&
775 iso->tok == Tdtokout && iso->tdu->next != iso->tdi);
779 tdisoinit(Isoio *iso, Td *td, long count)
782 td->token = ((count-1)<<21)| ((iso->usbid & 0x7FF)<<8) | iso->tok;
783 td->csw = Tderr1|Tdiso|Tdactive|Tdioc;
787 * Process Iso i/o on interrupt. For writes update just error status.
788 * For reads update tds to reflect data and also error status.
789 * When tdi aproaches tdu, advance tdu; data may be lost.
790 * (If nframes is << Nframes tdu might be far away but this avoids
791 * races regarding frno.)
792 * If we suffer errors for more than half the frames we stall.
795 isointerrupt(Ctlr *ctlr, Isoio* iso)
803 if((tdi->csw & Tdactive) != 0) /* nothing new done */
806 ddiprint("isointr: iso %#p: tdi %#p tdu %#p\n", iso, tdi, iso->tdu);
807 if(iso->state != Qrun && iso->state != Qdone)
808 panic("isointr: iso state");
809 if(debug > 1 || iso->debug > 1)
812 nframes = iso->nframes / 2; /* limit how many we look */
816 for(i = 0; i < nframes && (tdi->csw & Tdactive) == 0; i++){
818 err = tdi->csw & Tderrors;
821 else if(iso->nerrs++ > iso->nframes/2)
822 tdi->csw |= Tdstalled;
823 if((tdi->csw & Tdstalled) != 0){
825 iso->err = errmsg(err);
826 diprint("isointerrupt: tdi %#p error %#ux %s\n",
828 diprint("ctlr load %uld\n", ctlr->load);
832 tdi->ndata = tdlen(tdi);
834 if(tdi->next == iso->tdu || tdi->next->next == iso->tdu){
835 memset(iso->tdu->data, 0, maxtdlen(iso->tdu));
836 tdisoinit(iso, iso->tdu, maxtdlen(iso->tdu));
837 iso->tdu = iso->tdu->next;
842 ddiprint("isointr: %d frames processed\n", nframes);
846 if(isocanwrite(iso) || isocanread(iso)){
847 diprint("wakeup iso %#p tdi %#p tdu %#p\n", iso,
855 * Process a Qh upon interrupt. There's one per ongoing user I/O.
856 * User process releases resources later, that is not done here.
857 * We may find in this order one or more Tds:
858 * - none/many non active and completed Tds
859 * - none/one (usually(!) not active) and failed Td
860 * - none/many active Tds.
861 * Upon errors the entire transfer is aborted and error reported.
862 * Otherwise, the transfer is complete only when all Tds are done or
863 * when a read with less than maxpkt is found.
864 * Use the software list and not qh->elink to avoid races.
865 * We could use qh->elink to see if there's something new or not.
868 qhinterrupt(Ctlr *ctlr, Qh *qh)
874 if(qh->state != Qrun)
875 panic("qhinterrupt: qh state");
877 panic("qhinterrupt: no tds");
878 if((qh->tds->csw & Tdactive) == 0)
879 ddqprint("qhinterrupt port %#ux qh %#p p0 %#x p1 %#x\n",
880 ctlr->port, qh, INS(PORT(0)), INS(PORT(1)));
881 for(td = qh->tds; td != nil; td = td->next){
882 if(td->csw & Tdactive)
885 if((td->csw & Tdstalled) != 0){
886 err = td->csw & Tderrors;
887 /* just stalled is end of xfer but not an error */
888 if(err != Tdstalled && qh->io->err == nil){
889 qh->io->err = errmsg(td->csw & Tderrors);
890 dqprint("qhinterrupt: td %#p error %#ux %s\n",
891 td, err, qh->io->err);
892 dqprint("ctlr load %uld\n", ctlr->load);
896 if((td->csw & Tdnak) != 0){ /* retransmit; not serious */
901 td->ndata = tdlen(td);
902 if(td->ndata < maxtdlen(td)){ /* EOT */
909 * Done. Make void the Tds not used (errors or EOT) and wakeup epio.
912 for(; td != nil; td = td->next)
919 interrupt(Ureg*, void *a)
935 if((sts & Sall) == 0){ /* not for us; sharing irq */
939 OUTS(Status, sts & Sall);
942 print("uhci %#ux: not running: uhci bug?\n", ctlr->port);
943 /* BUG: should abort everything in this case */
946 frptr = INL(Flbaseadd);
948 frno = TRUNC(frno, Nframes);
949 print("cmd %#ux sts %#ux frptr %#ux frno %d\n",
950 cmd, sts, frptr, frno);
954 * Will we know in USB 3.0 who the interrupt was for?.
955 * Do they still teach indexing in CS?
956 * This is Intel's doing.
958 for(iso = ctlr->iso; iso != nil; iso = iso->next)
959 if(iso->state == Qrun || iso->state == Qdone)
960 isointerrupt(ctlr, iso);
961 for(qh = ctlr->qhs; qh != nil; qh = qh->next)
962 if(qh->state == Qrun)
963 qhinterrupt(ctlr, qh);
964 else if(qh->state == Qclose)
970 * iso->tdu is the next place to put data. When it gets full
971 * it is activated and tdu advanced.
974 putsamples(Isoio *iso, uchar *b, long count)
979 for(tot = 0; isocanwrite(iso) && tot < count; tot += n){
981 if(n > maxtdlen(iso->tdu) - iso->nleft)
982 n = maxtdlen(iso->tdu) - iso->nleft;
983 memmove(iso->tdu->data+iso->nleft, b+tot, n);
985 if(iso->nleft == maxtdlen(iso->tdu)){
986 tdisoinit(iso, iso->tdu, iso->nleft);
988 iso->tdu = iso->tdu->next;
995 * Queue data for writing and return error status from
996 * last writes done, to maintain buffered data.
999 episowrite(Ep *ep, Isoio *iso, void *a, long count)
1007 iso->debug = ep->debug;
1008 diprint("uhci: episowrite: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
1017 if(iso->state == Qclose){
1019 error(iso->err ? iso->err : Eio);
1023 for(tot = 0; tot < count; tot += nw){
1024 while(isocanwrite(iso) == 0){
1026 diprint("uhci: episowrite: %#p sleep\n", iso);
1029 iso->err = "I/O timed out";
1033 tsleep(iso, isocanwrite, iso, ep->tmout);
1039 if(iso->state == Qclose || err != nil){
1041 error(err ? err : Eio);
1043 if(iso->state != Qrun)
1044 panic("episowrite: iso not running");
1045 iunlock(ctlr); /* We could page fault here */
1046 nw = putsamples(iso, b+tot, count-tot);
1049 if(iso->state != Qclose)
1052 err = iso->err; /* in case it failed early */
1058 diprint("uhci: episowrite: %#p %d bytes\n", iso, tot);
1063 * Available data is kept at tdu and following tds, up to tdi (excluded).
1066 episoread(Ep *ep, Isoio *iso, void *a, int count)
1074 iso->debug = ep->debug;
1075 diprint("uhci: episoread: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
1087 if(iso->state == Qclose){
1089 error(iso->err ? iso->err : Eio);
1092 while(isocanread(iso) == 0){
1094 diprint("uhci: episoread: %#p sleep\n", iso);
1097 iso->err = "I/O timed out";
1101 tsleep(iso, isocanread, iso, ep->tmout);
1105 if(iso->state == Qclose){
1107 error(iso->err ? iso->err : Eio);
1110 assert(iso->tdu != iso->tdi);
1112 for(tot = 0; iso->tdi != iso->tdu && tot < count; tot += nr){
1114 if(tdu->csw & Tdactive){
1115 diprint("uhci: episoread: %#p tdu active\n", iso);
1119 if(tot + nr > count)
1122 print("uhci: ep%d.%d: too many polls\n",
1123 ep->dev->nb, ep->nb);
1125 iunlock(ctlr); /* We could page fault here */
1126 memmove(b+tot, tdu->data, nr);
1129 memmove(tdu->data, tdu->data+nr, tdu->ndata - nr);
1132 if(tdu->ndata == 0){
1133 tdisoinit(iso, tdu, ep->maxpkt);
1134 iso->tdu = tdu->next;
1140 diprint("uhci: episoread: %#p %d bytes err '%s'\n", iso, tot, iso->err);
1156 epgettd(Ep *ep, Qio *io, int flags, void *a, int count)
1161 if(ep->maxpkt < count)
1162 error("maxpkt too short");
1164 if(count <= Tdndata)
1165 td->data = td->sbuff;
1167 td->data = td->buff = smalloc(ep->maxpkt);
1168 td->buffer = PCIWADDR(td->data);
1170 if(a != nil && count > 0)
1171 memmove(td->data, a, count);
1172 td->csw = Tderr2|Tderr1|flags;
1173 if(ep->dev->speed == Lowspeed)
1175 tok = io->tok | io->toggle;
1176 io->toggle = nexttoggle(io->toggle);
1177 td->token = ((count-1)<<21) | ((io->usbid&0x7FF)<<8) | tok;
1183 * Try to get them idle
1192 for(td = qh->tds; td != nil; td = td->next){
1193 if(td->csw & Tdactive)
1195 td->csw &= ~(Tdactive|Tdioc);
1205 return qh->state != Qrun;
1209 epiowait(Ctlr *ctlr, Qio *io, int tmout, ulong load)
1215 ddqprint("uhci io %#p sleep on qh %#p state %uld\n", io, qh, qh->state);
1218 dqprint("uhci io %#p qh %#p timed out\n", io, qh);
1222 sleep(io, epiodone, qh);
1224 tsleep(io, epiodone, qh, tmout);
1228 if(qh->state == Qrun)
1230 else if(qh->state != Qdone && qh->state != Qclose)
1231 panic("epio: queue not done and not closed");
1234 io->err = "request timed out";
1237 tsleep(&up->sleep, return0, 0, Abortdelay);
1242 if(qh->state != Qclose)
1251 * To make it work for control transfers, the caller may
1252 * lock the Qio for the entire control transfer.
1255 epio(Ep *ep, Qio *io, void *a, long count, int mustlock)
1257 Td *td, *ltd, *td0, *ntd;
1263 int saved, ntds, tmout;
1269 io->debug = ep->debug;
1271 ddeprint("epio: %s ep%d.%d io %#p count %ld load %uld\n",
1272 io->tok == Tdtokin ? "in" : "out",
1273 ep->dev->nb, ep->nb, io, count, ctlr->load);
1274 if((debug > 1 || ep->debug > 1) && io->tok != Tdtokin){
1275 seprintdata(buf, buf+sizeof(buf), a, count);
1276 print("uchi epio: user data: %s\n", buf);
1287 if(qh->state == Qclose){ /* Tds released by cancelio */
1289 error(io->err ? io->err : Eio);
1291 if(qh->state != Qidle)
1292 panic("epio: qh not idle");
1293 qh->state = Qinstall;
1303 if(c != nil && io->tok != Tdtokin)
1304 td = epgettd(ep, io, Tdactive, c+tot, n);
1306 td = epgettd(ep, io, Tdactive|Tdspd, nil, n);
1314 }while(tot < count);
1315 if(td0 == nil || ltd == nil)
1316 panic("epio: no td");
1318 ltd->csw |= Tdioc; /* the last one interrupts */
1319 ddeprint("uhci: load %uld ctlr load %uld\n", load, ctlr->load);
1321 if(qh->state != Qclose){
1322 io->iotime = TK2MS(MACHP(0)->ticks);
1330 epiowait(ctlr, io, tmout, load);
1332 if(debug > 1 || ep->debug > 1)
1333 dumptd(td0, "epio: got tds: ");
1339 for(td = td0; td != nil; td = ntd){
1342 * Use td tok, not io tok, because of setup packets.
1343 * Also, if the Td was stalled or active (previous Td
1344 * was a short packet), we must save the toggle as it is.
1346 if(td->csw & (Tdstalled|Tdactive)){
1348 io->toggle = td->token & Tddata1;
1351 if(c != nil && tdtok(td) == Tdtokin && td->ndata > 0){
1352 memmove(c, td->data, td->ndata);
1364 ddeprint("epio: io %#p: %d tds: return %ld err '%s'\n",
1365 io, ntds, tot, err);
1374 * halt condition was cleared on the endpoint. update our toggles.
1386 if(ep->mode != OREAD){
1388 io[OWRITE].toggle = Tddata0;
1389 deprint("ep clrhalt for io %#p\n", io+OWRITE);
1390 qunlock(&io[OWRITE]);
1392 if(ep->mode != OWRITE){
1394 io[OREAD].toggle = Tddata0;
1395 deprint("ep clrhalt for io %#p\n", io+OREAD);
1396 qunlock(&io[OREAD]);
1403 epread(Ep *ep, void *a, long count)
1411 ddeprint("uhci: epread\n");
1413 panic("epread: not open");
1423 ddeprint("epread ctl ndata %d\n", cio->ndata);
1425 error("request expected");
1426 else if(cio->ndata == 0){
1430 if(count > cio->ndata)
1433 memmove(a, cio->data, count);
1434 /* BUG for big transfers */
1437 cio->ndata = 0; /* signal EOF next time */
1441 if(debug>1 || ep->debug){
1442 seprintdata(buf, buf+sizeof(buf), a, count);
1443 print("epread: %s\n", buf);
1450 return epio(ep, &io[OREAD], a, count, 1);
1453 delta = TK2MS(MACHP(0)->ticks) - io[OREAD].iotime + 1;
1454 if(delta < ep->pollival / 2)
1455 tsleep(&up->sleep, return0, 0, ep->pollival/2 - delta);
1458 return epio(ep, &io[OREAD], a, count, 1);
1461 return episoread(ep, iso, a, count);
1463 panic("epread: bad ep ttype %d", ep->ttype);
1469 * Control transfers are one setup write (data0)
1470 * plus zero or more reads/writes (data1, data0, ...)
1471 * plus a final write/read with data1 to ack.
1472 * For both host to device and device to host we perform
1473 * the entire transfer when the user writes the request,
1474 * and keep any data read from the device for a later read.
1475 * We call epio three times instead of placing all Tds at
1476 * the same time because doing so leads to crc/tmout errors
1478 * Upon errors on the data phase we must still run the status
1479 * phase or the device may cease responding in the future.
1482 epctlio(Ep *ep, Ctlio *cio, void *a, long count)
1487 ddeprint("epctlio: cio %#p ep%d.%d count %ld\n",
1488 cio, ep->dev->nb, ep->nb, count);
1489 if(count < Rsetuplen)
1490 error("short usb comand");
1503 /* set the address if unset and out of configuration state */
1504 if(ep->dev->state != Dconfig && ep->dev->state != Dreset)
1506 cio->usbid = ((ep->nb&Epmax)<<7)|(ep->dev->nb&Devmax);
1508 cio->tok = Tdtoksetup;
1509 cio->toggle = Tddata0;
1510 if(epio(ep, cio, a, Rsetuplen, 0) < Rsetuplen)
1515 cio->toggle = Tddata1;
1516 if(c[Rtype] & Rd2h){
1518 len = GET2(c+Rcount);
1520 error("bad length in d2h request");
1522 error("d2h data too large to fit in uhci");
1523 a = cio->data = smalloc(len+1);
1525 cio->tok = Tdtokout;
1532 len = epio(ep, cio, a, len, 0);
1535 if(c[Rtype] & Rd2h){
1538 cio->tok = Tdtokout;
1543 count = Rsetuplen + len;
1546 cio->toggle = Tddata1;
1547 epio(ep, cio, nil, 0, 0);
1550 ddeprint("epctlio cio %#p return %ld\n", cio, count);
1555 epwrite(Ep *ep, void *a, long count)
1565 ddeprint("uhci: epwrite ep%d.%d\n", ep->dev->nb, ep->nb);
1567 panic("uhci: epwrite: not open");
1571 return epctlio(ep, cio, a, count);
1577 * Put at most Tdatomic Tds (512 bytes) at a time.
1578 * Otherwise some devices produce babble errors.
1581 for(tot = 0; tot < count ; tot += nw){
1583 if(nw > Tdatomic * ep->maxpkt)
1584 nw = Tdatomic * ep->maxpkt;
1585 nw = epio(ep, &io[OWRITE], b+tot, nw, 1);
1590 delta = TK2MS(MACHP(0)->ticks) - io[OWRITE].iotime + 1;
1591 if(delta < ep->pollival)
1592 tsleep(&up->sleep, return0, 0, ep->pollival - delta);
1595 return epio(ep, &io[OWRITE], a, count, 1);
1598 return episowrite(ep, iso, a, count);
1600 panic("uhci: epwrite: bad ep ttype %d", ep->ttype);
1617 if(ep->mode == ORDWR)
1618 error("iso i/o is half-duplex");
1621 iso->debug = ep->debug;
1622 iso->next = nil; /* paranoia */
1623 if(ep->mode == OREAD)
1626 iso->tok = Tdtokout;
1627 iso->usbid = ((ep->nb & Epmax)<<7)|(ep->dev->nb & Devmax);
1629 iso->nframes = Nframes/ep->pollival;
1630 if(iso->nframes < 3)
1631 error("uhci isoopen bug"); /* we need at least 3 tds */
1634 if(ctlr->load + ep->load > 800)
1635 print("usb: uhci: bandwidth may be exceeded\n");
1636 ctlr->load += ep->load;
1637 ctlr->isoload += ep->load;
1638 dprint("uhci: load %uld isoload %uld\n", ctlr->load, ctlr->isoload);
1642 * From here on this cannot raise errors
1643 * unless we catch them and release here all memory allocated.
1645 if(ep->maxpkt > Tdndata)
1646 iso->data = smalloc(iso->nframes*ep->maxpkt);
1648 frno = INS(Frnum) + 10; /* start 10ms ahead */
1649 frno = TRUNC(frno, Nframes);
1651 iso->td0frno = frno;
1654 for(i = 0; i < iso->nframes; i++){
1655 td = iso->tdps[frno] = tdalloc();
1656 if(ep->mode == OREAD)
1659 size = (ep->hz+left) * ep->pollival / 1000;
1660 size *= ep->samplesz;
1661 left = (ep->hz+left) * ep->pollival % 1000;
1662 if(size > ep->maxpkt){
1663 print("uhci: ep%d.%d: size > maxpkt\n",
1664 ep->dev->nb, ep->nb);
1665 print("size = %d max = %ld\n", size, ep->maxpkt);
1670 td->data = iso->data + i * ep->maxpkt;
1672 td->data = td->sbuff;
1673 td->buffer = PCIWADDR(td->data);
1674 tdisoinit(iso, td, size);
1678 frno = TRUNC(frno+ep->pollival, Nframes);
1680 ltd->next = iso->tdps[iso->td0frno];
1681 iso->tdi = iso->tdps[iso->td0frno];
1682 iso->tdu = iso->tdi; /* read: right now; write: 1s ahead */
1684 frno = iso->td0frno;
1685 for(i = 0; i < iso->nframes; i++){
1686 iso->tdps[frno]->link = ctlr->frames[frno];
1687 frno = TRUNC(frno+ep->pollival, Nframes);
1690 frno = iso->td0frno;
1691 for(i = 0; i < iso->nframes; i++){
1692 ctlr->frames[frno] = PCIWADDR(iso->tdps[frno]);
1693 frno = TRUNC(frno+ep->pollival, Nframes);
1695 iso->next = ctlr->iso;
1699 if(debug > 1 || iso->debug >1)
1704 * Allocate the endpoint and set it up for I/O
1705 * in the controller. This must follow what's said
1706 * in Ep regarding configuration, including perhaps
1707 * the saved toggles (saved on a previous close of
1708 * the endpoint data file by epclose).
1720 deprint("uhci: epopen ep%d.%d\n", ep->dev->nb, ep->nb);
1722 panic("uhci: epopen called with open ep");
1728 if(ep->maxpkt > Tdmaxpkt){
1729 print("uhci: maxkpkt too large: using %d\n", Tdmaxpkt);
1730 ep->maxpkt = Tdmaxpkt;
1732 cqh = ctlr->qh[ep->ttype];
1735 error("endpoint not configured");
1737 ep->aux = smalloc(sizeof(Isoio));
1741 cio = ep->aux = smalloc(sizeof(Ctlio));
1742 cio->debug = ep->debug;
1745 if(ep->dev->isroot != 0 && ep->nb == 0) /* root hub */
1747 cio->qh = qhalloc(ctlr, cqh, cio, "epc");
1751 io = ep->aux = smalloc(sizeof(Qio)*2);
1752 io[OREAD].debug = io[OWRITE].debug = ep->debug;
1753 usbid = ((ep->nb&Epmax)<<7)|(ep->dev->nb &Devmax);
1754 if(ep->mode != OREAD){
1755 if(ep->toggle[OWRITE] != 0)
1756 io[OWRITE].toggle = Tddata1;
1758 io[OWRITE].toggle = Tddata0;
1759 io[OWRITE].tok = Tdtokout;
1760 io[OWRITE].qh = qhalloc(ctlr, cqh, io+OWRITE, "epw");
1761 io[OWRITE].usbid = usbid;
1763 if(ep->mode != OWRITE){
1764 if(ep->toggle[OREAD] != 0)
1765 io[OREAD].toggle = Tddata1;
1767 io[OREAD].toggle = Tddata0;
1768 io[OREAD].tok = Tdtokin;
1769 io[OREAD].qh = qhalloc(ctlr, cqh, io+OREAD, "epr");
1770 io[OREAD].usbid = usbid;
1774 if(debug>1 || ep->debug)
1776 deprint("uhci: epopen done\n");
1781 cancelio(Ctlr *ctlr, Qio *io)
1787 if(io == nil || io->qh == nil || io->qh->state == Qclose){
1791 dqprint("uhci: cancelio for qh %#p state %s\n",
1792 qh, qhsname[qh->state]);
1797 tsleep(&up->sleep, return0, 0, Abortdelay);
1803 /* wait for epio if running */
1811 cancelisoio(Ctlr *ctlr, Isoio *iso, int pollival, ulong load)
1820 if(iso->state == Qclose){
1824 if(iso->state != Qrun && iso->state != Qdone)
1825 panic("bad iso state");
1826 iso->state = Qclose;
1827 if(ctlr->isoload < load)
1828 panic("uhci: low isoload");
1829 ctlr->isoload -= load;
1831 for(il = &ctlr->iso; *il != nil; il = &(*il)->next)
1835 panic("isocancel: not found");
1837 frno = iso->td0frno;
1838 for(i = 0; i < iso->nframes; i++){
1839 td = iso->tdps[frno];
1840 td->csw &= ~(Tdioc|Tdactive);
1841 for(lp=&ctlr->frames[frno]; !(*lp & Tdterm);
1842 lp = &TPTR(*lp)->link)
1846 panic("cancelisoio: td not found");
1848 frno = TRUNC(frno+pollival, Nframes);
1853 * wakeup anyone waiting for I/O and
1854 * wait to be sure no I/O is in progress in the controller.
1855 * and then wait to be sure episo-io is no longer running.
1858 diprint("cancelisoio iso %#p waiting for I/O to cease\n", iso);
1859 tsleep(&up->sleep, return0, 0, 5);
1862 diprint("cancelisoio iso %#p releasing iso\n", iso);
1864 frno = iso->td0frno;
1865 for(i = 0; i < iso->nframes; i++){
1866 tdfree(iso->tdps[frno]);
1867 iso->tdps[frno] = nil;
1868 frno = TRUNC(frno+pollival, Nframes);
1883 deprint("uhci: epclose ep%d.%d\n", ep->dev->nb, ep->nb);
1886 panic("uhci: epclose called with closed ep");
1890 cancelio(ctlr, cio);
1897 ep->toggle[OREAD] = ep->toggle[OWRITE] = 0;
1898 if(ep->mode != OWRITE){
1899 cancelio(ctlr, &io[OREAD]);
1900 if(io[OREAD].toggle == Tddata1)
1901 ep->toggle[OREAD] = 1;
1903 if(ep->mode != OREAD){
1904 cancelio(ctlr, &io[OWRITE]);
1905 if(io[OWRITE].toggle == Tddata1)
1906 ep->toggle[OWRITE] = 1;
1911 cancelisoio(ctlr, iso, ep->pollival, ep->load);
1914 panic("epclose: bad ttype %d", ep->ttype);
1923 seprintep(char *s, char *e, Ep *ep)
1940 s = seprint(s,e,"cio %#p qh %#p"
1941 " id %#x tog %#x tok %#x err %s\n",
1942 cio, cio->qh, cio->usbid, cio->toggle,
1943 cio->tok, cio->err);
1948 if(ep->mode != OWRITE)
1949 s = seprint(s,e,"r: qh %#p id %#x tog %#x tok %#x err %s\n",
1950 io[OREAD].qh, io[OREAD].usbid, io[OREAD].toggle,
1951 io[OREAD].tok, io[OREAD].err);
1952 if(ep->mode != OREAD)
1953 s = seprint(s,e,"w: qh %#p id %#x tog %#x tok %#x err %s\n",
1954 io[OWRITE].qh, io[OWRITE].usbid, io[OWRITE].toggle,
1955 io[OWRITE].tok, io[OWRITE].err);
1959 s = seprint(s,e,"iso %#p id %#x tok %#x tdu %#p tdi %#p err %s\n",
1960 iso, iso->usbid, iso->tok, iso->tdu, iso->tdi, iso->err);
1968 portenable(Hci *hp, int port, int on)
1975 dprint("uhci: %#x port %d enable=%d\n", ctlr->port, port, on);
1976 ioport = PORT(port-1);
1977 qlock(&ctlr->portlck);
1979 qunlock(&ctlr->portlck);
1985 OUTS(ioport, s | PSenable);
1987 OUTS(ioport, s & ~PSenable);
1990 tsleep(&up->sleep, return0, 0, Enabledelay);
1991 dprint("uhci %#ux port %d enable=%d: sts %#x\n",
1992 ctlr->port, port, on, INS(ioport));
1993 qunlock(&ctlr->portlck);
1999 portreset(Hci *hp, int port, int on)
2007 dprint("uhci: %#ux port %d reset\n", ctlr->port, port);
2012 OUTS(p, INS(p) & ~PSreset);
2013 OUTS(p, INS(p) | PSenable);
2015 for(i=0; i<1000 && (INS(p) & PSenable) == 0; i++)
2017 OUTS(p, (INS(p) & ~PSreset)|PSenable);
2019 dprint("uhci %#ux after port %d reset: sts %#x\n",
2020 ctlr->port, port, INS(p));
2025 portstatus(Hci *hp, int port)
2033 ioport = PORT(port-1);
2034 qlock(&ctlr->portlck);
2037 qunlock(&ctlr->portlck);
2042 if(s & (PSstatuschg | PSchange)){
2044 ddprint("uhci %#ux port %d status %#x\n", ctlr->port, port, s);
2047 qunlock(&ctlr->portlck);
2051 * We must return status bits as a
2052 * get port status hub request would do.
2075 static int already = 0;
2085 while(p = pcimatch(p, 0, 0)){
2087 * Find UHCI controllers (Programming Interface = 0).
2089 if(p->ccrb != Pcibcserial || p->ccru != Pciscusb)
2093 io = p->mem[4].bar & ~0x0F;
2099 print("usbuhci: %#x %#x: failed to map registers\n",
2103 if(ioalloc(io, p->mem[4].size, 0, "usbuhci") < 0){
2104 print("usbuhci: port %#ux in use\n", io);
2107 if(p->intl == 0xFF || p->intl == 0){
2108 print("usbuhci: no irq assigned for port %#ux\n", io);
2112 dprint("uhci: %#x %#x: port %#ux size %#x irq %d\n",
2113 p->vid, p->did, io, p->mem[4].size, p->intl);
2115 ctlr = smalloc(sizeof(Ctlr));
2118 for(i = 0; i < Nhcis; i++)
2119 if(ctlrs[i] == nil){
2124 print("uhci: bug: no more controllers\n");
2129 uhcimeminit(Ctlr *ctlr)
2136 ctlr->qhs = ctlr->qh[Tctl] = qhalloc(ctlr, nil, nil, "CTL");
2137 ctlr->qh[Tintr] = qhalloc(ctlr, ctlr->qh[Tctl], nil, "INT");
2138 ctlr->qh[Tbulk] = qhalloc(ctlr, ctlr->qh[Tintr], nil, "BLK");
2140 /* idle Td from dummy Qh at the end. looped back to itself */
2141 /* This is a workaround for PIIX4 errata 29773804.pdf */
2142 qh = qhalloc(ctlr, ctlr->qh[Tbulk], nil, "BWS");
2144 td->link = PCIWADDR(td);
2147 /* loop (hw only) from the last qh back to control xfers.
2148 * this may be done only for some of them. Disable until ehci comes.
2151 qh->link = PCIWADDR(ctlr->qhs);
2153 frsize = Nframes*sizeof(ulong);
2154 ctlr->frames = xspanalloc(frsize, frsize, 0);
2155 if(ctlr->frames == nil)
2156 panic("uhci reset: no memory");
2159 for(i = 0; i < Nframes; i++)
2160 ctlr->frames[i] = PCIWADDR(ctlr->qhs)|QHlinkqh;
2161 OUTL(Flbaseadd, PCIWADDR(ctlr->frames));
2163 dprint("uhci %#ux flb %#ulx frno %#ux\n", ctlr->port,
2164 INL(Flbaseadd), INS(Frnum));
2175 dprint("uhci %#ux init\n", ctlr->port);
2178 OUTS(Usbintr, Itmout|Iresume|Ioc|Ishort);
2180 dprint("uhci: init: cmd %#ux sts %#ux sof %#ux",
2181 INS(Cmd), INS(Status), INS(SOFmod));
2182 dprint(" flb %#ulx frno %#ux psc0 %#ux psc1 %#ux",
2183 INL(Flbaseadd), INS(Frnum), INS(PORT(0)), INS(PORT(1)));
2184 /* guess other ports */
2185 for(i = 2; i < 6; i++){
2187 if(sts != 0xFFFF && (sts & PSreserved1) == 1){
2188 dprint(" psc%d %#ux", i, sts);
2193 for(i = 0; i < hp->nports; i++)
2199 uhcireset(Ctlr *ctlr)
2205 dprint("uhci %#ux reset\n", ctlr->port);
2208 * Turn off legacy mode. Some controllers won't
2209 * interrupt us as expected otherwise.
2212 pcicfgw16(ctlr->pcidev, 0xc0, 0x2000);
2216 uhcicmd(ctlr, Cgreset); /* global reset */
2218 uhcicmd(ctlr, 0); /* all halt */
2219 uhcicmd(ctlr, Chcreset); /* controller reset */
2220 for(i = 0; i < 100; i++){
2221 if((INS(Cmd) & Chcreset) == 0)
2226 print("uhci %#x controller reset timed out\n", ctlr->port);
2232 setdebug(Hci*, int d)
2253 static Lock resetlck;
2258 if(getconf("*nousbuhci"))
2265 * Any adapter matches if no hp->port is supplied,
2266 * otherwise the ports must match.
2269 for(i = 0; i < Nhcis && ctlrs[i] != nil; i++){
2271 if(ctlr->active == 0)
2272 if(hp->port == 0 || hp->port == ctlr->port){
2278 if(ctlrs[i] == nil || i == Nhcis)
2283 hp->port = ctlr->port;
2286 hp->nports = 2; /* default */
2292 * Linkage to the generic HCI driver.
2296 hp->interrupt = interrupt;
2297 hp->epopen = epopen;
2298 hp->epclose = epclose;
2299 hp->epread = epread;
2300 hp->epwrite = epwrite;
2301 hp->seprintep = seprintep;
2302 hp->portenable = portenable;
2303 hp->portreset = portreset;
2304 hp->portstatus = portstatus;
2305 hp->shutdown = shutdown;
2306 hp->debug = setdebug;
2314 addhcitype("uhci", reset);