2 * USB Open Host Controller Interface (Ohci) driver
5 * - Missing isochronous input streams.
6 * - Too many delays and ilocks.
7 * - bandwidth admission control must be done per-frame.
8 * - Buffering could be handled like in uhci, to avoid
9 * needed block allocation and avoid allocs for small Tds.
10 * - must warn of power overruns.
14 #include "../port/lib.h"
19 #include "../port/error.h"
21 #include "../port/usb.h"
23 typedef struct Ctlio Ctlio;
24 typedef struct Ctlr Ctlr;
26 typedef struct Edpool Edpool;
27 typedef struct Epx Epx;
28 typedef struct Hcca Hcca;
29 typedef struct Isoio Isoio;
30 typedef struct Ohci Ohci;
31 typedef struct Qio Qio;
32 typedef struct Qtree Qtree;
34 typedef struct Tdpool Tdpool;
38 Incr = 64, /* for Td and Ed pools */
40 Align = 0x20, /* OHCI only requires 0x10 */
41 /* use always a power of 2 */
43 Abortdelay = 1, /* delay after cancelling Tds (ms) */
44 Tdatomic = 8, /* max nb. of Tds per bulk I/O op. */
45 Enabledelay = 100, /* waiting for a port to enable */
48 /* Queue states (software) */
57 Edmpsmask = 0x7ff, /* max packet size */
59 Edlow = 1 << 13, /* low speed */
60 Edskip = 1 << 14, /* skip this ed */
61 Ediso = 1 << 15, /* iso Tds used */
62 Edtddir = 0, /* get dir from td */
63 Edin = 2 << 11, /* direction in */
64 Edout = 1 << 11, /* direction out */
65 Eddirmask = 3 << 11, /* direction bits */
66 Edhalt = 1, /* halted (in head ptr) */
67 Edtoggle = 2, /* toggle (in head ptr) 1 == data1 */
70 Tdround = 1<<18, /* (rounding) short packets ok */
71 Tdtoksetup = 0<<19, /* setup packet */
72 Tdtokin = 2<<19, /* in packet */
73 Tdtokout = 1<<19, /* out packet */
74 Tdtokmask = 3<<19, /* in/out/setup bits */
75 Tdnoioc = 7<<21, /* intr. cnt. value for no interrupt */
76 Tdusetog = 1<<25, /* use toggle from Td (1) or Ed (0) */
77 Tddata1 = 1<<24, /* data toggle (1 == data1) */
79 Tdfcmask = 7, /* frame count (iso) */
81 Tdsfmask = 0xFFFF, /* starting frame (iso) */
82 Tderrmask = 3, /* error counter */
84 Tdccmask = 0xf, /* condition code (status) */
86 Tdiccmask = 0xf, /* condition code (iso, offsets) */
89 Ntdframes = 0x10000, /* # of different iso frame numbers */
91 /* Td errors (condition code) */
106 /* control register */
107 Cple = 0x04, /* periodic list enable */
108 Cie = 0x08, /* iso. list enable */
109 Ccle = 0x10, /* ctl list enable */
110 Cble = 0x20, /* bulk list enable */
111 Cfsmask = 3 << 6, /* functional state... */
118 Sblf = 1 << 2, /* bulk list (load) flag */
119 Sclf = 1 << 1, /* control list (load) flag */
120 Shcr = 1 << 0, /* host controller reset */
133 Fmaxpktmask = 0x7fff,
135 HcRhDescA_POTPGT_MASK = 0xff << 24,
136 HcRhDescA_POTPGT_SHIFT = 24,
151 Ccs = 0x00001, /* current connect status */
152 Pes = 0x00002, /* port enable status */
153 Pss = 0x00004, /* port suspend status */
154 Poci = 0x00008, /* over current indicator */
155 Prs = 0x00010, /* port reset status */
156 Pps = 0x00100, /* port power status */
157 Lsda = 0x00200, /* low speed device attached */
158 Csc = 0x10000, /* connect status change */
159 Pesc = 0x20000, /* enable status change */
160 Pssc = 0x40000, /* suspend status change */
161 Ocic = 0x80000, /* over current ind. change */
162 Prsc = 0x100000, /* reset status change */
164 /* port status write bits */
165 Cpe = 0x001, /* clear port enable */
166 Spe = 0x002, /* set port enable */
167 Spr = 0x010, /* set port reset */
168 Spp = 0x100, /* set port power */
169 Cpp = 0x200, /* clear port power */
174 * Endpoint descriptor. (first 4 words used by hardware)
178 ulong tail; /* transfer descriptor */
182 Ed* next; /* sw; in free list or next in list */
183 Td* tds; /* in use by current xfer; all for iso */
184 Ep* ep; /* debug/align */
185 Ed* inext; /* debug/align (dump interrupt eds). */
189 * Endpoint I/O state (software), per direction.
193 QLock; /* for the entire I/O process */
194 Rendez; /* wait for completion */
195 Ed* ed; /* to place Tds on it */
196 int sched; /* queue number (intr/iso) */
197 int toggle; /* Tddata0/Tddata1 */
198 ulong usbid; /* device/endpoint address */
199 int tok; /* Tdsetup, Tdtokin, Tdtokout */
200 long iotime; /* last I/O time; to hold interrupt polls */
201 int debug; /* for the endpoint */
202 char* err; /* error status */
203 int state; /* Qidle -> Qinstall -> Qrun -> Qdone | Qclose */
204 long bw; /* load (intr/iso) */
209 Qio; /* single Ed for all transfers */
210 uchar* data; /* read from last ctl req. */
211 int ndata; /* number of bytes read */
217 int nframes; /* number of frames for a full second */
218 Td* atds; /* Tds avail for further I/O */
219 int navail; /* number of avail Tds */
220 ulong frno; /* next frame number avail for I/O */
221 ulong left; /* remainder after rounding Hz to samples/ms */
222 int nerrs; /* consecutive errors on iso I/O */
223 int delay; /* maximum number of frames to buffer */
227 * Transfer descriptor. Size must be multiple of 32
228 * First block is used by hardware (aligned to 32).
233 ulong cbp; /* current buffer pointer */
236 ushort offsets[8]; /* used by Iso Tds only */
238 Td* next; /* in free or Ed tds list */
239 Td* anext; /* in avail td list (iso) */
240 Ep* ep; /* using this Td for I/O */
241 Qio* io; /* using this Td for I/O */
242 Block* bp; /* data for this Td */
243 ulong nbytes; /* bytes in this Td */
244 ulong cbp0; /* initial value for cbp */
245 ulong last; /* true for last Td in Qio */
249 * Host controller communication area (hardware)
265 /* control and status group */
266 ulong revision; /*00*/
267 ulong control; /*04*/
269 ulong intrsts; /*0c*/
270 ulong intrenable; /*10*/
271 ulong intrdisable; /*14*/
273 /* memory pointer group */
275 ulong periodcurred; /*1c*/
276 ulong ctlheaded; /*20*/
277 ulong ctlcurred; /*24*/
278 ulong bulkheaded; /*28*/
279 ulong bulkcurred; /*2c*/
280 ulong donehead; /*30*/
282 /* frame counter group */
283 ulong fminterval; /*34*/
284 ulong fmremaining; /*38*/
285 ulong fmnumber; /*3c*/
286 ulong periodicstart; /*40*/
287 ulong lsthreshold; /*44*/
290 ulong rhdesca; /*48*/
291 ulong rhdescb; /*4c*/
293 ulong rhportsts[15]; /*54*/
294 ulong pad25[20]; /*90*/
297 ulong hostueaddr; /*e0*/
298 ulong hostuests; /*e4*/
299 ulong hosttimeoutctrl; /*e8*/
302 ulong hostrevision; /*f4*/
308 * Endpoint tree (software)
338 Lock; /* for ilock; lists and basic ctlr I/O */
339 QLock resetl; /* lock controller during USB reset */
344 Ohci* ohci; /* base I/O address */
345 Hcca* hcca; /* intr/done Td lists (used by hardware) */
346 int overrun; /* sched. overrun */
347 Ed* intrhd; /* list of intr. eds in tree */
348 Qtree* tree; /* tree for t Ep i/o */
349 int ntree; /* number of dummy Eds in tree */
353 #define dqprint if(debug || io && io->debug)print
354 #define ddqprint if(debug>1 || (io && io->debug>1))print
355 #define diprint if(debug || iso && iso->debug)print
356 #define ddiprint if(debug>1 || (iso && iso->debug>1))print
357 #define TRUNC(x, sz) ((x) & ((sz)-1))
359 static int ohciinterrupts[Nttypes];
360 static char* iosname[] = { "idle", "install", "run", "done", "close", "FREE" };
363 static Edpool edpool;
364 static Tdpool tdpool;
365 static Ctlr* ctlrs[Nhcis];
367 static char EnotWritten[] = "usb write unfinished";
368 static char EnotRead[] = "usb read unfinished";
369 static char Eunderrun[] = "usb endpoint underrun";
371 static QLock usbhstate; /* protects name space state */
373 static int schedendpt(Ctlr *ub, Ep *ep);
374 static void unschedendpt(Ctlr *ub, Ep *ep);
375 static long qtd(Ctlr*, Ep*, int, Block*, uchar*, uchar*, int, ulong);
377 static char* errmsgs[] =
380 [Tdbitstuff] "bit stuffing error",
381 [Tdbadtog] "bad toggle",
382 [Tdstalled] Estalled,
383 [Tdtmout] "timeout error",
384 [Tdpidchk] "pid check error",
385 [Tdbadpid] "bad pid",
386 [Tddataovr] "data overrun",
387 [Tddataund] "data underrun",
388 [Tdbufovr] "buffer overrun",
389 [Tdbufund] "buffer underrun",
390 [Tdnotacc] "not accessed"
414 int frame = ub->hcca->framenumber & 0x3f;
418 } while(frame == (ub->hcca->framenumber & 0x3f));
425 if(err < nelem(errmsgs))
433 return pa2ptr(ctlr->ohci->ctlheaded);
439 return pa2ptr(ctlr->ohci->bulkheaded);
443 edlinked(Ed *ed, Ed *next)
446 print("edlinked: nil ed: pc %#p\n", getcallerpc(&ed));
447 ed->nexted = ptr2pa(next);
452 setctlhd(Ctlr *ctlr, Ed *ed)
454 ctlr->ohci->ctlheaded = ptr2pa(ed);
456 ctlr->ohci->cmdsts |= Sclf; /* reload it on next pass */
460 setbulkhd(Ctlr *ctlr, Ed *ed)
462 ctlr->ohci->bulkheaded = ptr2pa(ed);
464 ctlr->ohci->cmdsts |= Sblf; /* reload it on next pass */
468 unlinkctl(Ctlr *ctlr, Ed *ed)
470 Ed *this, *prev, *next;
472 ctlr->ohci->control &= ~Ccle;
475 ctlr->ohci->ctlcurred = 0;
477 while(this != nil && this != ed){
482 print("unlinkctl: not found\n");
487 setctlhd(ctlr, next);
489 edlinked(prev, next);
490 ctlr->ohci->control |= Ccle;
491 edlinked(ed, nil); /* wipe out next field */
495 unlinkbulk(Ctlr *ctlr, Ed *ed)
497 Ed *this, *prev, *next;
499 ctlr->ohci->control &= ~Cble;
502 ctlr->ohci->bulkcurred = 0;
504 while(this != nil && this != ed){
509 print("unlinkbulk: not found\n");
514 setbulkhd(ctlr, next);
516 edlinked(prev, next);
517 ctlr->ohci->control |= Cble;
518 edlinked(ed, nil); /* wipe out next field */
522 edsetaddr(Ed *ed, ulong addr)
526 ctrl = ed->ctrl & ~((Epmax<<7)|Devmax);
527 ctrl |= (addr & ((Epmax<<7)|Devmax));
532 edsettog(Ed *ed, int c)
535 ed->head |= Edtoggle;
537 ed->head &= ~Edtoggle;
543 return ed->head & Edtoggle;
549 return ed->head & Edhalt;
555 return (ed->ctrl >> Edmpsshift) & Edmpsmask;
559 edsetmaxpkt(Ed *ed, int m)
563 c = ed->ctrl & ~(Edmpsmask << Edmpsshift);
564 ed->ctrl = c | ((m&Edmpsmask) << Edmpsshift);
570 return (td->ctrl >> Tdccshift) & Tdccmask;
576 return (td->ctrl & Tdtokmask);
587 if(tdpool.free == nil){
588 ddprint("ohci: tdalloc %d Tds\n", Incr);
589 pool = xspanalloc(Incr*sizeof(Td), Align, 0);
592 for(i=Incr; --i>=0;){
593 pool[i].next = tdpool.free;
594 tdpool.free = &pool[i];
596 tdpool.nalloc += Incr;
597 tdpool.nfree += Incr;
602 tdpool.free = td->next;
603 memset(td, 0, sizeof(Td));
606 assert(((uintptr)td & 0xF) == 0);
618 if(td->nexttd == 0x77777777)
619 panic("ohci: tdfree: double free");
620 memset(td, 7, sizeof(Td)); /* poison */
621 td->next = tdpool.free;
635 if(edpool.free == nil){
636 ddprint("ohci: edalloc %d Eds\n", Incr);
637 pool = xspanalloc(Incr*sizeof(Ed), Align, 0);
640 for(i=Incr; --i>=0;){
641 pool[i].next = edpool.free;
642 edpool.free = &pool[i];
644 edpool.nalloc += Incr;
645 edpool.nfree += Incr;
650 edpool.free = ed->next;
651 memset(ed, 0, sizeof(Ed));
666 for(td = ed->tds; td != nil; td = next){
670 print("ohci: bug: ed with more than 2000 tds\n");
675 if(ed->nexted == 0x99999999)
676 panic("ohci: edfree: double free");
677 memset(ed, 9, sizeof(Ed)); /* poison */
678 ed->next = edpool.free;
683 ddprint("edfree: ed %#p\n", ed);
687 * return smallest power of 2 >= n
694 for(i = 0; (1 << i) < n; i++)
700 * return smallest power of 2 <= n
707 for(i = 0; (1 << (i + 1)) <= n; i++)
713 pickschedq(Qtree *qt, int pollival, ulong bw, ulong limit)
715 int i, j, d, upperb, q;
716 ulong best, worst, total;
718 d = flog2lower(pollival);
724 upperb = (1 << (d+1)) - 1;
725 for(i = (1 << d) - 1; i < upperb; i++){
727 for(j = i; j > 0; j = (j - 1) / 2)
736 if(worst + bw >= limit)
742 schedq(Ctlr *ctlr, Qio *io, int pollival)
747 q = pickschedq(ctlr->tree, pollival, io->bw, ~0);
748 ddqprint("ohci: sched %#p q %d, ival %d, bw %ld\n", io, q, pollival, io->bw);
750 print("ohci: no room for ed\n");
753 ctlr->tree->bw[q] += io->bw;
754 ted = ctlr->tree->root[q];
756 edlinked(io->ed, ted->next);
757 edlinked(ted, io->ed);
758 io->ed->inext = ctlr->intrhd;
759 ctlr->intrhd = io->ed;
764 unschedq(Ctlr *ctlr, Qio *qio)
767 Ed *prev, *this, *next;
773 ctlr->tree->bw[q] -= qio->bw;
775 prev = ctlr->tree->root[q];
777 while(this != nil && this != qio->ed){
782 print("ohci: unschedq %d: not found\n", q);
785 edlinked(prev, next);
788 for(l = &ctlr->intrhd; *l != nil; l = &(*l)->inext)
793 print("ohci: unschedq: ed %#p not found\n", qio->ed);
797 seprinttdtok(char *s, char *e, int tok)
801 s = seprint(s, e, " setup");
804 s = seprint(s, e, " in");
807 s = seprint(s, e, " out");
815 seprinttd(char *s, char *e, Td *td, int iso)
821 return seprint(s, e, "<nil td>\n");
822 s = seprint(s, e, "%#p ep %#p ctrl %#p", td, td->ep, td->ctrl);
823 s = seprint(s, e, " cc=%#ulx", (td->ctrl >> Tdccshift) & Tdccmask);
825 if((td->ctrl & Tdround) != 0)
826 s = seprint(s, e, " rnd");
827 s = seprinttdtok(s, e, td->ctrl & Tdtokmask);
828 if((td->ctrl & Tdusetog) != 0)
829 s = seprint(s, e, " d%d", (td->ctrl & Tddata1) ? 1 : 0);
831 s = seprint(s, e, " d-");
832 s = seprint(s, e, " ec=%uld", (td->ctrl >> Tderrshift) & Tderrmask);
834 s = seprint(s, e, " fc=%uld", (td->ctrl >> Tdfcshift) & Tdfcmask);
835 s = seprint(s, e, " sf=%uld", td->ctrl & Tdsfmask);
837 s = seprint(s, e, " cbp0 %#p cbp %#p next %#p be %#p %s",
838 td->cbp0, td->cbp, td->nexttd, td->be, td->last ? "last" : "");
839 s = seprint(s, e, "\n\t\t%ld bytes", td->nbytes);
840 if((bp = td->bp) != nil){
841 s = seprint(s, e, " rp %#p wp %#p ", bp->rp, bp->wp);
843 s = seprintdata(s, e, bp->rp, bp->wp - bp->rp);
846 return seprint(s, e, "\n");
847 s = seprint(s, e, "\n\t\t");
848 /* we use only offsets[0] */
850 s = seprint(s, e, "[%d] %#ux cc=%#ux sz=%ud\n", i, td->offsets[i],
851 (td->offsets[i] >> Tdiccshift) & Tdiccmask,
852 td->offsets[i] & 0x7FF);
857 dumptd(Td *td, char *p, int iso)
859 static char buf[512]; /* Too much */
862 s = seprint(buf, buf+sizeof(buf), "%s: ", p);
863 s = seprinttd(s, buf+sizeof(buf), td, iso);
864 if(s > buf && s[-1] != '\n')
870 dumptds(Td *td, char *p, int iso)
874 for(i = 0; td != nil; td = td->next){
878 if(tdtok(td) == Tdtokin && ++i > 2){
891 print("<null ed>\n");
895 /* no waserror; may want to use from interrupt context */
899 s = seprint(buf, e, "\ted %#p: ctrl %#p", ed, ed->ctrl);
900 if((ed->ctrl & Edskip) != 0)
901 s = seprint(s, e, " skip");
902 if((ed->ctrl & Ediso) != 0)
903 s = seprint(s, e, " iso");
904 if((ed->ctrl & Edlow) != 0)
905 s = seprint(s, e, " low");
906 s = seprint(s, e, " d%d", (ed->head & Edtoggle) ? 1 : 0);
907 if((ed->ctrl & Eddirmask) == Edin)
908 s = seprint(s, e, " in");
909 if((ed->ctrl & Eddirmask) == Edout)
910 s = seprint(s, e, " out");
912 s = seprint(s, e, " hlt");
913 s = seprint(s, e, " ep%uld.%uld", (ed->ctrl>>7)&Epmax, ed->ctrl&0x7f);
914 s = seprint(s, e, " maxpkt %uld", (ed->ctrl>>Edmpsshift)&Edmpsmask);
915 seprint(s, e, " tail %#p head %#p next %#p\n",ed->tail,ed->head,ed->nexted);
918 if(ed->tds != nil && (ed->ctrl & Ediso) == 0)
919 dumptds(ed->tds, "td", 0);
923 seprintio(char *s, char *e, Qio *io, char *pref)
925 s = seprint(s, e, "%s qio %#p ed %#p", pref, io, io->ed);
926 s = seprint(s, e, " tog %d iot %ld err %s id %#ulx",
927 io->toggle, io->iotime, io->err, io->usbid);
928 s = seprinttdtok(s, e, io->tok);
929 s = seprint(s, e, " %s\n", iosname[io->state]);
934 seprintep(char* s, char* e, Ep *ep)
941 return seprint(s, e, "<nil ep>\n");
943 return seprint(s, e, "no mdep\n");
947 s = seprintio(s, e, cio, "c");
948 s = seprint(s, e, "\trepl %d ndata %d\n", ep->rhrepl, cio->ndata);
953 if(ep->mode != OWRITE)
954 s = seprintio(s, e, &io[OREAD], "r");
955 if(ep->mode != OREAD)
956 s = seprintio(s, e, &io[OWRITE], "w");
960 s = seprintio(s, e, iso, "w");
961 s = seprint(s, e, "\tntds %d avail %d frno %uld left %uld next avail %#p\n",
962 iso->nframes, iso->navail, iso->frno, iso->left, iso->atds);
969 seprintctl(char *s, char *se, ulong ctl)
971 s = seprint(s, se, "en=");
973 s = seprint(s, se, "p");
975 s = seprint(s, se, "i");
977 s = seprint(s, se, "c");
979 s = seprint(s, se, "b");
980 switch(ctl & Cfsmask){
982 return seprint(s, se, " reset");
984 return seprint(s, se, " resume");
986 return seprint(s, se, " run");
988 return seprint(s, se, " suspend");
990 return seprint(s, se, " ???");
1003 seprintctl(cs, cs+sizeof(cs), ctlr->ohci->control);
1004 print("ohci ctlr %#p: frno %#ux ctl %#lux %s sts %#lux intr %#lux\n",
1005 ctlr, ctlr->hcca->framenumber, ctlr->ohci->control, cs,
1006 ctlr->ohci->cmdsts, ctlr->ohci->intrsts);
1007 print("ctlhd %#ulx cur %#ulx bulkhd %#ulx cur %#ulx done %#ulx\n",
1008 ctlr->ohci->ctlheaded, ctlr->ohci->ctlcurred,
1009 ctlr->ohci->bulkheaded, ctlr->ohci->bulkcurred,
1010 ctlr->ohci->donehead);
1011 if(ctlhd(ctlr) != nil)
1013 for(ed = ctlhd(ctlr); ed != nil; ed = ed->next)
1015 if(bulkhd(ctlr) != nil)
1017 for(ed = bulkhd(ctlr); ed != nil; ed = ed->next)
1019 if(ctlr->intrhd != nil)
1021 for(ed = ctlr->intrhd; ed != nil; ed = ed->inext)
1023 if(ctlr->tree->root[0]->next != nil)
1025 for(ed = ctlr->tree->root[0]->next; ed != nil; ed = ed->next)
1027 print("%d eds in tree\n", ctlr->ntree);
1030 print("%d tds allocated = %d in use + %d free\n",
1031 tdpool.nalloc, tdpool.ninuse, tdpool.nfree);
1034 print("%d eds allocated = %d in use + %d free\n",
1035 edpool.nalloc, edpool.ninuse, edpool.nfree);
1040 * Compute size for the next iso Td and setup its
1041 * descriptor for I/O according to the buffer size.
1044 isodtdinit(Ep *ep, Isoio *iso, Td *td)
1051 assert(bp != nil && BLEN(bp) == 0);
1052 size = (ep->hz+iso->left) * ep->pollival / 1000;
1053 iso->left = (ep->hz+iso->left) * ep->pollival % 1000;
1054 size *= ep->samplesz;
1055 if(size > ep->maxpkt){
1056 print("ohci: ep%d.%d: size > maxpkt\n",
1057 ep->dev->nb, ep->nb);
1058 print("size = %uld max = %ld\n", size, ep->maxpkt);
1062 memset(bp->wp, 0, size); /* in case we don't fill it on time */
1063 td->cbp0 = td->cbp = ptr2pa(bp->rp) & ~0xFFF;
1064 td->ctrl = TRUNC(iso->frno, Ntdframes);
1065 td->offsets[0] = (ptr2pa(bp->rp) & 0xFFF);
1066 td->offsets[0] |= (Tdnotacc << Tdiccshift);
1067 /* in case the controller checks out the offests... */
1068 for(i = 1; i < nelem(td->offsets); i++)
1069 td->offsets[i] = td->offsets[0];
1070 td->be = ptr2pa(bp->rp + size - 1);
1071 td->ctrl |= (0 << Tdfcshift); /* frame count is 1 */
1073 iso->frno = TRUNC(iso->frno + ep->pollival, Ntdframes);
1077 * start I/O on the dummy td and setup a new dummy to fill up.
1080 isoadvance(Ep *ep, Isoio *iso, Td *td)
1085 iso->atds = dtd->anext;
1088 dtd->bp->wp = dtd->bp->rp;
1090 td->nexttd = ptr2pa(dtd);
1091 isodtdinit(ep, iso, dtd);
1092 iso->ed->tail = ptr2pa(dtd);
1096 isocanwrite(void *a)
1101 return iso->state == Qclose || iso->err != nil ||
1102 iso->navail > iso->nframes / 2;
1111 if(iso->state == Qclose || iso->err != nil || iso->delay == 0)
1113 return (iso->nframes - iso->navail) <= iso->delay;
1117 * Service a completed/failed Td from the done queue.
1118 * It may be of any transfer type.
1119 * The queue is not in completion order.
1120 * (It's actually in reverse completion order).
1122 * When an error, a short packet, or a last Td is found
1123 * we awake the process waiting for the transfer.
1124 * Although later we will process other Tds completed
1125 * before, epio won't be able to touch the current Td
1126 * until interrupt returns and releases the lock on the
1130 qhinterrupt(Ctlr *, Ep *ep, Qio *io, Td *td, int)
1137 if(io->state != Qrun)
1139 if(tdtok(td) == Tdtokin)
1147 case Tddataovr: /* Overrun is not an error */
1149 /* virtualbox doesn't always report underflow on short packets */
1154 /* short input packets are ok */
1157 panic("ohci: short packet but cbp == 0");
1159 * td->cbp and td->cbp0 are the real addresses
1160 * corresponding to virtual addresses bp->wp and
1161 * bp->rp respectively.
1163 bp->wp = bp->rp + (td->cbp - td->cbp0);
1165 panic("ohci: wp < rp");
1167 * It's ok. clear error and flag as last in xfer.
1168 * epio must ignore following Tds.
1171 td->ctrl &= ~(Tdccmask << Tdccshift);
1174 /* else fall; it's an error */
1182 bp->wp = bp->rp; /* no bytes in xfer. */
1183 io->err = errmsg(err);
1184 if(debug || ep->debug){
1185 print("tdinterrupt: failed err %d (%s)\n", err, io->err);
1186 dumptd(td, "failed", ed->ctrl & Ediso);
1191 panic("ohci: td cc %ud unknown", err);
1196 * clear td list and halt flag.
1198 ed->head = (ed->head & Edtoggle) | ed->tail;
1199 ed->tds = pa2ptr(ed->tail);
1206 * BUG: Iso input streams are not implemented.
1209 isointerrupt(Ctlr *ctlr, Ep *ep, Qio *io, Td *td, int)
1218 if(io->state == Qclose)
1222 * When we get more than half the frames consecutive errors
1223 * we signal an actual error. Errors in the entire Td are
1224 * more serious and are always singaled.
1225 * Errors like overrun are not really errors. In fact, for
1226 * output, errors cannot be really detected. The driver will
1227 * hopefully notice I/O errors on input endpoints and detach the device.
1230 isoerr = (td->offsets[0] >> Tdiccshift) & Tdiccmask;
1231 if(isoerr == Tdok || isoerr == Tdnotacc)
1233 else if(iso->nerrs++ > iso->nframes/2)
1235 if(err != Tdok && err != Tddataovr){
1237 io->err = errmsg(err);
1238 if(debug || ep->debug){
1239 print("ohci: isointerrupt: ep%d.%d: err %d (%s) frnum 0x%lux\n",
1240 ep->dev->nb, ep->nb,
1241 err, errmsg(err), ctlr->ohci->fmnumber);
1242 dumptd(td, "failed", ed->ctrl & Ediso);
1245 td->bp->wp = td->bp->rp;
1247 td->anext = iso->atds;
1251 * If almost all Tds are avail the user is not doing I/O at the
1252 * required rate. We put another Td in place to keep the polling rate.
1254 if(iso->err == nil && iso->navail > iso->nframes - 10)
1255 isoadvance(ep, iso, pa2ptr(iso->ed->tail));
1257 * If there's enough buffering futher I/O can be done.
1259 if(isocanwrite(iso))
1264 interrupt(Ureg *, void *arg)
1269 ulong status, curred;
1275 status = ctlr->ohci->intrsts;
1276 status &= ctlr->ohci->intrenable;
1277 status &= Oc|Rhsc|Fno|Ue|Rd|Sf|Wdh|So;
1278 frno = TRUNC(ctlr->ohci->fmnumber, Ntdframes);
1279 if((status & Wdh) != 0){
1280 /* lsb of donehead has bit to flag other intrs. */
1281 td = pa2ptr(ctlr->hcca->donehead & ~0xF);
1286 for(i = 0; td != nil && i < 1024; i++){
1287 if(0)ddprint("ohci tdinterrupt: td %#p\n", td);
1288 ntd = pa2ptr(td->nexttd & ~0xF);
1290 if(td->ep == nil || td->io == nil)
1291 panic("ohci: interrupt: ep %#p io %#p", td->ep, td->io);
1292 ohciinterrupts[td->ep->ttype]++;
1293 if(td->ep->ttype == Tiso)
1294 isointerrupt(ctlr, td->ep, td->io, td, frno);
1296 qhinterrupt(ctlr, td->ep, td->io, td, frno);
1300 print("ohci: bug: more than 1024 done Tds?\n");
1302 if(pa2ptr(ctlr->hcca->donehead & ~0xF) != td0)
1303 print("ohci: bug: donehead changed before ack\n");
1304 ctlr->hcca->donehead = 0;
1306 ctlr->ohci->intrsts = status;
1310 print("ohci: sched overrun: too much load\n");
1314 if((status & Ue) != 0){
1315 curred = ctlr->ohci->periodcurred;
1316 print("ohci: unrecoverable error frame 0x%.8lux ed 0x%.8lux, "
1317 "ints %d %d %d %d\n",
1318 ctlr->ohci->fmnumber, curred,
1319 ohciinterrupts[Tctl], ohciinterrupts[Tintr],
1320 ohciinterrupts[Tbulk], ohciinterrupts[Tiso]);
1322 dumped(pa2ptr(curred));
1326 print("ohci interrupt: unhandled sts 0x%.8lux\n", status);
1331 * The old dummy Td is used to implement the new Td.
1332 * A new dummy is linked at the end of the old one and
1333 * returned, to link further Tds if needed.
1336 epgettd(Ep *ep, Qio *io, Td **dtdp, int flags, void *a, int count)
1345 panic("ohci: transfer > two pages");
1346 /* maximum of one physical page crossing allowed */
1347 bp = allocb(count+BY2PG);
1348 bp->rp = (uchar*)PGROUND((uintptr)bp->rp);
1355 td->cbp0 = td->cbp = ptr2pa(bp->wp);
1356 td->be = ptr2pa(bp->wp + count - 1);
1358 /* validaddr((uintptr)a, count, 0); DEBUG */
1360 assert(bp->wp != nil);
1361 memmove(bp->wp, a, count);
1366 td->ctrl = io->tok|Tdusetog|io->toggle|flags;
1367 if(io->toggle == Tddata0)
1368 io->toggle = Tddata1;
1370 io->toggle = Tddata0;
1371 assert(td->ep == ep);
1373 dtd = tdalloc(); /* new dummy */
1375 td->nexttd = ptr2pa(dtd);
1382 * Try to get them idle
1394 for(td = ed->tds; td != nil; td = td->next)
1396 td->bp->wp = td->bp->rp;
1397 ed->head = (ed->head&0xF) | ed->tail;
1398 if((ed->ctrl & Ediso) == 0)
1399 ed->tds = pa2ptr(ed->tail);
1408 return io->state != Qrun;
1412 epiowait(Ctlr *ctlr, Qio *io, int tmout, ulong)
1418 if(0)ddqprint("ohci io %#p sleep on ed %#p state %s\n",
1419 io, ed, iosname[io->state]);
1422 dqprint("ohci io %#p ed %#p timed out\n", io, ed);
1426 sleep(io, epiodone, io);
1428 tsleep(io, epiodone, io, tmout);
1432 if(io->state == Qrun)
1434 else if(io->state != Qdone && io->state != Qclose)
1435 panic("epio: ed not done and not closed");
1438 io->err = "request timed out";
1441 tsleep(&up->sleep, return0, 0, Abortdelay);
1446 if(io->state != Qclose)
1453 * To make it work for control transfers, the caller may
1454 * lock the Qio for the entire control transfer.
1457 epio(Ep *ep, Qio *io, void *a, long count, int mustlock)
1464 Td *td, *ltd, *ntd, *td0;
1465 int last, ntds, tmout;
1471 io->debug = ep->debug;
1473 ddeprint("ohci: %s ep%d.%d io %#p count %ld\n",
1474 io->tok == Tdtokin ? "in" : "out",
1475 ep->dev->nb, ep->nb, io, count);
1476 if((debug > 1 || ep->debug > 1) && io->tok != Tdtokin){
1477 seprintdata(buf, buf+sizeof(buf), a, count);
1478 print("\t%s\n", buf);
1489 if(io->state == Qclose){ /* Tds released by cancelio */
1491 error(io->err ? io->err : Eio);
1493 if(io->state != Qidle)
1494 panic("epio: qio not idle");
1495 io->state = Qinstall;
1498 ltd = td0 = ed->tds;
1504 if(c != nil && io->tok != Tdtokin)
1505 td = epgettd(ep, io, <d, 0, c+tot, n);
1507 td = epgettd(ep, io, <d, 0, nil, n);
1510 }while(tot < count);
1511 if(td0 == nil || ltd == nil || td0 == ltd)
1512 panic("epio: no td");
1514 if(debug > 2 || ep->debug > 2)
1515 dumptds(td0, "put td", ep->ttype == Tiso);
1519 if(io->state != Qclose){
1520 io->iotime = TK2MS(MACHP(0)->ticks);
1522 ed->tail = ptr2pa(ltd);
1523 if(ep->ttype == Tctl)
1524 ctlr->ohci->cmdsts |= Sclf;
1525 else if(ep->ttype == Tbulk)
1526 ctlr->ohci->cmdsts |= Sblf;
1530 epiowait(ctlr, io, tmout, load);
1532 if(debug > 1 || ep->debug > 1)
1533 dumptds(td0, "got td", 0);
1539 for(td = td0; td != ltd; td = ntd){
1542 * If the Td is flagged as last we must
1543 * ignore any following Td. The block may
1544 * seem to have bytes but interrupt has not seen
1545 * those Tds through the done queue, and they are void.
1547 if(last == 0 && tderrs(td) == Tdok){
1550 if(c != nil && tdtok(td) == Tdtokin && n > 0){
1551 memmove(c, td->bp->rp, n);
1559 if(edtoggle(ed) == 0)
1560 io->toggle = Tddata0;
1562 io->toggle = Tddata1;
1569 ddeprint("ohci: io %#p: %d tds: return %ld err '%s'\n\n",
1570 io, ntds, tot, err);
1579 * halt condition was cleared on the endpoint. update our toggles.
1591 if(ep->mode != OREAD){
1593 io[OWRITE].toggle = Tddata0;
1594 deprint("ep clrhalt for io %#p\n", io+OWRITE);
1595 qunlock(&io[OWRITE]);
1597 if(ep->mode != OWRITE){
1599 io[OREAD].toggle = Tddata0;
1600 deprint("ep clrhalt for io %#p\n", io+OREAD);
1601 qunlock(&io[OREAD]);
1608 epread(Ep *ep, void *a, long count)
1616 panic("epread: not open");
1626 ddeprint("epread ctl ndata %d\n", cio->ndata);
1628 error("request expected");
1629 else if(cio->ndata == 0){
1633 if(count > cio->ndata)
1636 memmove(a, cio->data, count);
1637 /* BUG for big transfers */
1640 cio->ndata = 0; /* signal EOF next time */
1644 if(debug>1 || ep->debug){
1645 seprintdata(buf, buf+sizeof(buf), a, count);
1646 print("epread: %s\n", buf);
1653 return epio(ep, &io[OREAD], a, count, 1);
1656 delta = TK2MS(MACHP(0)->ticks) - io[OREAD].iotime + 1;
1657 if(delta < ep->pollival / 2)
1658 tsleep(&up->sleep, return0, 0, ep->pollival/2 - delta);
1661 return epio(ep, &io[OREAD], a, count, 1);
1663 panic("ohci: iso read not implemented");
1666 panic("epread: bad ep ttype %d", ep->ttype);
1672 * Control transfers are one setup write (data0)
1673 * plus zero or more reads/writes (data1, data0, ...)
1674 * plus a final write/read with data1 to ack.
1675 * For both host to device and device to host we perform
1676 * the entire transfer when the user writes the request,
1677 * and keep any data read from the device for a later read.
1678 * We call epio three times instead of placing all Tds at
1679 * the same time because doing so leads to crc/tmout errors
1681 * Upon errors on the data phase we must still run the status
1682 * phase or the device may cease responding in the future.
1685 epctlio(Ep *ep, Ctlio *cio, void *a, long count)
1690 ddeprint("epctlio: cio %#p ep%d.%d count %ld\n",
1691 cio, ep->dev->nb, ep->nb, count);
1692 if(count < Rsetuplen)
1693 error("short usb command");
1706 /* set the address if unset and out of configuration state */
1707 if(ep->dev->state != Dconfig && ep->dev->state != Dreset)
1708 if(cio->usbid == 0){
1709 cio->usbid = (ep->nb<<7)|(ep->dev->nb & Devmax);
1710 edsetaddr(cio->ed, cio->usbid);
1712 /* adjust maxpkt if the user has learned a different one */
1713 if(edmaxpkt(cio->ed) != ep->maxpkt)
1714 edsetmaxpkt(cio->ed, ep->maxpkt);
1716 cio->tok = Tdtoksetup;
1717 cio->toggle = Tddata0;
1718 if(epio(ep, cio, a, Rsetuplen, 0) < Rsetuplen)
1724 cio->toggle = Tddata1;
1725 if(c[Rtype] & Rd2h){
1727 len = GET2(c+Rcount);
1729 error("bad length in d2h request");
1731 error("d2h data too large to fit in ohci");
1732 a = cio->data = smalloc(len+1);
1734 cio->tok = Tdtokout;
1741 len = epio(ep, cio, a, len, 0);
1744 if(c[Rtype] & Rd2h){
1747 cio->tok = Tdtokout;
1752 count = Rsetuplen + len;
1755 cio->toggle = Tddata1;
1756 epio(ep, cio, nil, 0, 0);
1759 ddeprint("epctlio cio %#p return %ld\n", cio, count);
1764 * Put new samples in the dummy Td.
1765 * BUG: This does only a transfer per Td. We could do up to 8.
1768 putsamples(Ctlr *ctlr, Ep *ep, Isoio *iso, uchar *b, long count)
1773 td = pa2ptr(iso->ed->tail);
1775 if(n > td->nbytes - BLEN(td->bp))
1776 n = td->nbytes - BLEN(td->bp);
1777 assert(td->bp->wp + n <= td->bp->lim);
1778 memmove(td->bp->wp, b, n);
1780 if(BLEN(td->bp) == td->nbytes){ /* full Td: activate it */
1782 isoadvance(ep, iso, td);
1789 episowrite(Ep *ep, void *a, long count)
1799 iso->delay = (ep->sampledelay*ep->samplesz + ep->maxpkt-1) / ep->maxpkt;
1800 iso->debug = ep->debug;
1807 diprint("ohci: episowrite: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
1809 if(iso->state == Qclose){
1811 error(iso->err ? iso->err : Eio);
1815 for(tot = 0; tot < count; tot += nw){
1816 while(isocanwrite(iso) == 0){
1818 diprint("ohci: episowrite: %#p sleep\n", iso);
1821 iso->err = "I/O timed out";
1825 tsleep(iso, isocanwrite, iso, ep->tmout);
1831 if(iso->state == Qclose || err != nil){
1833 error(err ? err : Eio);
1835 if(iso->state != Qrun)
1836 panic("episowrite: iso not running");
1837 iunlock(ctlr); /* We could page fault here */
1838 nw = putsamples(ctlr, ep, iso, b+tot, count-tot);
1841 while(isodelay(iso) == 0){
1843 sleep(iso, isodelay, iso);
1846 if(iso->state != Qclose)
1849 err = iso->err; /* in case it failed early */
1855 diprint("ohci: episowrite: %#p %ld bytes\n", iso, tot);
1860 epwrite(Ep *ep, void *a, long count)
1869 panic("ohci: epwrite: not open");
1873 return epctlio(ep, cio, a, count);
1879 * Put at most Tdatomic Tds (512 bytes) at a time.
1880 * Otherwise some devices produce babble errors.
1884 for(tot = 0; tot < count ; tot += nw){
1886 if(nw > Tdatomic * ep->maxpkt)
1887 nw = Tdatomic * ep->maxpkt;
1888 nw = epio(ep, &io[OWRITE], b+tot, nw, 1);
1893 delta = TK2MS(MACHP(0)->ticks) - io[OWRITE].iotime + 1;
1894 if(delta < ep->pollival)
1895 tsleep(&up->sleep, return0, 0, ep->pollival - delta);
1898 return epio(ep, &io[OWRITE], a, count, 1);
1900 return episowrite(ep, a, count);
1902 panic("ohci: epwrite: bad ep ttype %d", ep->ttype);
1908 newed(Ctlr *ctlr, Ep *ep, Qio *io, char *)
1913 ed = io->ed = edalloc(); /* no errors raised here, really */
1917 ed->tail = ptr2pa(td);
1918 ed->head = ptr2pa(td);
1921 ed->ctrl = (ep->maxpkt & Edmpsmask) << Edmpsshift;
1922 if(ep->ttype == Tiso)
1929 /* For setup endpoints we start with the config address */
1930 if(ep->ttype != Tctl)
1931 edsetaddr(io->ed, io->usbid);
1932 if(ep->dev->speed == Lowspeed)
1942 ed->ctrl |= Edtddir; /* Td will say */
1949 edlinked(ed, ctlhd(ctlr));
1955 edlinked(ed, bulkhd(ctlr));
1956 setbulkhd(ctlr, ed);
1962 schedq(ctlr, io, ep->pollival);
1966 panic("ohci: newed: bad ttype");
1973 isoopen(Ctlr *ctlr, Ep *ep)
1980 iso->usbid = (ep->nb<<7)|(ep->dev->nb & Devmax);
1981 iso->bw = ep->hz * ep->samplesz; /* bytes/sec */
1982 if(ep->mode != OWRITE){
1983 print("ohci: bug: iso input streams not implemented\n");
1984 error("ohci iso input streams not implemented");
1986 iso->tok = Tdtokout;
1990 iso->frno = TRUNC(ctlr->ohci->fmnumber + 10, Ntdframes);
1991 iso->nframes = 1000 / ep->pollival;
1992 if(iso->nframes < 10){
1993 print("ohci: isoopen: less than 10 frames; using 10.\n");
1996 iso->navail = iso->nframes;
1997 iso->atds = edtds = nil;
1998 for(i = 0; i < iso->nframes-1; i++){ /* -1 for dummy */
2002 td->bp = allocb(ep->maxpkt);
2003 td->anext = iso->atds; /* link as avail */
2008 newed(ctlr, ep, iso, "iso"); /* allocates a dummy td */
2009 iso->ed->tds->bp = allocb(ep->maxpkt); /* but not its block */
2010 iso->ed->tds->next = edtds;
2011 isodtdinit(ep, iso, iso->ed->tds);
2015 * Allocate the endpoint and set it up for I/O
2016 * in the controller. This must follow what's said
2017 * in Ep regarding configuration, including perhaps
2018 * the saved toggles (saved on a previous close of
2019 * the endpoint data file by epclose).
2030 deprint("ohci: epopen ep%d.%d\n", ep->dev->nb, ep->nb);
2032 panic("ohci: epopen called with open ep");
2040 error("endpoint not configured");
2042 ep->aux = smalloc(sizeof(Isoio));
2046 cio = ep->aux = smalloc(sizeof(Ctlio));
2047 cio->debug = ep->debug;
2050 cio->tok = -1; /* invalid; Tds will say */
2051 if(ep->dev->isroot != 0 && ep->nb == 0) /* root hub */
2053 newed(ctlr, ep, cio, "epc");
2056 ep->pollival = 1; /* assume this; doesn't really matter */
2059 io = ep->aux = smalloc(sizeof(Qio)*2);
2060 io[OREAD].debug = io[OWRITE].debug = ep->debug;
2061 usbid = (ep->nb<<7)|(ep->dev->nb & Devmax);
2062 if(ep->mode != OREAD){
2063 if(ep->toggle[OWRITE] != 0)
2064 io[OWRITE].toggle = Tddata1;
2066 io[OWRITE].toggle = Tddata0;
2067 io[OWRITE].tok = Tdtokout;
2068 io[OWRITE].usbid = usbid;
2069 io[OWRITE].bw = ep->maxpkt*1000/ep->pollival; /* bytes/s */
2070 newed(ctlr, ep, io+OWRITE, "epw");
2072 if(ep->mode != OWRITE){
2073 if(ep->toggle[OREAD] != 0)
2074 io[OREAD].toggle = Tddata1;
2076 io[OREAD].toggle = Tddata0;
2077 io[OREAD].tok = Tdtokin;
2078 io[OREAD].usbid = usbid;
2079 io[OREAD].bw = ep->maxpkt*1000/ep->pollival; /* bytes/s */
2080 newed(ctlr, ep, io+OREAD, "epr");
2084 deprint("ohci: epopen done:\n");
2085 if(debug || ep->debug)
2091 cancelio(Ep *ep, Qio *io)
2099 if(io == nil || io->state == Qclose){
2100 assert(io == nil || io->ed == nil);
2110 tsleep(&up->sleep, return0, 0, Abortdelay);
2116 /* wait for epio if running */
2122 unlinkctl(ctlr, ed);
2125 unlinkbulk(ctlr, ed);
2132 panic("ohci cancelio: bad ttype");
2146 deprint("ohci: epclose ep%d.%d\n", ep->dev->nb, ep->nb);
2148 panic("ohci: epclose called with closed ep");
2159 if(ep->mode != OWRITE){
2160 cancelio(ep, &io[OREAD]);
2161 if(io[OREAD].toggle == Tddata1)
2162 ep->toggle[OREAD] = 1;
2164 if(ep->mode != OREAD){
2165 cancelio(ep, &io[OWRITE]);
2166 if(io[OWRITE].toggle == Tddata1)
2167 ep->toggle[OWRITE] = 1;
2175 panic("epclose: bad ttype %d", ep->ttype);
2178 deprint("ohci: epclose ep%d.%d: done\n", ep->dev->nb, ep->nb);
2184 portreset(Hci *hp, int port, int on)
2193 eqlock(&ctlr->resetl);
2195 qunlock(&ctlr->resetl);
2200 ohci->rhportsts[port - 1] = Spp;
2201 if((ohci->rhportsts[port - 1] & Ccs) == 0){
2203 error("port not connected");
2205 ohci->rhportsts[port - 1] = Spr;
2206 while((ohci->rhportsts[port - 1] & Prsc) == 0){
2208 dprint("ohci: portreset, wait for reset complete\n");
2211 ohci->rhportsts[port - 1] = Prsc;
2214 qunlock(&ctlr->resetl);
2219 portenable(Hci *hp, int port, int on)
2224 dprint("ohci: %#p port %d enable=%d\n", ctlr->ohci, port, on);
2225 eqlock(&ctlr->resetl);
2227 qunlock(&ctlr->resetl);
2232 ctlr->ohci->rhportsts[port - 1] = Spe | Spp;
2234 ctlr->ohci->rhportsts[port - 1] = Cpe;
2236 tsleep(&up->sleep, return0, 0, Enabledelay);
2238 qunlock(&ctlr->resetl);
2243 portstatus(Hci *hp, int port)
2250 * We must return status bits as a
2251 * get port status hub request would do.
2254 ohcistatus = ub->ohci->rhportsts[port - 1];
2256 if(ohcistatus & Ccs)
2258 if(ohcistatus & Pes)
2260 if(ohcistatus & Pss)
2262 if(ohcistatus & Prs)
2265 /* port is not in reset; these potential writes are ok */
2266 if(ohcistatus & Csc){
2268 ub->ohci->rhportsts[port - 1] = Csc;
2270 if(ohcistatus & Pesc){
2272 ub->ohci->rhportsts[port - 1] = Pesc;
2275 if(ohcistatus & Lsda)
2277 if(v & (HPstatuschg|HPchange))
2278 ddprint("ohci port %d sts %#ulx hub sts %#x\n", port, ohcistatus, v);
2283 dumpohci(Ctlr *ctlr)
2288 ohci = &ctlr->ohci->revision;
2289 print("ohci registers: \n");
2290 for(i = 0; i < sizeof(Ohci)/sizeof(ulong); i++)
2291 if(i < 3 || ohci[i] != 0)
2292 print("\t[%#2.2x]\t%#8.8ulx\n", i * 4, ohci[i]);
2302 ulong ival, ctrl, fmi;
2305 dprint("ohci %#p init\n", ctlr->ohci);
2308 fmi = ctlr->ohci->fminterval;
2309 ctlr->ohci->cmdsts = Shcr; /* reset the block */
2310 while(ctlr->ohci->cmdsts & Shcr)
2311 delay(1); /* wait till reset complete, Ohci says 10us max. */
2312 ctlr->ohci->fminterval = fmi;
2315 * now that soft reset is done we are in suspend state.
2316 * Setup registers which take in suspend state
2317 * (will only be here for 2ms).
2320 ctlr->ohci->hcca = ptr2pa(ctlr->hcca);
2321 setctlhd(ctlr, nil);
2322 ctlr->ohci->ctlcurred = 0;
2323 setbulkhd(ctlr, nil);
2324 ctlr->ohci->bulkcurred = 0;
2326 ohci->intrenable = Mie | Wdh | Ue;
2327 ohci->control |= Ccle | Cble | Cple | Cie | Cfsoper;
2329 /* set frame after operational */
2330 ohci->rhdesca = Nps; /* no power switching */
2331 if(ohci->rhdesca & Nps){
2332 dprint("ohci: ports are not power switched\n");
2334 dprint("ohci: ports are power switched\n");
2335 ohci->rhdesca &= ~Psm;
2336 ohci->rhsts &= ~Lpsc;
2338 for(i = 0; i < ctlr->nports; i++) /* paranoia */
2339 ohci->rhportsts[i] = 0; /* this has no effect */
2342 for(i = 0; i < ctlr->nports; i++){
2343 ohci->rhportsts[i] = Spp;
2344 if((ohci->rhportsts[i] & Ccs) != 0)
2345 ohci->rhportsts[i] |= Spr;
2349 ctrl = ohci->control;
2350 if((ctrl & Cfsmask) != Cfsoper){
2351 ctrl = (ctrl & ~Cfsmask) | Cfsoper;
2352 ohci->control = ctrl;
2355 ival = ohci->fminterval & ~(Fmaxpktmask << Fmaxpktshift);
2356 ohci->fminterval = ival | (5120 << Fmaxpktshift);
2369 static int already = 0;
2375 while(p = pcimatch(p, 0, 0)) {
2377 * Find Ohci controllers (Programming Interface = 0x10).
2379 if(p->ccrb != Pcibcserial || p->ccru != Pciscusb ||
2382 mem = p->mem[0].bar & ~0x0F;
2383 dprint("ohci: %x/%x port 0x%lux size 0x%x irq %d\n",
2384 p->vid, p->did, mem, p->mem[0].size, p->intl);
2386 print("usbohci: failed to map registers\n");
2389 if(p->intl == 0xFF || p->intl == 0) {
2390 print("usbohci: no irq assigned for port %#lux\n", mem);
2394 ctlr = malloc(sizeof(Ctlr));
2396 print("usbohci: no memory\n");
2400 ctlr->ohci = vmap(mem, p->mem[0].size);
2401 dprint("scanpci: ctlr %#p, ohci %#p\n", ctlr, ctlr->ohci);
2404 for(i = 0; i < Nhcis; i++)
2405 if(ctlrs[i] == nil){
2410 print("usbohci: bug: no more controllers\n");
2415 usbdebug(Hci*, int d)
2421 * build the periodic scheduling tree:
2422 * framesize must be a multiple of the tree size
2425 mkqhtree(Ctlr *ctlr)
2427 int i, n, d, o, leaf0, depth;
2432 n = (1 << (depth+1)) - 1;
2433 qt = mallocz(sizeof(*qt), 1);
2435 panic("usb: can't allocate scheduling tree");
2438 qt->bw = mallocz(n * sizeof(qt->bw), 1);
2439 qt->root = tree = mallocz(n * sizeof(Ed *), 1);
2440 if(qt->bw == nil || qt->root == nil)
2441 panic("usb: can't allocate scheduling tree");
2442 for(i = 0; i < n; i++){
2443 if((tree[i] = edalloc()) == nil)
2445 tree[i]->ctrl = (8 << Edmpsshift); /* not needed */
2446 tree[i]->ctrl |= Edskip;
2449 edlinked(tree[i], tree[(i-1)/2]);
2451 edlinked(tree[i], nil);
2454 dprint("ohci: tree: %d endpoints allocated\n", i);
2456 /* distribute leaves evenly round the frame list */
2458 for(i = 0; i < 32; i++){
2460 for(d = 0; d < depth; d++){
2466 print("leaf0=%d o=%d i=%d n=%d\n", leaf0, o, i, n);
2469 ctlr->hcca->intrtable[i] = ptr2pa(tree[leaf0 + o]);
2475 ohcimeminit(Ctlr *ctlr)
2479 edfree(edalloc()); /* allocate pools now */
2482 hcca = xspanalloc(sizeof(Hcca), 256, 0);
2484 panic("usbhreset: no memory for Hcca");
2485 memset(hcca, 0, sizeof(*hcca));
2492 ohcireset(Ctlr *ctlr)
2495 dprint("ohci %#p reset\n", ctlr->ohci);
2498 * usually enter here in reset, wait till its through,
2499 * then do our own so we are on known timing conditions.
2503 ctlr->ohci->control = 0;
2506 /* legacy support register: turn off lunacy mode */
2507 pcicfgw16(ctlr->pcidev, 0xc0, 0x2000);
2520 ctlr->ohci->intrenable = 0;
2521 ctlr->ohci->control = 0;
2532 static Lock resetlck;
2534 if(getconf("*nousbohci"))
2540 * Any adapter matches if no hp->port is supplied,
2541 * otherwise the ports must match.
2544 for(i = 0; i < Nhcis && ctlrs[i] != nil; i++){
2546 if(ctlr->active == 0)
2547 if(hp->port == 0 || hp->port == (uintptr)ctlr->ohci){
2553 if(ctlrs[i] == nil || i == Nhcis)
2555 if(ctlr->ohci->control == ~0)
2561 hp->port = (uintptr)ctlr->ohci;
2564 ctlr->nports = hp->nports = ctlr->ohci->rhdesca & 0xff;
2570 * Linkage to the generic HCI driver.
2574 hp->interrupt = interrupt;
2575 hp->epopen = epopen;
2576 hp->epclose = epclose;
2577 hp->epread = epread;
2578 hp->epwrite = epwrite;
2579 hp->seprintep = seprintep;
2580 hp->portenable = portenable;
2581 hp->portreset = portreset;
2582 hp->portstatus = portstatus;
2583 hp->shutdown = shutdown;
2584 hp->debug = usbdebug;
2592 addhcitype("ohci", reset);