2 * intel/amd ahci sata controller
3 * copyright © 2007-10 coraid, inc.
7 #include "../port/lib.h"
12 #include "../port/error.h"
13 #include "../port/sd.h"
16 #include "../port/led.h"
18 #pragma varargck type "T" int
19 #define dprint(...) if(debug) print(__VA_ARGS__); else USED(debug)
20 #define idprint(...) if(prid) print(__VA_ARGS__); else USED(prid)
21 #define aprint(...) if(datapi) print(__VA_ARGS__); else USED(datapi)
22 #define ledprint(...) if(dled) print(__VA_ARGS__); else USED(dled)
23 #define Pciwaddrh(a) 0
24 #define Tname(c) tname[(c)->type]
25 #define Ticks MACHP(0)->ticks
26 #define MS2TK(t) (((ulong)(t)*HZ)/1000)
31 NDrive = NCtlr*NCtlrdrv,
38 Eesb = 1<<0, /* must have (Eesb & Emtype) == 0 */
41 /* pci space configuration */
56 static char *tname[] = {
76 static char *diskstates[Dlast] = {
87 extern SDifc sdiahciifc;
88 typedef struct Ctlr Ctlr;
98 static char *modes[DMlast] = {
105 typedef struct Htab Htab;
119 Aportc portc; /* redundant ptr to port and portm. */
142 * ahci allows non-sequential ports.
143 * to avoid this hassle, we let
144 * driveno ctlr*NCtlrdrv + unit
145 * portno nth available port
165 Drive rawdrive[NCtlrdrv];
166 Drive* drive[NCtlrdrv];
172 static Ctlr iactlr[NCtlr];
173 static SDev sdevs[NCtlr];
176 static Drive *iadrive[NDrive];
184 static char stab[] = {
186 [8] 't', 'c', 'p', 'e',
187 [16] 'N', 'I', 'W', 'B', 'D', 'C', 'H', 'S', 'T', 'F', 'X'
191 serrstr(ulong r, char *s, char *e)
196 for(i = 0; i < nelem(stab) && s < e; i++)
197 if(r & (1<<i) && stab[i]){
205 static char ntab[] = "0123456789abcdef";
208 preg(uchar *reg, int n)
210 char buf[25*3+1], *e;
214 for(i = 0; i < n; i++){
215 *e++ = ntab[reg[i] >> 4];
216 *e++ = ntab[reg[i] & 0xf];
225 dreg(char *s, Aport *p)
227 dprint("%stask=%lux; cmd=%lux; ci=%lux; is=%lux\n",
228 s, p->task, p->cmd, p->ci, p->isr);
236 tsleep(&up->sleep, return0, 0, ms);
251 return (s->p->ci & s->i) == 0;
255 aesleep(Aportm *m, Asleep *a, int ms)
259 tsleep(m, ahciclear, a, ms);
264 ahciwait(Aportc *c, int ms)
273 aesleep(c->m, &as, ms);
274 if((p->task & 1) == 0 && p->ci == 0)
276 dreg("ahciwait fail/timeout ", c->p);
281 mkalist(Aportm *m, uint flags, uchar *data, int len)
290 p->dba = PCIWADDR(data);
291 p->dbahi = Pciwaddrh(data);
292 p->count = 1<<31 | len - 2 | 1;
296 l->flags = flags | 0x5;
298 l->ctab = PCIWADDR(t);
299 l->ctabhi = Pciwaddrh(t);
308 if((pc->m->feat & Dnop) == 0)
310 c = pc->m->ctab->cfis;
312 mkalist(pc->m, Lwrite, 0, 0);
313 return ahciwait(pc, 3*1000);
317 setfeatures(Aportc *pc, uchar f, uint w)
321 c = pc->m->ctab->cfis;
322 featfis(pc->m, c, f);
323 mkalist(pc->m, Lwrite, 0, 0);
324 return ahciwait(pc, w);
328 * ata 7, required for sata, requires that all devices "support"
329 * udma mode 5, however sata:pata bridges allow older devices
330 * which may not. the innodisk satadom, for example allows
331 * only udma mode 2. on the assumption that actual udma is
332 * taking place on these bridges, we set the highest udma mode
333 * available, or pio if there is no udma mode available.
336 settxmode(Aportc *pc, uchar f)
340 c = pc->m->ctab->cfis;
341 if(txmodefis(pc->m, c, f) == -1)
343 mkalist(pc->m, Lwrite, 0, 0);
344 return ahciwait(pc, 3*1000);
350 if(up == nil || !islo())
357 ahciportreset(Aportc *c, uint mode)
365 for(i = 0; i < 500; i += 25){
366 if((*cmd & Acr) == 0)
370 if((*cmd & Apwr) != Apwr)
372 p->sctl = 3*Aipm | 0*Aspd | Adet;
374 p->sctl = 3*Aipm | mode*Aspd;
379 ahciflushcache(Aportc *pc)
383 c = pc->m->ctab->cfis;
384 flushcachefis(pc->m, c);
385 mkalist(pc->m, Lwrite, 0, 0);
387 if(ahciwait(pc, 60000) == -1 || pc->p->task & (1|32)){
388 dprint("ahciflushcache fail [task %lux]\n", pc->p->task);
389 // preg(pc->m->fis.r, 20);
396 ahciidentify0(Aportc *pc, void *id)
403 memset(id, 0, 0x200);
404 identifyfis(pc->m, c);
405 mkalist(pc->m, 0, id, 0x200);
406 return ahciwait(pc, 3*1000);
410 ahciidentify(Aportc *pc, ushort *id, uint *ss, char *d)
418 if(i > 5 || ahciidentify0(pc, id) != 0)
421 if(n & Pspinup && setfeatures(pc, 7, 20*1000) == -1)
422 print("%s: puis spinup fail\n", d);
425 print("%s: puis waiting\n", d);
429 if(s == -1 || (m->feat&Dlba) == 0){
430 if((m->feat&Dlba) == 0)
431 dprint("%s: no lba support\n", d);
444 for(i = 0; i < 500; i += 50){
451 if((a->task & (ASdrq|ASbsy)) == 0){
457 for(i = 0; i < 500; i += 50){
465 dprint("ahci: clo clear [task %lux]\n", a->task);
473 ahcicomreset(Aportc *pc)
477 dreg("comreset ", pc->p);
478 if(ahciquiet(pc->p) == -1){
479 dprint("ahci: ahciquiet failed\n");
482 dreg("comreset ", pc->p);
484 c = pc->m->ctab->cfis;
486 mkalist(pc->m, Lclear | Lreset, 0, 0);
487 if(ahciwait(pc, 500) == -1){
488 dprint("ahci: comreset1 failed\n");
492 dreg("comreset ", pc->p);
495 mkalist(pc->m, Lwrite, 0, 0);
496 if(ahciwait(pc, 150) == -1){
497 dprint("ahci: comreset2 failed\n");
500 dreg("comreset ", pc->p);
505 ahciidle(Aport *port)
514 for(i = 0; i < 500; i += 25){
524 for(i = 0; i < 500; i += 25){
533 * §6.2.2.1 first part; comreset handled by reset disk.
534 * - remainder is handled by configdisk.
535 * - ahcirecover is a quick recovery from a failed command.
538 ahciswreset(Aportc *pc)
546 if(pc->p->task & (ASdrq|ASbsy))
552 ahcirecover(Aportc *pc)
556 if(settxmode(pc, pc->m->udma) == -1)
562 malign(int size, int align)
566 v = xspanalloc(size, align, 0);
574 f->base = malign(0x100, 0x100);
576 f->p = f->base + 0x20;
577 f->r = f->base + 0x40;
578 f->u = f->base + 0x60;
579 f->devicebits = (ulong*)(f->base + 0x58);
583 ahciwakeup(Aportc *c, uint mode)
590 if((s & Isleepy) != 0)
592 if((s & Smask) != Spresent){
593 dprint("ahci: slumbering drive missing [ss %.3ux]\n", s);
596 ahciportreset(c, mode);
597 dprint("ahci: wake %.3ux -> %.3lux\n", s, c->p->sstatus);
601 ahciconfigdrive(Ahba *h, Aportc *c, int mode)
612 m->list = malign(sizeof *m->list, 1024);
613 m->ctab = malign(sizeof *m->ctab, 128);
616 if(ahciidle(p) == -1){
617 dprint("ahci: port not idle\n");
621 p->list = PCIWADDR(m->list);
622 p->listhi = Pciwaddrh(m->list);
623 p->fis = PCIWADDR(m->fis.base);
624 p->fishi = Pciwaddrh(m->fis.base);
628 if((p->cmd & Apwr) != Apwr)
631 if((h->cap & Hss) != 0){
632 dprint("ahci: spin up ... [%.3lux]\n", p->sstatus);
633 for(i = 0; i < 1400; i += 50){
634 if((p->sstatus & Sbist) != 0)
636 if((p->sstatus & Smask) == Sphylink)
642 if((p->sstatus & SSmask) == (Isleepy | Spresent))
648 /* we will get called again once phylink has been established */
649 if((p->sstatus & Smask) != Sphylink)
652 /* disable power managment sequence from book. */
653 p->sctl = 3*Aipm | mode*Aspd | 0*Adet;
656 p->cmd |= Afre | Ast;
681 for(i = 0; i < 32; i++)
693 h = c->hba = (Ahba*)c->mmio;
699 return countbits(h->pi);
707 if((h->cap2 & Boh) == 0)
710 for(wait = 0; wait < 2000; wait += 100){
711 if((h->bios & Bos) == 0)
715 iprint("ahci: bios handoff timed out\n");
720 ahcihbareset(Ahba *h)
725 for(wait = 0; wait < 1000; wait += 100){
739 if(d->unit && d->unit->name)
753 s = ahciidentify(&d->portc, id, &d->secsize, dnam(d));
756 osectors = d->sectors;
757 memmove(oserial, d->serial, sizeof d->serial);
761 idmove(d->serial, id+10, 20);
762 idmove(d->firmware, id+23, 8);
763 idmove(d->model, id+27, 40);
764 d->wwn = idwwn(d->portc.m, id);
767 memset(u->inquiry, 0, sizeof u->inquiry);
770 u->inquiry[4] = sizeof u->inquiry - 4;
771 memmove(u->inquiry+8, d->model, 40);
773 if(osectors != s || memcmp(oserial, d->serial, sizeof oserial)){
793 return c->pci->vid == 0x8086;
797 ignoreahdrs(Drive *d)
799 return d->portm.feat & Datapi && d->ctlr->type == Tsb600;
803 updatedrive(Drive *d)
805 ulong f, cause, serr, s0, pr, ewake;
814 if(d->ctlr->type == Tjmicron)
822 }else if(cause & Adps){
824 }else if(cause & Atfes){
831 dprint("%s: fatal\n", dnam(d));
835 if(ignoreahdrs(d) && serr & ErrE)
837 dprint("%s: Adhrs cause %lux serr %lux task %lux\n",
838 dnam(d), cause, serr, p->task);
844 if(p->task & 1 && last != cause)
845 dprint("%s: err ca %lux serr %lux task %lux sstat %.3lux\n",
846 dnam(d), cause, serr, p->task, p->sstatus);
848 dprint("%s: upd %lux ta %lux\n", dnam(d), cause, p->task);
850 if(cause & (Aprcs|Aifs)){
852 switch(p->sstatus & Smask){
857 if((p->sstatus & Imask) == Islumber)
863 /* power mgnt crap for suprise removal */
864 p->ie |= Aprcs|Apcs; /* is this required? */
871 dprint("%s: updatedrive: %s → %s [ss %.3lux]\n",
872 dnam(d), diskstates[s0], diskstates[d->state], p->sstatus);
873 if(s0 == Dready && d->state != Dready)
874 dprint("%s: pulled\n", dnam(d));
875 if(d->state != Dready)
877 if(d->state != Dready || p->ci)
891 dstatus(Drive *d, int s)
893 dprint("%s: dstatus: %s → %s from pc=%p\n", dnam(d),
894 diskstates[d->state], diskstates[s], getcallerpc(&d));
902 configdrive(Drive *d)
904 if(ahciconfigdrive(d->ctlr->hba, &d->portc, d->mode) == -1){
905 dstatus(d, Dportreset);
910 switch(d->port->sstatus & Smask){
917 if(d->state == Dready)
928 dprint("%s: configdrive: %s\n", dnam(d), diskstates[d->state]);
934 uint state, det, stat;
939 stat = p->sstatus & Smask;
940 state = (p->cmd>>28) & 0xf;
941 dprint("%s: resetdisk [icc %ux; det %.3ux; sdet %.3ux]\n", dnam(d), state, det, stat);
944 if(d->state != Dready && d->state != Dnew)
945 d->portm.flag |= Ferror;
947 d->state = Dportreset;
950 clearci(p); /* satisfy sleep condition. */
958 if(p->cmd&Ast && ahciswreset(&d->portc) == -1)
959 dstatus(d, Dportreset); /* get a bigger stick. */
976 setfissig(m, c->p->sig);
977 if(identify(d) == -1){
978 dprint("%s: identify failure\n", dnam(d));
981 if(settxmode(c, m->udma) == -1){
982 dprint("%s: can't set udma mode\n", dnam(d));
985 if(m->feat & Dpower && setfeatures(c, 0x85, 3*1000) == -1){
986 dprint("%s: can't disable apm\n", dnam(d));
988 if(ahcirecover(c) == -1)
997 idprint("%s: %sLBA %,lld sectors\n", dnam(d), s, d->sectors);
998 idprint(" %s %s %s %s\n", d->model, d->firmware, d->serial,
999 d->drivechange? "[newdrive]": "");
1003 idprint("%s: can't be initialized\n", dnam(d));
1011 Mphywait = 2*1024/Nms - 1,
1012 Midwait = 16*1024/Nms - 1,
1013 Mcomrwait = 64*1024/Nms - 1,
1019 if(d->active && d->totick != 0 && (long)(Ticks - d->totick) > 0){
1020 dprint("%s: drive hung [task %lux; ci %lux; serr %lux]%s\n",
1021 dnam(d), d->port->task, d->port->ci, d->port->serror,
1022 d->nodma == 0 ? "; disabling dma" : "");
1028 static ushort olds[NCtlr*NCtlrdrv];
1031 doportreset(Drive *d)
1034 ahciportreset(&d->portc, d->mode);
1037 dprint("ahci: portreset: %s [task %lux; ss %.3lux]\n",
1038 diskstates[d->state], d->port->task, d->port->sstatus);
1041 /* drive must be locked */
1043 statechange(Drive *d)
1049 if(d->unit->sectors != 0){
1061 return (c->hba->cap & 0xf*Hiss)/Hiss;
1064 static void iainterrupt(Ureg*, void *);
1067 checkdrive(Drive *d, int i)
1071 if(d->ctlr->enabled == 0)
1074 iainterrupt(0, d->ctlr); /* check for missed irq's */
1077 s = d->port->sstatus;
1079 d->lastseen = Ticks;
1081 dprint("%s: status: %.3ux -> %.3ux: %s\n",
1082 dnam(d), olds[i], s, diskstates[d->state]);
1093 switch(s & (Iactive|Smask)){
1095 ahciwakeup(&d->portc, d->mode);
1099 dprint("%s: unknown status %.3ux\n", dnam(d), s);
1101 case Iactive: /* active, no device */
1102 if(++d->wait&Mphywait)
1106 d->mode = maxmode(d->ctlr);
1109 if(d->mode == DMautoneg){
1110 d->state = Dportreset;
1113 dprint("%s: reset; new mode %s\n", dnam(d),
1119 case Iactive | Sphylink:
1122 if((++d->wait&Midwait) == 0){
1123 dprint("%s: slow reset [task %lux; ss %.3ux; wait %d]\n",
1124 dnam(d), d->port->task, s, d->wait);
1127 s = (uchar)d->port->task;
1128 sig = d->port->sig >> 16;
1129 if(s == 0x7f || s&ASbsy ||
1130 (sig != 0xeb14 && (s & ASdrdy) == 0))
1139 if(d->wait++ & Mcomrwait)
1144 dprint("%s: reset [%s]: mode %d; status %.3ux\n",
1145 dnam(d), diskstates[d->state], d->mode, s);
1152 if(d->wait++ & 0xff && (s & Iactive) == 0)
1154 dprint("%s: portreset [%s]: mode %d; status %.3ux\n",
1155 dnam(d), diskstates[d->state], d->mode, s);
1156 d->portm.flag |= Ferror;
1159 if((s & Smask) == Smissing){
1160 d->state = Dmissing;
1178 tsleep(&up->sleep, return0, 0, Nms);
1179 for(i = 0; i < niadrive; i++)
1180 checkdrive(iadrive[i], i);
1185 iainterrupt(Ureg *u, void *a)
1194 cause = c->hba->isr;
1195 for(i = 0; cause; i++){
1197 if((cause & m) == 0)
1200 d = c->rawdrive + i;
1202 if(d->port->isr && c->hba->pi & m)
1213 ahciencreset(Ctlr *c)
1217 if(c->enctype == Eesb)
1221 while(h->emctl & Emrst)
1227 * from the standard: (http://en.wikipedia.org/wiki/IBPI)
1228 * rebuild is preferred as locate+fail; alternate 1hz fail
1229 * we're going to assume no locate led.
1233 Ledsleep = 125, /* 8hz */
1236 L0 = Ledon*Aled | Ledon*Locled,
1237 L1 = Ledon*Aled | Ledoff*Locled,
1238 R0 = Ledon*Aled | Ledon*Locled | Ledon*Errled,
1239 R1 = Ledon*Aled | Ledoff*Errled,
1240 S0 = Ledon*Aled | Ledon*Locled /*| Ledon*Errled*/, /* botch */
1241 S1 = Ledon*Aled | Ledoff*Errled,
1242 P0 = Ledon*Aled | Ledon*Errled,
1243 P1 = Ledon*Aled | Ledoff*Errled,
1244 F0 = Ledon*Aled | Ledon*Errled,
1245 C0 = Ledon*Aled | Ledon*Locled,
1246 C1 = Ledon*Aled | Ledoff*Locled,
1250 //static ushort led3[Ibpilast*8] = {
1251 //[Ibpinone*8] 0, 0, 0, 0, 0, 0, 0, 0,
1252 //[Ibpinormal*8] N0, N0, N0, N0, N0, N0, N0, N0,
1253 //[Ibpirebuild*8] R0, R0, R0, R0, R1, R1, R1, R1,
1254 //[Ibpilocate*8] L0, L1, L0, L1, L0, L1, L0, L1,
1255 //[Ibpispare*8] S0, S1, S0, S1, S1, S1, S1, S1,
1256 //[Ibpipfa*8] P0, P1, P0, P1, P1, P1, P1, P1, /* first 1 sec */
1257 //[Ibpifail*8] F0, F0, F0, F0, F0, F0, F0, F0,
1258 //[Ibpicritarray*8] C0, C0, C0, C0, C1, C1, C1, C1,
1259 //[Ibpifailarray*8] C0, C1, C0, C1, C0, C1, C0, C1,
1262 static ushort led2[Ibpilast*8] = {
1263 [Ibpinone*8] 0, 0, 0, 0, 0, 0, 0, 0,
1264 [Ibpinormal*8] N0, N0, N0, N0, N0, N0, N0, N0,
1265 [Ibpirebuild*8] R0, R0, R0, R0, R1, R1, R1, R1,
1266 [Ibpilocate*8] L0, L0, L0, L0, L0, L0, L0, L0,
1267 [Ibpispare*8] S0, S0, S0, S0, S1, S1, S1, S1,
1268 [Ibpipfa*8] P0, P1, P0, P1, P1, P1, P1, P1, /* first 1 sec */
1269 [Ibpifail*8] F0, F0, F0, F0, F0, F0, F0, F0,
1270 [Ibpicritarray*8] C0, C0, C0, C0, C1, C1, C1, C1,
1271 [Ibpifailarray*8] C0, C1, C0, C1, C0, C1, C0, C1,
1275 ledstate(Ledport *p, uint seq)
1279 if(p->led == Ibpipfa && seq%32 >= 8)
1282 i = led2[8*p->led + seq%8];
1283 if(i != p->ledbits){
1285 ledprint("ledstate %,.011ub %ud\n", p->ledbits, seq);
1292 blink(Drive *d, ulong t)
1298 if(ledstate(d, t) == 0)
1302 /* ensure last message has been transmitted */
1303 while(h->emctl & Tmsg)
1307 panic("%s: bad led type %d", dnam(d), c->enctype);
1309 memset(&msg, 0, sizeof msg);
1312 msg.msize = sizeof msg - 4;
1313 msg.led[0] = d->ledbits;
1314 msg.led[1] = d->ledbits>>8;
1316 msg.hba = d->driveno;
1317 memmove(c->enctx, &msg, sizeof msg);
1325 Esbdrv0 = 4, /* start pos in bits */
1326 Esbiota = 3, /* shift in bits */
1335 uint i, e; /* except after c */
1338 for(i = 0; i < 3; i++)
1339 e |= ((s>>3*i & 7) != 0)<<i;
1344 blinkesb(Ctlr *c, ulong t)
1351 for(i = 0; i < c->ndrive; i++){
1353 s |= ledstate(d, t); /* no port mapping */
1357 memset(u, 0, sizeof u);
1358 for(i = 0; i < c->ndrive; i++){
1360 s = Esbdrv0 + Esbiota*i;
1361 v = esbbits(d->ledbits) * (1ull << s%32);
1363 u[s/32 + 1] |= v>>32;
1365 for(i = 0; i < c->encsz; i++)
1371 ahciledr(SDunit *u, Chan *ch, void *a, long n, vlong off)
1377 d = c->drive[u->subno];
1378 return ledr(d, ch, a, n, off);
1382 ahciledw(SDunit *u, Chan *ch, void *a, long n, vlong off)
1388 d = c->drive[u->subno];
1389 return ledw(d, ch, a, n, off);
1401 memset(map, 0, sizeof map);
1402 for(i = 0; i < niactlr; i++)
1403 if(iactlr[i].enctype != 0){
1404 ahciencreset(iactlr + i);
1409 pexit("no work", 1);
1410 for(i = 0; i < niadrive; i++){
1411 iadrive[i]->nled = 3; /* hardcoded */
1412 if(iadrive[i]->ctlr->enctype == Eesb)
1413 iadrive[i]->nled = 3;
1414 iadrive[i]->ledbits = -1;
1418 for(j = 0; j < niadrive; ){
1419 c = iadrive[j]->ctlr;
1422 else if(c->enctype == Eesb){
1431 esleep(Ledsleep - TK2MS(t1 - t0));
1440 for(i = 0;; i += 250){
1441 if(d->state == Dreset || d->state == Dportreset || d->state == Dnew)
1444 s = d->port->sstatus;
1445 if(d->state == Dready && (s & Smask) == Sphylink){
1449 δ = Ticks - d->lastseen;
1450 if(d->state == Dnull || δ > 10*1000)
1452 if((s & Imask) == 0 && δ > 1500)
1455 d->state = Doffline;
1457 print("%s: not responding; offline\n", dnam(d));
1474 d = c->drive[u->subno];
1480 sdaddfile(u, "led", 0644, eve, ahciledr, ahciledw);
1484 checkdrive(d, d->driveno); /* c->d0 + d->driveno */
1496 d = c->drive[u->subno];
1498 while(waitready(d) == 1)
1501 dprint("%s: iaonline: %s\n", dnam(d), diskstates[d->state]);
1504 if(d->portm.feat & Datapi){
1510 return scsionline(u);
1516 }else if(d->state == Dready)
1519 u->sectors = d->sectors;
1520 u->secsize = d->secsize;
1538 kproc("iasata", satakproc, 0);
1540 panic("iaenable: zero s->ctlr->ndrive");
1542 snprint(name, sizeof name, "%s (%s)", s->name, s->ifc->name);
1543 intrenable(c->pci->intl, iainterrupt, c, c->pci->tbdf, name);
1544 /* supposed to squelch leftover interrupts here. */
1547 if(++once == niactlr)
1548 kproc("ialed", ledkproc, 0);
1562 ahcidisable(c->hba);
1563 snprint(name, sizeof name, "%s (%s)", s->name, s->ifc->name);
1564 intrdisable(c->pci->intl, iainterrupt, c, c->pci->tbdf, name);
1571 ahcibuild(Drive *d, int rw, void *data, uint n, vlong lba)
1579 rwfis(m, c, rw, n, lba);
1583 return mkalist(m, flags, data, 512*n);
1587 ahcibuildpkt(Drive *d, SDreq *r, void *data, int n)
1598 atapirwfis(m, c, r->cmd, r->clen, 0x2000);
1599 if((n & 15) != 0 || d->nodma)
1600 c[Ffeat] &= ~1; /* use pio */
1601 else if(c[Ffeat] & 1 && d->info[62] & (1<<15)) /* dma direction */
1602 c[Ffeat] = (c[Ffeat] & ~(1<<2)) | ((r->write == 0) << 2);
1603 flags = Lpref | Latapi;
1604 if(r->write != 0 && data)
1606 return mkalist(m, flags, data, n);
1610 ahcibuildfis(Drive *d, SDreq *r, void *data, uint n)
1616 if((r->ataproto & Pprotom) == Ppkt)
1617 return ahcibuildpkt(d, r, data, n);
1621 memmove(c, r->cmd, r->clen);
1623 if(r->write || n == 0)
1625 return mkalist(m, flags, data, n);
1634 while ((i = waitready(d)) == 1) {
1643 flushcache(Drive *d)
1648 if(lockready(d) == 0)
1649 i = ahciflushcache(&d->portc);
1655 io(Drive *d, uint proto, int to, int interrupt)
1657 uint task, flag, stat, rv;
1661 switch(waitready(d)){
1678 d->totick = Ticks + MS2TK(to) | 1; /* fix fencepost */
1685 if(ahcicomreset(&d->portc) == -1)
1690 sleep(&d->portm, ahciclear, &as);
1696 flag = d->portm.flag;
1697 task = d->port->task;
1701 if(proto & Ppkt && stat == Dready){
1702 rv = task >> 8 + 4 & 0xf;
1705 }else if(task & (Efatal<<8) || task & (ASbsy|ASdrq) && stat == Dready){
1707 ahcirecover(&d->portc);
1708 task = d->port->task;
1709 flag &= ~Fdone; /* either an error or do-over */
1712 print("%s: retry\n", dnam(d));
1715 if(flag & (Fahdrs | Ferror)){
1716 if((task & Eidnf) == 0)
1717 print("%s: i/o error %ux\n", dnam(d), task);
1724 iariopkt(SDreq *r, Drive *d)
1731 aprint("%s: %.2ux %.2ux %c %d %p\n", dnam(d), cmd[0], cmd[2],
1732 "rw"[r->write], r->dlen, r->data);
1737 * prevent iaonline() to hang forever by timing out
1738 * inquiry and capacity commands after 5 seconds.
1742 case 0x9e: if(cmd[1] != 0x10) break;
1749 for(try = 0; try < 10; try++){
1751 l = ahcibuildpkt(d, r, r->data, r->dlen);
1752 r->status = io(d, Ppkt, to, 0);
1765 print("%s: bad disk\n", dnam(d));
1766 return r->status = SDcheck;
1770 ahcibio(SDunit *u, int lun, int write, void *a, long count, uvlong lba)
1772 int n, rw, try, status, max;
1778 d = c->drive[u->subno];
1779 if(d->portm.feat & Datapi)
1780 return scsibio(u, lun, write, a, count, lba);
1783 if(d->portm.feat & Dllba){
1784 max = 8192; /* ahci maximum */
1785 if(c->type == Tsb600)
1786 max = 255; /* errata */
1788 rw = write? SDwrite: SDread;
1790 dprint("%s: bio: %llud %c %lud %p\n",
1791 dnam(d), lba, "rw"[rw], count, data);
1793 for(try = 0; try < 10;){
1798 ahcibuild(d, rw, data, n, lba);
1799 status = io(d, Pdma, 5000, 0);
1811 data += n * u->secsize;
1813 return data - (uchar*)a;
1815 print("%s: bad disk\n", dnam(d));
1822 int i, n, count, rw;
1831 d = c->drive[u->subno];
1832 if(d->portm.feat & Datapi)
1833 return iariopkt(r, d);
1836 if(cmd[0] == 0x35 || cmd[0] == 0x91){
1837 if(flushcache(d) == 0)
1838 return sdsetsense(r, SDok, 0, 0, 0);
1839 return sdsetsense(r, SDcheck, 3, 0xc, 2);
1842 if((i = sdfakescsi(r)) != SDnostatus){
1847 if((i = sdfakescsirw(r, &lba, &count, &rw)) != SDnostatus)
1849 n = ahcibio(u, r->lun, r->write, r->data, count, lba);
1856 static uchar bogusrfis[16] = {
1869 memmove(c, bogusrfis, sizeof bogusrfis);
1874 sdr(SDreq *r, Drive *d, int st)
1879 if((r->ataproto & Pprotom) == Ppkt){
1882 st = t >> 8 + 4 & 0xf;
1885 memmove(r->cmd, c, 16);
1893 fisreqchk(Sfis *f, SDreq *r)
1895 if((r->ataproto & Pprotom) == Ppkt)
1898 * handle oob requests;
1899 * restrict & sanitize commands
1903 if(r->cmd[0] == 0xf0){
1904 sigtofis(f, r->cmd);
1925 d = c->drive[u->subno];
1927 if((r->status = fisreqchk(&d->portm, r)) != SDnostatus)
1931 for(try = 0; try < 10; try++){
1933 l = ahcibuildfis(d, r, r->data, r->dlen);
1934 r->status = io(d, r->ataproto & Pprotom, -1, 1);
1938 return sdsetsense(r, SDcheck, 11, 0, 6);
1946 r->rlen = (r->ataproto & Pprotom) == Ppkt ? l->len : r->dlen;
1947 try = sdr(r, d, r->status);
1951 print("%s: bad disk\n", dnam(d));
1952 return r->status = SDeio;
1956 * configure drives 0-5 as ahci sata (c.f. errata)
1959 iaahcimode(Pcidev *p)
1963 u = pcicfgr16(p, 0x92);
1964 dprint("ahci: %T: iaahcimode %.2ux %.4ux\n", p->tbdf, pcicfgr8(p, 0x91), u);
1965 pcicfgw16(p, 0x92, u | 0xf); /* ports 0-15 */
1970 Ghc = 0x04/4, /* global host control */
1971 Pi = 0x0c/4, /* ports implemented */
1972 Cmddec = 1<<15, /* enable command block decode */
1975 Ahcien = 1<<31, /* ahci enable */
1979 iasetupahci(Ctlr *c)
1981 pcicfgw16(c->pci, 0x40, pcicfgr16(c->pci, 0x40) & ~Cmddec);
1982 pcicfgw16(c->pci, 0x42, pcicfgr16(c->pci, 0x42) & ~Cmddec);
1984 c->lmmio[Ghc] |= Ahcien;
1985 c->lmmio[Pi] = (1 << 6) - 1; /* 5 ports (supposedly ro pi reg) */
1987 /* enable ahci mode; from ich9 datasheet */
1988 pcicfgw16(c->pci, 0x90, 1<<6 | 1<<5);
1992 sbsetupahci(Pcidev *p)
1994 print("sbsetupahci: tweaking %.4ux ccru %.2ux ccrp %.2ux\n",
1995 p->did, p->ccru, p->ccrp);
1996 pcicfgw8(p, 0x40, pcicfgr8(p, 0x40) | 1);
1997 pcicfgw8(p, PciCCRu, 6);
1998 pcicfgw8(p, PciCCRp, 1);
2007 c->enctx = (ulong*)(c->mmio + 0xa0);
2014 ahciencinit(Ctlr *c)
2016 ulong type, sz, o, *bar;
2022 if((h->cap & Hems) == 0)
2024 type = h->emctl & Emtype;
2036 sz = h->emloc & 0xffff;
2038 if(sz == 0 || o == 0)
2041 dprint("size = %.4lux; loc = %.4lux*4\n", sz, o);
2044 if((h->emctl & Xonly) == 0){
2048 c->encrx = bar + o*2;
2064 if((p->did & 0xfffc) == 0x2680)
2066 if((p->did & 0xfffb) == 0x27c1)
2067 return Tich; /* 82801g[bh]m */
2068 if((p->did & 0xffff) == 0x2822)
2069 return Tich; /* 82801 SATA RAID */
2070 if((p->did & 0xffff) == 0x2821)
2071 return Tich; /* 82801h[roh] */
2072 if((p->did & 0xfffe) == 0x2824)
2073 return Tich; /* 82801h[b] */
2074 if((p->did & 0xfeff) == 0x2829)
2075 return Tich; /* ich8 */
2076 if((p->did & 0xfffe) == 0x2922)
2077 return Tich; /* ich9 */
2078 if((p->did & 0xffff) == 0x3a02)
2079 return Tich; /* 82801jd/do */
2080 if((p->did & 0xfefe) == 0x3a22)
2081 return Tich; /* ich10, pch */
2082 if((p->did & 0xfff7) == 0x3b28)
2083 return Tich; /* pchm */
2084 if((p->did & 0xfffe) == 0x3b22)
2085 return Tich; /* pch */
2088 if(p->ccru == 1 || p->ccrp != 1)
2089 if(p->did == 0x4380 || p->did == 0x4390)
2095 * unconfirmed report that the programming
2096 * interface is set incorrectly.
2098 if(p->did == 0x3349)
2102 /* Hudson SATA Controller [AHCI mode] */
2103 if(p->did == 0x7801)
2116 if(p->ccrb == Pcibcstore && p->ccru == 6 && p->ccrp == 1)
2124 int i, n, nunit, type;
2136 if(getconf("*ahcidebug") != nil){
2141 memset(olds, 0xff, sizeof olds);
2143 while((p = pcimatch(p, 0, 0)) != nil){
2144 if((type = didtype(p)) == -1)
2146 if(p->mem[Abar].bar == 0)
2148 if(niactlr == NCtlr){
2149 print("iapnp: %s: too many controllers\n", tname[type]);
2152 c = iactlr + niactlr;
2153 s = sdevs + niactlr;
2154 memset(c, 0, sizeof *c);
2155 memset(s, 0, sizeof *s);
2156 io = p->mem[Abar].bar & ~0xf;
2157 c->mmio = vmap(io, p->mem[Abar].size);
2159 print("%s: address %#p in use did %.4ux\n",
2160 Tname(c), io, p->did);
2163 c->lmmio = (ulong*)c->mmio;
2167 s->ifc = &sdiahciifc;
2172 ahcihandoff((Ahba*)c->mmio);
2173 if(intel(c) && p->did != 0x2681)
2175 // ahcihbareset((Ahba*)c->mmio);
2176 nunit = ahciconf(c);
2177 if(intel(c) && iaahcimode(p) == -1 || nunit < 1){
2178 vunmap(c->mmio, p->mem[Abar].size);
2181 c->ndrive = s->nunit = nunit;
2183 /* map the drives -- they don't all need to be enabled. */
2184 memset(c->rawdrive, 0, sizeof c->rawdrive);
2186 for(i = 0; i < NCtlrdrv; i++){
2187 d = c->rawdrive + i;
2193 if((c->hba->pi & 1<<i) == 0)
2195 snprint(d->name, sizeof d->name, "iahci%d.%d", niactlr, i);
2196 d->port = (Aport*)(c->mmio + 0x80*i + 0x100);
2197 d->portc.p = d->port;
2198 d->portc.m = &d->portm;
2200 c->drive[d->driveno] = d;
2201 iadrive[niadrive + d->driveno] = d;
2203 for(i = 0; i < n; i++){
2204 c->drive[i]->mode = DMautoneg;
2205 configdrive(c->drive[i]);
2212 i = (c->hba->cap >> 21) & 1;
2213 print("#S/%s: %s: sata-%s with %d ports\n", s->name,
2214 Tname(c), "I\0II" + i*2, nunit);
2219 static Htab ctab[] = {
2241 capfmt(char *p, char *e, Htab *t, int n, ulong cap)
2246 for(i = 0; i < n; i++)
2248 p = seprint(p, e, "%s ", t[i].name);
2253 iarctl(SDunit *u, char *p, int l)
2255 char buf[32], *e, *op;
2260 if((c = u->dev->ctlr) == nil)
2262 d = c->drive[u->subno];
2267 if(d->state == Dready){
2268 p = seprint(p, e, "model\t%s\n", d->model);
2269 p = seprint(p, e, "serial\t%s\n", d->serial);
2270 p = seprint(p, e, "firm\t%s\n", d->firmware);
2272 p = seprint(p, e, "wwn\t%ullx\n", d->wwn);
2273 p = seprint(p, e, "flag\t");
2274 p = pflag(p, e, &d->portm);
2275 p = seprint(p, e, "udma\t%d\n", d->portm.udma);
2277 p = seprint(p, e, "no disk present [%s]\n", diskstates[d->state]);
2278 serrstr(o->serror, buf, buf + sizeof buf - 1);
2279 p = seprint(p, e, "reg\ttask %lux cmd %lux serr %lux %s ci %lux is %lux "
2280 "sig %lux sstatus %.3lux\n", o->task, o->cmd, o->serror, buf,
2281 o->ci, o->isr, o->sig, o->sstatus);
2282 p = seprint(p, e, "cmd\t");
2283 p = capfmt(p, e, ctab, nelem(ctab), o->cmd);
2284 p = seprint(p, e, "\n");
2285 p = seprint(p, e, "mode\t%s %s\n", modes[d->mode], modes[maxmode(c)]);
2286 p = seprint(p, e, "geometry %llud %lud\n", d->sectors, u->secsize);
2287 p = seprint(p, e, "alignment %d %d\n",
2288 d->secsize<<d->portm.physshift, d->portm.physalign);
2289 p = seprint(p, e, "missirq\t%ud\n", c->missirq);
2294 forcemode(Drive *d, char *mode)
2298 for(i = 0; i < nelem(modes); i++)
2299 if(strcmp(mode, modes[i]) == 0)
2301 if(i == nelem(modes))
2309 forcestate(Drive *d, char *state)
2313 for(i = 0; i < nelem(diskstates); i++)
2314 if(strcmp(state, diskstates[i]) == 0)
2316 if(i == nelem(diskstates))
2322 runsettxmode(Drive *d, char *s)
2332 if(lockready(d) == 0){
2334 if(settxmode(c, m->udma) == 0)
2343 iawctl(SDunit *u, Cmdbuf *cmd)
2350 d = c->drive[u->subno];
2353 if(strcmp(f[0], "mode") == 0)
2354 forcemode(d, f[1]? f[1]: "satai");
2355 else if(strcmp(f[0], "state") == 0)
2356 forcestate(d, f[1]? f[1]: "null");
2357 else if(strcmp(f[0], "txmode") == 0){
2358 if(runsettxmode(d, f[1]? f[1]: "0"))
2359 cmderror(cmd, "bad txmode / stuck port");
2361 cmderror(cmd, Ebadctl);
2366 portr(char *p, char *e, uint x)
2372 for(i = 0; i < 32; i++){
2373 if((x & (1<<i)) == 0){
2374 if(a != -1 && i - 1 != a)
2375 p = seprint(p, e, "-%d", i - 1);
2381 p = seprint(p, e, ", ");
2382 p = seprint(p, e, "%d", a = i);
2385 if(a != -1 && i - 1 != a)
2386 p = seprint(p, e, "-%d", i - 1);
2390 static Htab htab[] = {
2410 static Htab htab2[] = {
2416 static Htab emtab[] = {
2428 iartopctl(SDev *s, char *p, char *e)
2438 p = seprint(p, e, "sd%c ahci %s port %#p: ", s->idno, Tname(c), h);
2439 p = capfmt(p, e, htab, nelem(htab), cap);
2440 p = capfmt(p, e, htab2, nelem(htab2), h->cap2);
2441 p = capfmt(p, e, emtab, nelem(emtab), h->emctl);
2442 portr(pr, pr + sizeof pr, h->pi);
2443 return seprint(p, e,
2444 "iss %ld ncs %ld np %ld ghc %lux isr %lux pi %lux %s ver %lux\n",
2445 (cap>>20) & 0xf, (cap>>8) & 0x1f, 1 + (cap & 0x1f),
2446 h->ghc, h->isr, h->pi, pr, h->ver);
2450 iawtopctl(SDev *, Cmdbuf *cmd)
2458 if(strcmp(f[0], "debug") == 0)
2460 else if(strcmp(f[0], "idprint") == 0)
2462 else if(strcmp(f[0], "aprint") == 0)
2464 else if(strcmp(f[0], "ledprint") == 0)
2467 cmderror(cmd, Ebadctl);
2471 cmderror(cmd, Ebadarg);
2477 *v = strcmp(f[1], "on") == 0;
2485 SDifc sdiahciifc = {