3 #include "../port/lib.h"
10 #include "rebootcode.i"
18 extern void (*i8237alloc)(void);
19 extern void bootscreeninit(void);
20 extern void multibootdebug(void);
50 if(arch->intrinit) /* launches other processors on an mp */
73 MACHP(0) = (Mach*)CPU0MACH;
74 m->pdb = (ulong*)CPU0PDB;
75 m->gdt = (Segdesc*)CPU0GDT;
93 memset(m, 0, sizeof(Mach));
100 * For polled uart output at boot, need
101 * a default delay constant. 100000 should
102 * be enough for a while. Cpuidentify will
103 * calculate the real value later.
105 m->loopconst = 100000;
111 char buf[2*KNAMELEN], **sp;
116 snprint(buf, sizeof(buf), "%s %s", arch->id, conffile);
117 ksetenv("terminal", buf, 0);
118 ksetenv("cputype", "386", 0);
120 ksetenv("service", "cpu", 0);
122 ksetenv("service", "terminal", 0);
126 kproc("alarm", alarmkproc, 0);
128 sp = (char**)(USTKTOP - sizeof(Tos) - 8 - sizeof(sp[0])*4);
130 strcpy(sp[1] = (char*)&sp[4], "boot");
142 if(p = getconf("service")){
143 if(strcmp(p, "cpu") == 0)
145 else if(strcmp(p,"terminal") == 0)
149 if(p = getconf("*kernelpercent"))
150 userpcnt = 100 - strtol(p, 0, 0);
155 for(i=0; i<nelem(conf.mem); i++)
156 conf.npage += conf.mem[i].npage;
158 conf.nproc = 100 + ((conf.npage*BY2PG)/MB)*5;
161 if(conf.nproc > 2000)
164 conf.nswap = conf.nproc*80;
170 kpages = conf.npage - (conf.npage*userpcnt)/100;
171 conf.nimage = conf.nproc;
174 * Hack for the big boys. Only good while physmem < 4GB.
175 * Give the kernel fixed max + enough to allocate the
177 * This is an overestimate as conf.upages < conf.npages.
178 * The patch of nimage is a band-aid, scanning the whole
179 * page list in imagereclaim just takes too long.
181 if(getconf("*imagemaxmb") == 0)
182 if(kpages > (64*MB + conf.npage*sizeof(Page))/BY2PG){
183 kpages = (64*MB + conf.npage*sizeof(Page))/BY2PG;
184 kpages += (conf.nproc*KSTACK)/BY2PG;
188 if(conf.npage*BY2PG < 16*MB)
193 kpages = conf.npage - (conf.npage*userpcnt)/100;
196 * Make sure terminals with low memory get at least
197 * 4MB on the first Image chunk allocation.
199 if(conf.npage*BY2PG < 16*MB)
200 imagmem->minarena = 4*MB;
204 * can't go past the end of virtual memory
205 * (ulong)-KZERO is 2^32 - KZERO
207 if(kpages > ((ulong)-KZERO)/BY2PG)
208 kpages = ((ulong)-KZERO)/BY2PG;
210 conf.upages = conf.npage - kpages;
211 conf.ialloc = (kpages/2)*BY2PG;
214 * Guess how much is taken by the large permanent
215 * datastructures. Mntcache and Mntrpc are not accounted for.
218 kpages -= conf.upages*sizeof(Page)
219 + conf.nproc*sizeof(Proc)
220 + conf.nimage*sizeof(Image)
222 + conf.nswppo*sizeof(Page*);
223 mainmem->maxsize = kpages;
226 * the dynamic allocation will balance the load properly,
227 * hopefully. be careful with 32-bit overflow.
229 imagmem->maxsize = kpages - (kpages/10);
230 if(p = getconf("*imagemaxmb")){
231 imagmem->maxsize = strtol(p, nil, 0)*MB;
232 if(imagmem->maxsize > mainmem->maxsize)
233 imagmem->maxsize = mainmem->maxsize;
238 * we keep FPsave structure in SSE format emulating FXSAVE / FXRSTOR
239 * instructions for legacy x87 fpu.
242 fpx87save(FPsave *fps)
249 * convert x87 tag word to fxsave tag byte:
250 * 00, 01, 10 -> 1, 11 -> 0
253 tag = (tag | (tag >> 1)) & 0x5555;
254 tag = (tag | (tag >> 1)) & 0x3333;
255 tag = (tag | (tag >> 2)) & 0x0F0F;
256 tag = (tag | (tag >> 4)) & 0x00FF;
258 /* NOP fps->fcw = fps->control; */
259 fps->fsw = fps->status;
261 fps->fop = fps->opcode;
262 fps->fpuip = fps->pc;
263 fps->cs = fps->selector;
264 fps->fpudp = fps->operand;
265 fps->ds = fps->oselector;
268 *((ushort*)(d+8)) = *((ushort*)(s+8)), \
269 *((ulong*)(d+4)) = *((ulong*)(s+4)), \
270 *((ulong*)(d)) = *((ulong*)(s))
272 MOVA(fps->xregs+0x70, fps->regs+70);
273 MOVA(fps->xregs+0x60, fps->regs+60);
274 MOVA(fps->xregs+0x50, fps->regs+50);
275 MOVA(fps->xregs+0x40, fps->regs+40);
276 MOVA(fps->xregs+0x30, fps->regs+30);
277 MOVA(fps->xregs+0x20, fps->regs+20);
278 MOVA(fps->xregs+0x10, fps->regs+10);
279 MOVA(fps->xregs+0x00, fps->regs+00);
284 *((ulong*)(d)) = 0, \
285 *((ushort*)(d+4)) = 0
287 CLR6(fps->xregs+0x70+10);
288 CLR6(fps->xregs+0x60+10);
289 CLR6(fps->xregs+0x50+10);
290 CLR6(fps->xregs+0x40+10);
291 CLR6(fps->xregs+0x30+10);
292 CLR6(fps->xregs+0x20+10);
293 CLR6(fps->xregs+0x10+10);
294 CLR6(fps->xregs+0x00+10);
298 fps->rsrvd1 = fps->rsrvd2 = fps->mxcsr = fps->mxcsr_mask = 0;
302 fpx87restore(FPsave *fps)
304 ushort msk, tos, tag, *reg;
306 /* convert fxsave tag byte to x87 tag word */
308 tos = 7 - ((fps->fsw >> 11) & 7);
309 for(msk = 0x80; msk != 0; tos--, msk >>= 1){
311 if((fps->ftw & msk) != 0){
312 reg = (ushort*)&fps->xregs[(tos & 7) << 4];
313 switch(reg[4] & 0x7fff){
315 if((reg[0] | reg[1] | reg[2] | reg[3]) == 0){
316 tag |= 1; /* 01 zero */
321 tag |= 2; /* 10 special */
324 if((reg[3] & 0x8000) == 0)
325 break; /* 00 valid */
326 tag |= 2; /* 10 special */
330 tag |= 3; /* 11 empty */
335 *((ulong*)(d)) = *((ulong*)(s)), \
336 *((ulong*)(d+4)) = *((ulong*)(s+4)), \
337 *((ushort*)(d+8)) = *((ushort*)(s+8))
339 MOVA(fps->regs+00, fps->xregs+0x00);
340 MOVA(fps->regs+10, fps->xregs+0x10);
341 MOVA(fps->regs+20, fps->xregs+0x20);
342 MOVA(fps->regs+30, fps->xregs+0x30);
343 MOVA(fps->regs+40, fps->xregs+0x40);
344 MOVA(fps->regs+50, fps->xregs+0x50);
345 MOVA(fps->regs+60, fps->xregs+0x60);
346 MOVA(fps->regs+70, fps->xregs+0x70);
350 fps->oselector = fps->ds;
351 fps->operand = fps->fpudp;
352 fps->opcode = fps->fop & 0x7ff;
353 fps->selector = fps->cs;
354 fps->pc = fps->fpuip;
356 fps->status = fps->fsw;
357 /* NOP fps->control = fps->fcw; */
359 fps->r1 = fps->r2 = fps->r3 = fps->r4 = 0;
364 static char* mathmsg[] =
366 nil, /* handled below */
367 "denormalized operand",
375 mathnote(ulong status, ulong pc)
377 char *msg, note[ERRMAX];
381 * Some attention should probably be paid here to the
382 * exception masks and error summary.
384 msg = "unknown exception";
385 for(i = 1; i <= 5; i++){
386 if(!((1<<i) & status))
394 msg = "stack overflow";
396 msg = "stack underflow";
398 msg = "invalid operation";
400 snprint(note, sizeof note, "sys: fp: %s fppc=0x%lux status=0x%lux",
402 postnote(up, 1, note, NDebug);
406 * math coprocessor error
409 matherror(Ureg*, void*)
412 * a write cycle to port 0xF0 clears the interrupt latch attached
413 * to the error# line from the 387
415 if(!(m->cpuiddx & Fpuonchip))
419 * get floating point state to check out error
422 up->fpstate = FPinactive;
423 mathnote(up->fpsave->fsw, up->fpsave->fpuip);
430 simderror(Ureg *ureg, void*)
433 up->fpstate = FPinactive;
434 mathnote(up->fpsave->mxcsr & 0x3f, ureg->pc);
438 * math coprocessor emulation fault
441 mathemu(Ureg *ureg, void*)
443 ulong status, control;
445 if(up->fpstate & FPillegal){
446 /* someone did floating point in a note handler */
447 postnote(up, 1, "sys: floating point in note handler", NDebug);
453 if(fpsave == fpssesave)
454 ldmxcsr(0x1f80); /* no simd exceptions on 386 */
455 while(up->fpsave == nil)
456 up->fpsave = mallocalign(sizeof(FPsave), FPalign, 0, 0);
457 up->fpstate = FPactive;
461 * Before restoring the state, check for any pending
462 * exceptions, there's no way to restore the state without
463 * generating an unmasked exception.
464 * More attention should probably be paid here to the
465 * exception masks and error summary.
467 status = up->fpsave->fsw;
468 control = up->fpsave->fcw;
469 if((status & ~control) & 0x07F){
470 mathnote(status, up->fpsave->fpuip);
473 fprestore(up->fpsave);
474 up->fpstate = FPactive;
477 panic("math emu pid %ld %s pc 0x%lux",
478 up->pid, up->text, ureg->pc);
484 * math coprocessor segment overrun
487 mathover(Ureg*, void*)
489 pexit("math overrun", 0);
495 trapenable(VectorCERR, matherror, 0, "matherror");
496 if(m->cpuidfamily == 3)
497 intrenable(IrqIRQ13, matherror, 0, BUSUNKNOWN, "matherror");
498 trapenable(VectorCNA, mathemu, 0, "mathemu");
499 trapenable(VectorCSO, mathover, 0, "mathover");
500 trapenable(VectorSIMD, simderror, 0, "simderror");
504 * set up floating point for a new process
512 memset(p->gdt, 0, sizeof(p->gdt));
515 /* clear debug registers */
516 memset(p->dr, 0, sizeof(p->dr));
523 p->pcycles = -p->kentry;
531 p->kentry = up->kentry;
532 p->pcycles = -p->kentry;
534 /* inherit user descriptors */
535 memmove(p->gdt, up->gdt, sizeof(p->gdt));
537 /* copy local descriptor table */
538 if(up->ldt != nil && up->nldt > 0){
539 p->ldt = smalloc(sizeof(Segdesc) * up->nldt);
540 memmove(p->ldt, up->ldt, sizeof(Segdesc) * up->nldt);
544 /* save floating point state */
546 switch(up->fpstate & ~FPillegal){
549 up->fpstate = FPinactive;
551 while(p->fpsave == nil)
552 p->fpsave = mallocalign(sizeof(FPsave), FPalign, 0, 0);
553 memmove(p->fpsave, up->fpsave, sizeof(FPsave));
554 p->fpstate = FPinactive;
581 * Save the mach dependent part of the process state.
592 /* we could just always putdr7(0) but accessing DR7 might be slow in a VM */
597 if(p->state == Moribund)
600 if(p->fpstate == FPactive){
601 if(p->state == Moribund)
605 * Fpsave() stores without handling pending
606 * unmasked exeptions. Postnote() can't be called
607 * here as sleep() already has up->rlock, so
608 * the handling of pending exceptions is delayed
609 * until the process runs again and generates an
610 * emulation fault to activate the FPU.
614 p->fpstate = FPinactive;
618 * While this processor is in the scheduler, the process could run
619 * on another processor and exit, returning the page tables to
620 * the free list where they could be reallocated and overwritten.
621 * When this processor eventually has to get an entry from the
622 * trashed page tables it will crash.
624 * If there's only one processor, this can't happen.
625 * You might think it would be a win not to do this in that case,
626 * especially on VMware, but it turns out not to matter.
628 mmuflushtlb(PADDR(m->pdb));
632 rebootjump(uintptr entry, uintptr code, ulong size)
634 void (*f)(uintptr, uintptr, ulong);
641 * Modify the machine page table to directly map the low 4MB of memory
642 * This allows the reboot code to turn off the page mapping
645 pdb[PDX(0)] = pdb[PDX(KZERO)];
646 mmuflushtlb(PADDR(pdb));
648 /* setup reboot trampoline function */
649 f = (void*)REBOOTADDR;
650 memmove(f, rebootcode, sizeof(rebootcode));
652 /* off we go - never to return */
654 (*f)(entry, code, size);
669 reboot(void *entry, void *code, ulong size)
675 * the boot processor is cpu0. execute this function on it
676 * so that the new kernel has the same cpu0. this only matters
677 * because the hardware has a notion of which processor was the
678 * boot processor and we look at it at start up.
680 if (m->machno != 0) {
688 /* turn off buffered serial console */
691 /* shutdown devices */
694 rebootjump((ulong)entry & ~0xF0000000UL, PADDR(code), size);