4 * HZ should divide 1000 evenly, ideally.
5 * 100, 125, 200, 250 and 333 are okay.
7 #define HZ 100 /* clock frequency */
8 #define MS2HZ (1000/HZ) /* millisec per clock tick */
9 #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
18 #define MS2TMR(t) ((ulong)(((uvlong)(t) * m->cpuhz)/1000))
19 #define US2TMR(t) ((ulong)(((uvlong)(t) * m->cpuhz)/1000000))
22 * we ignore the first 2 uarts on the omap3530 (see uarti8250.c) and use the
23 * third one but call it 0.
27 typedef struct Conf Conf;
28 typedef struct Confmem Confmem;
29 typedef struct FPsave FPsave;
30 typedef struct ISAConf ISAConf;
31 typedef struct Label Label;
32 typedef struct Lock Lock;
33 typedef struct Memcache Memcache;
34 typedef struct MMMU MMMU;
35 typedef struct Mach Mach;
36 typedef u32int Mreg; /* Msr - bloody UART */
37 typedef struct Notsave Notsave;
38 typedef struct Page Page;
39 typedef struct PhysUart PhysUart;
40 typedef struct PMMU PMMU;
41 typedef struct Proc Proc;
43 typedef struct Uart Uart;
44 typedef struct Ureg Ureg;
47 #pragma incomplete Ureg
49 #define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */
52 * parameters for sysproc.c
54 #define AOUT_MAGIC (E_MAGIC)
77 * emulated floating point
83 ulong regs[Nfpctlregs][3];
109 ulong nmach; /* processors */
110 ulong nproc; /* processes */
111 Confmem mem[1]; /* physical memory */
112 ulong npage; /* total physical pages of memory */
113 usize upages; /* user page pool */
114 ulong copymode; /* 0 is copy on write, 1 is copy on reference */
115 ulong ialloc; /* max interrupt time allocation in bytes */
116 ulong pipeqsize; /* size in bytes of pipe queues */
117 ulong nimage; /* number of page cache image headers */
118 ulong nswap; /* number of swap pages */
119 int nswppo; /* max # of pageouts per segment pass */
120 ulong hz; /* processor cycle freq */
122 int monitor; /* flag */
126 * things saved in the Proc structure during a notify
137 PTE* mmul1; /* l1 for this processor */
146 #define NCOLOR 1 /* 1 level cache, don't worry about VCE's */
150 Page* mmul2cache; /* free mmu pages */
153 #include "../port/portdat.h"
157 int machno; /* physical id of processor */
158 uintptr splpc; /* pc of last caller to splhi */
160 Proc* proc; /* current process */
163 int flushmmu; /* flush current proc mmu state */
165 ulong ticks; /* of the clock since boot time */
166 Label sched; /* scheduler wakeup */
167 Lock alarmlock; /* access to alarm list */
168 void* alarm; /* alarms bound to this clock */
171 Proc* readied; /* for runproc */
172 ulong schedticks; /* next forced context switch */
185 uvlong fastclock; /* last sampled value */
186 uvlong inidle; /* time spent in idlehands() */
190 Perf perf; /* performance counters */
194 uvlong cpuhz; /* speed of cpu */
195 uvlong cyclefreq; /* Frequency of user readable cycle counter */
197 /* save areas for exceptions, hold R0-R4 */
202 u32int smon[5]; /* probably not needed */
212 #define VA(k) ((uintptr)(k))
213 #define kmap(p) (KMap*)((p)->pa|kseg0)
219 int machs; /* bitmap of active CPUs */
220 int exiting; /* shutdown */
221 int ispanic; /* shutdown in response to a panic */
224 extern register Mach* m; /* R10 */
225 extern register Proc* up; /* R9 */
226 extern uintptr kseg0;
227 extern Mach* machaddr[MAXMACH];
228 extern ulong memsize;
229 extern int normalprint;
232 * a parsed plan9.ini line
249 #define MACHP(n) (machaddr[n])
252 * Horrid. But the alternative is 'defined'.
255 #define DBGFLG (dbgflg[_DBGC_])
261 extern char dbgflg[256];
263 #define dbgprint print /* for now */
266 * hardware info about a device
275 ulong intnum; /* interrupt number */
276 char *type; /* card type, malloced */
277 int nports; /* Number of ports */
278 Devport *ports; /* The ports themselves */
287 /* characteristics of a given cache level */
289 uint level; /* 1 is nearest processor, 2 further away */
290 uint l1ip; /* l1 I policy */
292 uint nways; /* associativity */
294 uint linelen; /* bytes per cache line */
298 uint waysh; /* shifts for set/way register */