5 #include "../port/lib.h"
11 typedef struct Raven Raven;
60 static Raven *raven = (Raven*)RAVEN;
64 setmap(int i, ulong addr, ulong len, ulong busaddr, int attr)
66 raven->map[i].start = addr>>16;
67 raven->map[i].end = (addr+len-1)>>16;
68 raven->map[i].off = (busaddr-addr)>>16;
69 raven->map[i].attr = attr;
75 return (x>>24)|((x>>8)&0xff00)|((x<<8)&0xff0000)|(x<<24);
81 return swap32(*(ulong*)(mpic+rno));
85 mpic32w(int rno, ulong x)
87 *(ulong*)(mpic+rno) = swap32(x);
97 if(raven->vid != 0x1057 || raven->did !=0x4801)
98 panic("raven not found");
100 /* set up a sensible hardware memory/IO map */
101 setmap(0, PCIMEM0, PCISIZE0, 0, Wen|Ren|Mem);
102 setmap(1, KZERO, IOSIZE, 0, Wen|Ren); /* keeps PPCbug happy */
103 setmap(2, PCIMEM1, PCISIZE1, PCISIZE0, Wen|Ren|Mem);
104 setmap(3, IOMEM, IOSIZE, 0, Wen|Ren); /* I/O must be slot 3 for PCI cfg space */
106 p = pcimatch(nil, 0x1057, 0x4801);
108 panic("raven PCI regs not found");
109 mpic = (p->mem[1].bar+PCIMEM0);
111 /* ensure all interrupts are off, and routed to cpu 0 */
112 for(i = 0; i < 16; i++) {
113 mpic32w(0x10000+0x20*i, (1<<31)); /* mask */
114 mpic32w(0x10010+0x20*i, 1); /* route to cpu 0 */
117 mpic32w(0x20080, 1); /* cpu 0 task pri */
118 // mpic32w(0x21080, 1); /* cpu 1 task pri */
119 mpic32w(0x1020, (1<<29)); /* Mixed mode (8259 & Raven intrs both available) */
123 mpicenable(int vec, Vctl *v)
127 x = (1<<22)|(15<<16)|vec;
130 mpic32w(0x10000+0x20*vec, x);
138 mpic32w(0x10000+0x20*vec, (1<<31));
144 return mpic32r(0x200A0 + (m->machno<<12));
151 mpic32w(0x200B0 + (m->machno<<12), 0);