2 * Memory and machine-specific definitions. Used in C and assembler.
4 #define KiB 1024u /* Kibi 0x0000000000000400 */
5 #define MiB 1048576u /* Mebi 0x0000000000100000 */
6 #define GiB 1073741824u /* Gibi 000000000040000000 */
8 #define MIN(a, b) ((a) < (b)? (a): (b))
9 #define MAX(a, b) ((a) > (b)? (a): (b))
12 * Not sure where these macros should go.
13 * This probably isn't right but will do for now.
14 * The macro names are problematic too.
17 * In B(o), 'o' is the bit offset in the register.
18 * For multi-bit fields use F(v, o, w) where 'v' is the value
19 * of the bit-field of width 'w' with LSb at bit offset 'o'.
22 #define F(v, o, w) (((v) & ((1<<(w))-1))<<(o))
24 #define FCLR(d, o, w) ((d) & ~(((1<<(w))-1)<<(o)))
25 #define FEXT(d, o, w) (((d)>>(o)) & ((1<<(w))-1))
26 #define FINS(d, o, w, v) (FCLR((d), (o), (w))|F((v), (o), (w)))
27 #define FSET(d, o, w) ((d)|(((1<<(w))-1)<<(o)))
29 #define FMASK(o, w) (((1<<(w))-1)<<(o))
34 #define BY2PG (4*KiB) /* bytes per page */
35 #define PGSHIFT 12 /* log(BY2PG) */
36 #define PGROUND(s) ROUND(s, BY2PG)
37 #define ROUND(s, sz) (((s)+(sz-1))&~(sz-1))
39 #define MAXMACH 1 /* max # cpus system can run */
40 #define MACHSIZE BY2PG
42 #define KSTACK (8*KiB)
43 #define STACKALIGN(sp) ((sp) & ~3) /* bug: assure with alloc */
47 * KTZERO is used by kprof and dumpstack (if any).
49 * KZERO is mapped to physical 0.
50 * u-boot claims to take 0 - 8MB.
52 * vectors are at 0, plan9.ini is at KZERO+4K and is limited to 16K by
53 * devenv. L2 PTEs for trap vectors & i/o regs are stored from KZERO+56K
54 * to L1-MACHSIZE (KZERO+60K). cpu0's Mach struct is at L1 - MACHSIZE(4K)
55 * to L1 (KZERO+60K to KZERO+64K). L1 PTEs are stored from L1 to L1+32K
56 * (KZERO+64K to KZERO+96K). KTZERO may be anywhere after KZERO+96K.
59 #define KSEG0 0x60000000 /* kernel segment */
60 /* mask to check segment; good for 512MB dram */
61 #define KSEGM 0xE0000000
62 #define KZERO KSEG0 /* kernel address space */
63 #define CONFADDR (KZERO+4*KiB) /* unparsed plan9.ini */
64 #define L1 (KZERO+64*KiB) /* tt ptes: 16KiB aligned */
65 #define KTZERO (KZERO+0x800000) /* kernel text start */
67 #define UZERO 0 /* user segment */
68 #define UTZERO (UZERO+BY2PG) /* user text start */
69 #define USTKTOP KZERO /* user segment end +1 */
70 #define USTKSIZE (8*1024*1024) /* user stack size */
72 /* address at which to copy and execute rebootcode */
73 #define REBOOTADDR KADDR(0x100)
77 * Does this need to be here? Used in assembler?
79 #define HZ 100 /* clock frequency */
80 #define MS2HZ (1000/HZ) /* millisec per clock tick */
81 #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
86 #define CLOCKFREQ (200*1000*1000) /* TCLK on sheeva: 200MHz */
87 //#define MS2TMR(t) ((ulong)(((uvlong)(t)*CLOCKFREQ)/1000))
88 //#define US2TMR(t) ((ulong)(((uvlong)(t)*CLOCKFREQ)/1000000))
93 #define BLOCKALIGN 32 /* only used in allocb.c */
98 #define BI2BY 8 /* bits per byte */
101 #define BY2V 8 /* only used in xalloc.c */
103 #define CACHELINESZ 32
104 #define PTEMAPMEM (1024*1024)
105 #define PTEPERTAB (PTEMAPMEM/BY2PG)
106 #define SEGMAPSIZE 1984
107 #define SSEGMAPSIZE 16
108 #define PPN(x) ((x)&~(BY2PG-1))
111 * These bits are completely artificial.
112 * With a little work these move to port.
114 #define PTEVALID (1<<0)
116 #define PTEWRITE (1<<1)
118 #define PTEUNCACHED (1<<2)
121 * Physical machine information from here on.
125 /* from 0x80000000 up is uncached by L2 (see archkw.c) */
126 #define PHYSCESASRAM 0xc8010000
127 // #define PHYSSPIFLASH 0xe8000000 /* ignore spi flash */
128 /* this address is configured by u-boot, and is 0xd0000000 at reset */
129 #define PHYSIO 0xf1000000 /* internal registers */
130 #define PHYSCONS (PHYSIO + 0x12000) /* uart */
131 #define PHYSNAND1 0xf9000000 /* sheeva/openrd (remapped) */
132 #define PHYSNAND2 0xd8000000 /* guru */
133 #define PHYSBOOTROM 0xffff0000 /* boot rom */
135 #define FLASHSIZE (512*MiB) /* but not addressed linearly */
137 #define VIRTIO PHYSIO