1 typedef struct Conf Conf;
2 typedef struct Confmem Confmem;
3 typedef struct FPsave FPsave;
4 typedef struct PFPU PFPU;
5 typedef struct ISAConf ISAConf;
6 typedef struct Label Label;
7 typedef struct Lock Lock;
8 typedef struct Memcache Memcache;
9 typedef struct MMMU MMMU;
10 typedef struct Mach Mach;
11 typedef struct Page Page;
12 typedef struct Pcidev Pcidev;
13 typedef struct PhysUart PhysUart;
14 typedef struct PMMU PMMU;
15 typedef struct Proc Proc;
17 typedef struct Soc Soc;
18 typedef struct Uart Uart;
19 typedef struct Ureg Ureg;
22 #pragma incomplete Pcidev
23 #pragma incomplete Ureg
25 #define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */
28 * parameters for sysproc.c
30 #define AOUT_MAGIC (E_MAGIC)
49 * emulated floating point
59 ulong regs[Nfpctlregs][3];
90 ulong nmach; /* processors */
91 ulong nproc; /* processes */
92 ulong monitor; /* has monitor? */
93 Confmem mem[1]; /* physical memory */
94 ulong npage; /* total physical pages of memory */
95 ulong upages; /* user page pool */
96 ulong copymode; /* 0 is copy on write, 1 is copy on reference */
97 ulong ialloc; /* max interrupt time allocation in bytes */
98 ulong pipeqsize; /* size in bytes of pipe queues */
99 ulong nimage; /* number of page cache image headers */
100 ulong nswap; /* number of swap pages */
101 int nswppo; /* max # of pageouts per segment pass */
102 // ulong hz; /* processor cycle freq */
111 PTE* mmul1; /* l1 for this processor */
120 #define NCOLOR 1 /* 1 level cache, don't worry about VCE's */
124 Page* mmul2cache; /* free mmu pages */
127 #include "../port/portdat.h"
131 int machno; /* physical id of processor */
132 uintptr splpc; /* pc of last caller to splhi */
133 Proc* proc; /* current process */
135 /* end of offsets known to asm */
139 vlong fastclock; /* last sampled value */
143 int socrev; /* system-on-chip revision */
145 uvlong cpuhz; /* speed of cpu */
147 /* save areas for exceptions */
152 #define fiqstack sfiq
153 #define irqstack sirq
154 #define abtstack sabt
155 #define undstack sund
164 #define VA(k) ((uintptr)(k))
165 #define kmap(p) (KMap*)((p)->pa|kseg0)
170 char machs[MAXMACH]; /* active CPUs */
171 int exiting; /* shutdown */
175 Frequency = 1200*1000*1000, /* the processor clock */
178 extern register Mach* m; /* R10 */
179 extern register Proc* up; /* R9 */
181 extern uintptr kseg0;
182 extern Mach* machaddr[MAXMACH];
185 Nvec = 8, /* # of vectors at start of lexception.s */
189 * Layout of physical 0.
191 typedef struct Vectorpage {
192 void (*vectors[Nvec])(void);
197 * a parsed plan9.ini line
214 #define MACHP(n) (machaddr[n])
217 * Horrid. But the alternative is 'defined'.
220 #define DBGFLG (dbgflg[_DBGC_])
226 extern char dbgflg[256];
228 #define dbgprint print /* for now */
231 * hardware info about a device
240 ulong intnum; /* interrupt number */
241 char *type; /* card type, malloced */
242 int nports; /* Number of ports */
243 Devport *ports; /* The ports themselves */
252 /* characteristics of a given cache level */
254 uint level; /* 1 is nearest processor, 2 further away */
255 uint kind; /* I, D or unified */
258 uint nways; /* associativity */
260 uint linelen; /* bytes per cache line */
264 uint waysh; /* shifts for set/way register */
268 struct Soc { /* addr's of SoC controllers */
273 // uintptr sdramd; /* unused */
279 uintptr cesa; /* crypto accel. */
288 uintptr rtc; /* real-time clock */