4 * timers count down to zero.
7 #include "../port/lib.h"
16 Tcycles = CLOCKFREQ / HZ, /* cycles per clock tick */
17 Dogperiod = 15 * CLOCKFREQ, /* at most 21 s.; must fit in ulong */
19 MinPeriod = MaxPeriod / 100,
23 Tmr0reload = 1<<1, /* at 0 count, load timer0 from reload0 */
25 Tmr1reload = 1<<3, /* at 0 count, load timer1 from reload1 */
30 typedef struct TimerReg TimerReg;
36 ulong timer0; /* cycles until zero */
38 ulong timer1; /* cycles until zero */
43 static int ticks; /* for sanity checking; m->ticks doesn't always get updated */
46 clockintr(Ureg *ureg, void *arg)
51 tmr->timerwd = Dogperiod; /* reassure the watchdog */
55 if (nesting == 0) { /* if the clock interrupted itself, bail out */
61 intrclear(Irqbridge, IRQcputimer0);
64 /* stop clock interrupts and disable the watchdog timer */
68 TimerReg *tmr = (TimerReg *)soc.clock;
78 CpucsReg *cpu = (CpucsReg *)soc.cpu;
79 TimerReg *tmr = (TimerReg *)soc.clock;
84 * verify sanity of timer0
87 intrenable(Irqbridge, IRQcputimer0, clockintr, tmr, "clock0");
88 s = spllo(); /* risky */
89 /* take any deferred clock (& other) interrupts here */
92 /* adjust m->bootdelay, used by delay()? */
97 tmr->ctl = Tmr0enable; /* just once */
100 s = spllo(); /* risky */
101 for (i = 0; i < 10 && ticks == 0; i++) {
108 if (tmr->timer0 == 0)
109 panic("clock not interrupting");
110 else if (tmr->timer0 == tmr->reload0)
111 panic("clock not ticking");
113 panic("clock running very slowly");
117 * configure all timers
120 tmr->reload0 = tmr->timer0 = Tcycles; /* tick clock */
121 tmr->reload1 = tmr->timer1 = ~0; /* cycle clock */
122 tmr->timerwd = Dogperiod; /* watch dog timer */
124 tmr->ctl = Tmr0enable | Tmr0reload | Tmr1enable | Tmr1reload |
126 cpu->rstout |= RstoutWatchdog;
134 TimerReg *tmr = (TimerReg *)soc.clock;
136 offset = next - fastticks(nil);
137 if(offset < MinPeriod)
139 else if(offset > MaxPeriod)
141 tmr->timer0 = offset;
146 fastticks(uvlong *hz)
154 /* zero low ulong of fastclock */
155 now = (m->fastclock & ~(uvlong)~0ul) | perfticks();
156 if(now < m->fastclock) /* low bits must have wrapped */
166 TimerReg *tmr = (TimerReg *)soc.clock;
180 return fastticks2us(fastticks(nil));
192 for(i = 0; i < l; i++)