5 #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5))
7 TEXT _start(SB), 1, $-4
8 MOV $setSB-KZERO(SB), R28
11 /* use dedicated stack pointer per exception level */
17 /* invalidate local caches */
21 MOV $(MACHADDR(0)-KZERO), R27
28 ADD $(MACHSIZE-16), R27, R2
33 /* clear page table and machs */
35 MOV $(MACHADDR(-1)-KZERO), R2
42 MOV $edata-KZERO(SB), R1
43 MOV $end-KZERO(SB), R2
49 /* setup page tables */
67 TEXT stop<>(SB), 1, $-4
78 MOVWU $(0x3F000000+0x215040), R14
82 TEXT svcmode<>(SB), 1, $-4
96 /* HCR = RW, HCD, SWIO, BSU, FB */
97 MOVWU $(1<<31 | 1<<29 | 1<<2 | 0<<10 | 0<<9), R0
102 MOVWU $(3<<4 | 1<<11 | 1<<16 | 1<<18 | 3<<22 | 3<<28), R0
107 /* set VMID to zero */
112 MOVWU $(0xF<<6 | 4), R0
119 TEXT mmudisable<>(SB), 1, $-4
149 /* initialise SCTLR, MMU and caches off */
152 BIC $(SCTLRCLR | SCTLRMMU), R0
160 TEXT mmuenable<>(SB), 1, $-4
161 /* return to virtual */
168 /* memory attributes */
170 ( 0xFF << MA_MEM_WB*8 \
171 | 0x33 << MA_MEM_WT*8 \
172 | 0x44 << MA_MEM_UC*8 \
173 | 0x00 << MA_DEV_nGnRnE*8 \
174 | 0x04 << MA_DEV_nGnRE*8 \
175 | 0x08 << MA_DEV_nGRE*8 \
176 | 0x0C << MA_DEV_GRE*8 )
181 /* translation control */
186 /* TG1 */ | (((3<<16|1<<14|2<<12)>>PGSHIFT)&3)<<30 \
187 /* SH1 */ | SHARE_INNER<<28 \
188 /* ORGN1 */ | CACHE_WB<<26 \
189 /* IRGN1 */ | CACHE_WB<<24 \
192 /* T1SZ */ | (64-EVASHIFT)<<16 \
193 /* TG0 */ | (((1<<16|2<<14|0<<12)>>PGSHIFT)&3)<<14 \
194 /* SH0 */ | SHARE_INNER<<12 \
195 /* ORGN0 */ | CACHE_WB<<10 \
196 /* IRGN0 */ | CACHE_WB<<8 \
198 /* T0SZ */ | (64-EVASHIFT)<<0 )
200 MRS ID_AA64MMFR0_EL1, R2
206 /* load the page tables */
207 MOV $(L1TOP-KZERO), R0
213 /* enable MMU and caches */
226 TEXT touser(SB), 1, $-4
227 MSR $0x3, DAIFSet // interrupts off
228 MOVWU $0x10028, R1 // entry
236 TEXT cmpswap(SB), 1, $-4
254 TEXT _tas(SB), 1, $-4
262 TEXT coherence(SB), 1, $-4
266 TEXT islo(SB), 1, $-4
272 TEXT splhi(SB), 1, $-4
277 TEXT splfhi(SB), 1, $-4
282 TEXT spllo(SB), 1, $-4
286 TEXT splflo(SB), 1, $-4
290 TEXT splx(SB), 1, $-4
294 TEXT idlehands(SB), 1, $-4
302 TEXT cycles(SB), 1, $-4
303 TEXT lcycles(SB), 1, $-4
307 TEXT setlabel(SB), 1, $-4
314 TEXT gotolabel(SB), 1, $-4
315 MOV 8(R0), LR /* link */
316 MOV 0(R0), R1 /* sp */
321 TEXT returnto(SB), 1, $-4
325 TEXT getfar(SB), 1, $-4
329 TEXT setttbr(SB), 1, $-4
337 TEXT magic(SB), 1, $-4
349 * TLB maintenance operations.
350 * these broadcast to all cpu's in the cluser
351 * (inner sharable domain).
353 TEXT flushasidva(SB), 1, $-4
354 TEXT tlbivae1is(SB), 1, $-4
356 TLBI R0, 0,8,3,1 /* VAE1IS */
361 TEXT flushasidvall(SB), 1, $-4
362 TEXT tlbivale1is(SB), 1, $-4
364 TLBI R0, 0,8,3,5 /* VALE1IS */
369 TEXT flushasid(SB), 1, $-4
370 TEXT tlbiaside1is(SB), 1, $-4
372 TLBI R0, 0,8,3,2 /* ASIDE1IS */
377 TEXT flushtlb(SB), 1, $-4
378 TEXT tlbivmalle1is(SB), 1, $-4
380 TLBI R0, 0,8,3,0 /* VMALLE1IS */
386 * flush the tlb of this cpu. no broadcast.
388 TEXT flushlocaltlb(SB), 1, $-4
389 TEXT tlbivmalle1(SB), 1, $-4
391 TLBI R0, 0,8,7,0 /* VMALLE1 */
396 TEXT fpsaveregs(SB), 1, $-4
397 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 0) /* MOV { V0, V1, V2, V3 }, (R0)64! */
398 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 4) /* MOV { V4, V5, V6, V7 }, (R0)64! */
399 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 8) /* MOV { V8, V9, V10,V11 }, (R0)64! */
400 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 12) /* MOV { V12,V13,V14,V15 }, (R0)64! */
401 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 16) /* MOV { V16,V17,V18,V19 }, (R0)64! */
402 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 20) /* MOV { V20,V21,V22,V23 }, (R0)64! */
403 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 24) /* MOV { V24,V25,V26,V27 }, (R0)64! */
404 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 28) /* MOV { V28,V29,V30,V31 }, (R0)64! */
407 TEXT fploadregs(SB), 1, $-4
408 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 0) /* MOV (R0)64!, { V0, V1, V2, V3 } */
409 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 4) /* MOV (R0)64!, { V4, V5, V6, V7 } */
410 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 8) /* MOV (R0)64!, { V8, V9, V10,V11 } */
411 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 12) /* MOV (R0)64!, { V12,V13,V14,V15 } */
412 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 16) /* MOV (R0)64!, { V16,V17,V18,V19 } */
413 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 20) /* MOV (R0)64!, { V20,V21,V22,V23 } */
414 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 24) /* MOV (R0)64!, { V24,V25,V26,V27 } */
415 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 28) /* MOV (R0)64!, { V28,V29,V30,V31 } */
418 // syscall or trap from EL0
419 TEXT vsys0(SB), 1, $-4
420 LSRW $26, R0, R17 // ec
421 CMPW $0x15, R17 // SVC trap?
422 BNE _itsatrap // nope.
424 MOV R26, 224(RSP) // special
425 MOV R27, 232(RSP) // special
426 MOV R28, 240(RSP) // sb
427 MOV R29, 248(RSP) // special
433 MOV R0, 288(RSP) // type
434 MOV R1, 264(RSP) // sp
435 MOV R2, 272(RSP) // pc
436 MOV R3, 280(RSP) // psr
442 ADD $16, RSP, R0 // ureg
445 TEXT forkret(SB), 1, $-4
446 MSR $0x3, DAIFSet // interrupts off
448 ADD $16, RSP, R0 // ureg
450 MOV 16(RSP), R0 // ret
451 MOV 264(RSP), R1 // sp
452 MOV 272(RSP), R2 // pc
453 MOV 280(RSP), R3 // psr
459 MOV 224(RSP), R26 // special
460 MOV 232(RSP), R27 // special
461 MOV 240(RSP), R28 // sb
462 MOV 248(RSP), R29 // special
464 MOV 256(RSP), R30 // link
466 ADD $TRAPFRAMESIZE, RSP
469 TEXT itsatrap<>(SB), 1, $-4
497 // trap/irq/fiq/serr from EL0
498 TEXT vtrap0(SB), 1, $-4
499 MOV R26, 224(RSP) // special
500 MOV R27, 232(RSP) // special
501 MOV R28, 240(RSP) // sb
502 MOV R29, 248(RSP) // special
508 MOV R0, 288(RSP) // type
509 MOV R1, 264(RSP) // sp
510 MOV R2, 272(RSP) // pc
511 MOV R3, 280(RSP) // psr
517 ADD $16, RSP, R0 // ureg
520 TEXT noteret(SB), 1, $-4
521 MSR $0x3, DAIFSet // interrupts off
523 ADD $16, RSP, R0 // ureg
525 MOV 264(RSP), R1 // sp
526 MOV 272(RSP), R2 // pc
527 MOV 280(RSP), R3 // psr
533 MOV 224(RSP), R26 // special
534 MOV 232(RSP), R27 // special
535 MOV 240(RSP), R28 // sb
536 MOV 248(RSP), R29 // special
566 MOV 256(RSP), R30 // link
568 ADD $TRAPFRAMESIZE, RSP
571 // irq/fiq/trap/serr from EL1
572 TEXT vtrap1(SB), 1, $-4
573 MOV R29, 248(RSP) // special
575 ADD $TRAPFRAMESIZE, RSP, R1
579 MOV R0, 288(RSP) // type
580 MOV R1, 264(RSP) // sp
581 MOV R2, 272(RSP) // pc
582 MOV R3, 280(RSP) // psr
584 ADD $16, RSP, R0 // ureg
587 MSR $0x3, DAIFSet // interrupts off
589 MOV 272(RSP), R2 // pc
590 MOV 280(RSP), R3 // psr
595 MOV 248(RSP), R29 // special
599 TEXT vsys(SB), 1, $-4
600 SUB $TRAPFRAMESIZE, RSP
603 MOV R30, 256(RSP) // link
605 MOV R17, 152(RSP) // temp
607 MRS ESR_EL1, R0 // type
610 B _vsyspatch // branch to vsys0() patched in
612 TEXT vtrap(SB), 1, $-4
613 SUB $TRAPFRAMESIZE, RSP
642 MOV R30, 256(RSP) // link
644 MRS ESR_EL1, R0 // type
647 B _vtrappatch // branch to vtrapX() patched in
649 TEXT virq(SB), 1, $-4
650 SUB $TRAPFRAMESIZE, RSP
679 MOV R30, 256(RSP) // link
681 MOV $(1<<32), R0 // type irq
684 B _virqpatch // branch to vtrapX() patched in
686 TEXT vfiq(SB), 1, $-4
687 SUB $TRAPFRAMESIZE, RSP
716 MOV R30, 256(RSP) // link
717 MOV $(2<<32), R0 // type fiq
720 B _vfiqpatch // branch to vtrapX() patched in
722 TEXT vserr(SB), 1, $-4
723 SUB $TRAPFRAMESIZE, RSP
752 MOV R30, 256(RSP) // link
755 ORR $(3<<32), R0 // type
757 B _vserrpatch // branch to vtrapX() patched in