5 #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5))
7 TEXT _start(SB), 1, $-4
8 MOV $setSB-KZERO(SB), R28
11 /* use dedicated stack pointer per exception level */
17 /* invalidate local caches */
21 MOV $(MACHADDR(0)-KZERO), R27
28 ADD $(MACHSIZE-16), R27, R2
33 /* clear page table and machs */
35 MOV $(MACHADDR(-1)-KZERO), R2
42 MOV $edata-KZERO(SB), R1
43 MOV $end-KZERO(SB), R2
49 /* setup page tables */
67 TEXT stop<>(SB), 1, $-4
78 MOVWU $(0x3F000000+0x215040), R14
82 TEXT svcmode<>(SB), 1, $-4
96 /* HCR = RW, HCD, SWIO, BSU, FB */
97 MOVWU $(1<<31 | 1<<29 | 1<<2 | 0<<10 | 0<<9), R0
102 MOVWU $(3<<4 | 1<<11 | 1<<16 | 1<<18 | 3<<22 | 3<<28), R0
107 /* set VMID to zero */
112 MOVWU $(0xF<<6 | 4), R0
119 TEXT mmudisable<>(SB), 1, $-4
149 /* initialise SCTLR, MMU and caches off */
152 BIC $(SCTLRCLR | SCTLRMMU), R0
160 TEXT mmuenable<>(SB), 1, $-4
161 /* return to virtual */
168 /* memory attributes */
170 ( 0xFF << MA_MEM_WB*8 \
171 | 0x33 << MA_MEM_WT*8 \
172 | 0x44 << MA_MEM_UC*8 \
173 | 0x00 << MA_DEV_nGnRnE*8 \
174 | 0x04 << MA_DEV_nGnRE*8 \
175 | 0x08 << MA_DEV_nGRE*8 \
176 | 0x0C << MA_DEV_GRE*8 )
181 /* translation control */
186 /* TG1 */ | (((3<<16|1<<14|2<<12)>>PGSHIFT)&3)<<30 \
187 /* SH1 */ | SHARE_INNER<<28 \
188 /* ORGN1 */ | CACHE_WB<<26 \
189 /* IRGN1 */ | CACHE_WB<<24 \
192 /* T1SZ */ | (64-EVASHIFT)<<16 \
193 /* TG0 */ | (((1<<16|2<<14|0<<12)>>PGSHIFT)&3)<<14 \
194 /* SH0 */ | SHARE_INNER<<12 \
195 /* ORGN0 */ | CACHE_WB<<10 \
196 /* IRGN0 */ | CACHE_WB<<8 \
198 /* T0SZ */ | (64-EVASHIFT)<<0 )
200 MRS ID_AA64MMFR0_EL1, R2
206 /* load the page tables */
207 MOV $(L1TOP-KZERO), R0
213 /* enable MMU and caches */
226 TEXT touser(SB), 1, $-4
227 MSR $0x3, DAIFSet // interrupts off
228 MOVWU $0x10028, R1 // entry
236 TEXT cmpswap(SB), 1, $-4
254 TEXT _tas(SB), 1, $-4
262 TEXT coherence(SB), 1, $-4
266 TEXT islo(SB), 1, $-4
272 TEXT splhi(SB), 1, $-4
277 TEXT splfhi(SB), 1, $-4
282 TEXT spllo(SB), 1, $-4
286 TEXT splflo(SB), 1, $-4
290 TEXT splx(SB), 1, $-4
294 TEXT cycles(SB), 1, $-4
295 TEXT lcycles(SB), 1, $-4
299 TEXT setlabel(SB), 1, $-4
306 TEXT gotolabel(SB), 1, $-4
307 MOV 8(R0), LR /* link */
308 MOV 0(R0), R1 /* sp */
313 TEXT returnto(SB), 1, $-4
317 TEXT getfar(SB), 1, $-4
321 TEXT setttbr(SB), 1, $-4
329 TEXT magic(SB), 1, $-4
341 * TLB maintenance operations.
342 * these broadcast to all cpu's in the cluser
343 * (inner sharable domain).
345 TEXT flushasidva(SB), 1, $-4
346 TEXT tlbivae1is(SB), 1, $-4
348 TLBI R0, 0,8,3,1 /* VAE1IS */
353 TEXT flushasidvall(SB), 1, $-4
354 TEXT tlbivale1is(SB), 1, $-4
356 TLBI R0, 0,8,3,5 /* VALE1IS */
361 TEXT flushasid(SB), 1, $-4
362 TEXT tlbiaside1is(SB), 1, $-4
364 TLBI R0, 0,8,3,2 /* ASIDE1IS */
369 TEXT flushtlb(SB), 1, $-4
370 TEXT tlbivmalle1is(SB), 1, $-4
372 TLBI R0, 0,8,3,0 /* VMALLE1IS */
378 * flush the tlb of this cpu. no broadcast.
380 TEXT flushlocaltlb(SB), 1, $-4
381 TEXT tlbivmalle1(SB), 1, $-4
383 TLBI R0, 0,8,7,0 /* VMALLE1 */
388 TEXT fpsaveregs(SB), 1, $-4
389 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 0) /* MOV { V0, V1, V2, V3 }, (R0)64! */
390 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 4) /* MOV { V4, V5, V6, V7 }, (R0)64! */
391 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 8) /* MOV { V8, V9, V10,V11 }, (R0)64! */
392 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 12) /* MOV { V12,V13,V14,V15 }, (R0)64! */
393 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 16) /* MOV { V16,V17,V18,V19 }, (R0)64! */
394 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 20) /* MOV { V20,V21,V22,V23 }, (R0)64! */
395 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 24) /* MOV { V24,V25,V26,V27 }, (R0)64! */
396 WORD $(1<<30 | 3 << 26 | 2<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 28) /* MOV { V28,V29,V30,V31 }, (R0)64! */
399 TEXT fploadregs(SB), 1, $-4
400 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 0) /* MOV (R0)64!, { V0, V1, V2, V3 } */
401 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 4) /* MOV (R0)64!, { V4, V5, V6, V7 } */
402 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 8) /* MOV (R0)64!, { V8, V9, V10,V11 } */
403 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 12) /* MOV (R0)64!, { V12,V13,V14,V15 } */
404 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 16) /* MOV (R0)64!, { V16,V17,V18,V19 } */
405 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 20) /* MOV (R0)64!, { V20,V21,V22,V23 } */
406 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 24) /* MOV (R0)64!, { V24,V25,V26,V27 } */
407 WORD $(1<<30 | 3 << 26 | 3<<22 | 0x1F<<16 | 3<<10 | 0<<5 | 28) /* MOV (R0)64!, { V28,V29,V30,V31 } */
410 // syscall or trap from EL0
411 TEXT vsys0(SB), 1, $-4
412 LSRW $26, R0, R17 // ec
413 CMPW $0x15, R17 // SVC trap?
414 BNE _itsatrap // nope.
416 MOV R26, 224(RSP) // special
417 MOV R27, 232(RSP) // special
418 MOV R28, 240(RSP) // sb
419 MOV R29, 248(RSP) // special
425 MOV R0, 288(RSP) // type
426 MOV R1, 264(RSP) // sp
427 MOV R2, 272(RSP) // pc
428 MOV R3, 280(RSP) // psr
434 ADD $16, RSP, R0 // ureg
437 TEXT forkret(SB), 1, $-4
438 MSR $0x3, DAIFSet // interrupts off
440 ADD $16, RSP, R0 // ureg
442 MOV 16(RSP), R0 // ret
443 MOV 264(RSP), R1 // sp
444 MOV 272(RSP), R2 // pc
445 MOV 280(RSP), R3 // psr
451 MOV 224(RSP), R26 // special
452 MOV 232(RSP), R27 // special
453 MOV 240(RSP), R28 // sb
454 MOV 248(RSP), R29 // special
456 MOV 256(RSP), R30 // link
458 ADD $TRAPFRAMESIZE, RSP
461 TEXT itsatrap<>(SB), 1, $-4
489 // trap/irq/fiq/serr from EL0
490 TEXT vtrap0(SB), 1, $-4
491 MOV R26, 224(RSP) // special
492 MOV R27, 232(RSP) // special
493 MOV R28, 240(RSP) // sb
494 MOV R29, 248(RSP) // special
500 MOV R0, 288(RSP) // type
501 MOV R1, 264(RSP) // sp
502 MOV R2, 272(RSP) // pc
503 MOV R3, 280(RSP) // psr
509 ADD $16, RSP, R0 // ureg
512 TEXT noteret(SB), 1, $-4
513 MSR $0x3, DAIFSet // interrupts off
515 ADD $16, RSP, R0 // ureg
517 MOV 264(RSP), R1 // sp
518 MOV 272(RSP), R2 // pc
519 MOV 280(RSP), R3 // psr
525 MOV 224(RSP), R26 // special
526 MOV 232(RSP), R27 // special
527 MOV 240(RSP), R28 // sb
528 MOV 248(RSP), R29 // special
558 MOV 256(RSP), R30 // link
560 ADD $TRAPFRAMESIZE, RSP
563 // irq/fiq/trap/serr from EL1
564 TEXT vtrap1(SB), 1, $-4
565 MOV R29, 248(RSP) // special
567 ADD $TRAPFRAMESIZE, RSP, R1
571 MOV R0, 288(RSP) // type
572 MOV R1, 264(RSP) // sp
573 MOV R2, 272(RSP) // pc
574 MOV R3, 280(RSP) // psr
576 ADD $16, RSP, R0 // ureg
579 MSR $0x3, DAIFSet // interrupts off
581 MOV 272(RSP), R2 // pc
582 MOV 280(RSP), R3 // psr
587 MOV 248(RSP), R29 // special
591 TEXT vsys(SB), 1, $-4
592 SUB $TRAPFRAMESIZE, RSP
595 MOV R30, 256(RSP) // link
597 MOV R17, 152(RSP) // temp
599 MRS ESR_EL1, R0 // type
602 B _vsyspatch // branch to vsys0() patched in
604 TEXT vtrap(SB), 1, $-4
605 SUB $TRAPFRAMESIZE, RSP
634 MOV R30, 256(RSP) // link
636 MRS ESR_EL1, R0 // type
639 B _vtrappatch // branch to vtrapX() patched in
641 TEXT virq(SB), 1, $-4
642 SUB $TRAPFRAMESIZE, RSP
671 MOV R30, 256(RSP) // link
673 MOV $(1<<32), R0 // type irq
676 B _virqpatch // branch to vtrapX() patched in
678 TEXT vfiq(SB), 1, $-4
679 SUB $TRAPFRAMESIZE, RSP
708 MOV R30, 256(RSP) // link
709 MOV $(2<<32), R0 // type fiq
712 B _vfiqpatch // branch to vtrapX() patched in
714 TEXT vserr(SB), 1, $-4
715 SUB $TRAPFRAMESIZE, RSP
744 MOV R30, 256(RSP) // link
747 ORR $(3<<32), R0 // type
749 B _vserrpatch // branch to vtrapX() patched in