sys/src/9/bcm64/gisb.c

   1 #include "u.h"
   2 #include "../port/lib.h"
   3 #include "mem.h"
   4 #include "dat.h"
   5 #include "fns.h"
   6 #include "../port/error.h"
   7 #include "ureg.h"
   8
   9 /*
  10  * GISB arbiter registers
  11  */
  12 static u32int *regs = (u32int*)(VIRTIO2 + 0x400000);
  13
  14 enum {
  15         ArbMasterMask   = 0x004/4,
  16         ArbTimer        = 0x008/4,
  17                 TimerFreq       = 216000000,    // 216MHz
  18
  19         ArbErrCapClear  = 0x7e4/4,
  20         ArbErrCapAddrHi = 0x7e8/4,
  21         ArbErrCapAddr   = 0x7ec/4,
  22         ArbErrCapData   = 0x7f0/4,
  23         ArbErrCapStatus = 0x7f4/4,
  24                 CapStatusTimeout        = 1<<12,
  25                 CapStatusAbort          = 1<<11,
  26                 CapStatusStrobe         = 15<<2,
  27                 CapStatusWrite          = 1<<1,
  28                 CapStatusValid          = 1<<0,
  29         ArbErrCapMaster = 0x7f8/4,
  30
  31         ArbIntrSts      = 0x3000/4,
  32         ArbIntrSet      = 0x3004/4,
  33         ArbIntrClr      = 0x3008/4,
  34
  35         ArbCpuMaskSet   = 0x3010/4,
  36 };
  37
  38 static int
  39 arberror(Ureg*)
  40 {
  41         u32int status, intr;
  42         u32int master, data;
  43         uvlong addr;
  44
  45         status = regs[ArbErrCapStatus];
  46         if((status & CapStatusValid) == 0)
  47                 return 0;
  48         intr = regs[ArbIntrSts];
  49         master = regs[ArbErrCapMaster];
  50         addr = regs[ArbErrCapAddr];
  51         addr |= (uvlong)regs[ArbErrCapAddrHi]<<32;
  52         data = regs[ArbErrCapData];
  53         if(intr)
  54                 regs[ArbIntrClr] = intr;
  55         regs[ArbErrCapClear] = CapStatusValid;
  56
  57         iprint("cpu%d: GISB arbiter error: %s%s %s bus addr %llux data %.8ux, "
  58                 "master %.8ux, status %.8ux, intr %.8ux\n",
  59                 m->machno,
  60                 (status & CapStatusTimeout) ? "timeout" : "",
  61                 (status & CapStatusAbort) ? "abort" : "",
  62                 (status & CapStatusWrite) ? "writing" : "reading",
  63                 addr, data,
  64                 master, status, intr);
  65
  66         return 1;
  67 }
  68
  69 static void
  70 arbclock(void)
  71 {
  72         arberror(nil);
  73 }
  74
  75 void
  76 gisblink(void)
  77 {
  78         extern int (*buserror)(Ureg*);  // trap.c
  79
  80         regs[ArbErrCapClear] = CapStatusValid;
  81         regs[ArbIntrClr] = -1;
  82
  83         addclock0link(arbclock, 100);
  84
  85         buserror = arberror;
  86 }