4 * HZ should divide 1000 evenly, ideally.
5 * 100, 125, 200, 250 and 333 are okay.
7 #define HZ 100 /* clock frequency */
8 #define MS2HZ (1000/HZ) /* millisec per clock tick */
9 #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
15 typedef struct Conf Conf;
16 typedef struct Confmem Confmem;
17 typedef struct FPsave FPsave;
18 typedef struct PFPU PFPU;
19 typedef struct ISAConf ISAConf;
20 typedef struct Label Label;
21 typedef struct Lock Lock;
22 typedef struct Memcache Memcache;
23 typedef struct MMMU MMMU;
24 typedef struct Mach Mach;
25 typedef struct Page Page;
26 typedef struct PhysUart PhysUart;
27 typedef struct Pcidev Pcidev;
28 typedef struct PMMU PMMU;
29 typedef struct Proc Proc;
31 typedef struct Soc Soc;
32 typedef struct Uart Uart;
33 typedef struct Ureg Ureg;
37 #pragma incomplete Pcidev
38 #pragma incomplete Ureg
40 #define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */
43 * parameters for sysproc.c
45 #define AOUT_MAGIC (R_MAGIC)
84 /* bits or'd with the state */
99 ulong nmach; /* processors */
100 ulong nproc; /* processes */
101 Confmem mem[4]; /* physical memory */
102 ulong npage; /* total physical pages of memory */
103 usize upages; /* user page pool */
104 ulong copymode; /* 0 is copy on write, 1 is copy on reference */
105 ulong ialloc; /* max interrupt time allocation in bytes */
106 ulong pipeqsize; /* size in bytes of pipe queues */
107 ulong nimage; /* number of page cache image headers */
108 ulong nswap; /* number of swap pages */
109 int nswppo; /* max # of pageouts per segment pass */
110 ulong hz; /* processor cycle freq */
112 int monitor; /* flag */
120 PTE* mmutop; /* first level user page table */
126 #define NCOLOR 1 /* 1 level cache, don't worry about VCE's */
131 Page *mmufree; /* mmuhead[0] is freelist head */
132 Page *mmuhead[PTLEVELS];
134 Page *mmutail[PTLEVELS];
139 #include "../port/portdat.h"
143 int machno; /* physical id of processor */
144 uintptr splpc; /* pc of last caller to splhi */
146 Proc* proc; /* current process */
149 int flushmmu; /* flush current proc mmu state */
151 ulong ticks; /* of the clock since boot time */
152 Label sched; /* scheduler wakeup */
153 Lock alarmlock; /* access to alarm list */
154 void* alarm; /* alarms bound to this clock */
156 Proc* readied; /* for runproc */
157 ulong schedticks; /* next forced context switch */
170 uvlong fastclock; /* last sampled value */
171 uvlong inidle; /* time spent in idlehands() */
175 Perf perf; /* performance counters */
178 uvlong cpuhz; /* speed of cpu */
179 uvlong cyclefreq; /* Frequency of user readable cycle counter */
186 char machs[MAXMACH]; /* active CPUs */
187 int exiting; /* shutdown */
190 #define MACHP(n) ((Mach*)MACHADDR(n))
192 extern register Mach* m; /* R27 */
193 extern register Proc* up; /* R26 */
194 extern int normalprint;
197 * a parsed plan9.ini line
215 * Horrid. But the alternative is 'defined'.
218 #define DBGFLG (dbgflg[_DBGC_])
224 extern char dbgflg[256];
226 #define dbgprint print /* for now */
229 * hardware info about a device
238 ulong intnum; /* interrupt number */
239 char *type; /* card type, malloced */
240 int nports; /* Number of ports */
241 Devport *ports; /* The ports themselves */
244 struct Soc { /* SoC dependent configuration */