sys/src/9/bcm/io.h

   1 enum {
   2         IRQtimer0       = 0,
   3         IRQtimer1       = 1,
   4         IRQtimer2       = 2,
   5         IRQtimer3       = 3,
   6         IRQclock        = IRQtimer3,
   7         IRQusb          = 9,
   8         IRQdma0         = 16,
   9 #define IRQDMA(chan)    (IRQdma0+(chan))
  10         IRQaux          = 29,
  11         IRQi2c          = 53,
  12         IRQspi          = 54,
  13         IRQsdhost       = 56,
  14         IRQuart         = 57,
  15         IRQmmc          = 62,
  16
  17         IRQbasic        = 64,
  18         IRQtimerArm     = IRQbasic + 0,
  19
  20         IRQlocal        = 96,
  21         IRQcntps        = IRQlocal + 0,
  22         IRQcntpns       = IRQlocal + 1,
  23         IRQmbox0        = IRQlocal + 4,
  24         IRQmbox1        = IRQlocal + 5,
  25         IRQmbox2        = IRQlocal + 6,
  26         IRQmbox3        = IRQlocal + 7,
  27         IRQlocaltmr     = IRQlocal + 11,
  28
  29         IRQfiq          = IRQusb,       /* only one source can be FIQ */
  30
  31         DmaD2M          = 0,            /* device to memory */
  32         DmaM2D          = 1,            /* memory to device */
  33         DmaM2M          = 2,            /* memory to memory */
  34
  35         DmaChanEmmc     = 4,            /* can only use 2-5, maybe 0 */
  36         DmaChanSdhost   = 5,
  37         DmaChanSpiTx= 2,
  38         DmaChanSpiRx= 0,
  39
  40         DmaDevSpiTx     = 6,
  41         DmaDevSpiRx     = 7,
  42         DmaDevEmmc      = 11,
  43         DmaDevSdhost    = 13,
  44
  45         PowerSd         = 0,
  46         PowerUart0,
  47         PowerUart1,
  48         PowerUsb,
  49         PowerI2c0,
  50         PowerI2c1,
  51         PowerI2c2,
  52         PowerSpi,
  53         PowerCcp2tx,
  54
  55         ClkEmmc         = 1,
  56         ClkUart,
  57         ClkArm,
  58         ClkCore,
  59         ClkV3d,
  60         ClkH264,
  61         ClkIsp,
  62         ClkSdram,
  63         ClkPixel,
  64         ClkPwm,
  65
  66         /* bcm2711 */
  67         ClkEmmc2        = 12,
  68 };
  69
  70 #define BUSUNKNOWN (-1)