4 * HZ should divide 1000 evenly, ideally.
5 * 100, 125, 200, 250 and 333 are okay.
7 #define HZ 100 /* clock frequency */
8 #define MS2HZ (1000/HZ) /* millisec per clock tick */
9 #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
15 typedef struct Conf Conf;
16 typedef struct Confmem Confmem;
17 typedef struct FPsave FPsave;
18 typedef struct ISAConf ISAConf;
19 typedef struct Label Label;
20 typedef struct Lock Lock;
21 typedef struct Memcache Memcache;
22 typedef struct MMMU MMMU;
23 typedef struct Mach Mach;
24 typedef struct Notsave Notsave;
25 typedef struct Page Page;
26 typedef struct PhysUart PhysUart;
27 typedef struct PMMU PMMU;
28 typedef struct Proc Proc;
30 typedef struct Uart Uart;
31 typedef struct Ureg Ureg;
34 #pragma incomplete Ureg
36 #define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */
39 * parameters for sysproc.c
41 #define AOUT_MAGIC (E_MAGIC)
60 Maxfpregs = 32, /* could be 16 or 32, see Mach.fpnregs */
65 * emulated or vfp3 floating point
72 * vfp3 with ieee fp regs; uvlong is sufficient for hardware but
73 * each must be able to hold an Internal from fpi.h for sw emulation.
75 ulong regs[Maxfpregs][3];
78 uintptr pc; /* of failed fp instr. */
91 /* bits or'd with the state */
106 ulong nmach; /* processors */
107 ulong nproc; /* processes */
108 Confmem mem[1]; /* physical memory */
109 ulong npage; /* total physical pages of memory */
110 usize upages; /* user page pool */
111 ulong copymode; /* 0 is copy on write, 1 is copy on reference */
112 ulong ialloc; /* max interrupt time allocation in bytes */
113 ulong pipeqsize; /* size in bytes of pipe queues */
114 ulong nimage; /* number of page cache image headers */
115 ulong nswap; /* number of swap pages */
116 int nswppo; /* max # of pageouts per segment pass */
117 ulong hz; /* processor cycle freq */
119 int monitor; /* flag */
123 * things saved in the Proc structure during a notify
134 PTE* mmul1; /* l1 for this processor */
143 #define NCOLOR 1 /* 1 level cache, don't worry about VCE's */
147 Page* mmul2cache; /* free mmu pages */
150 #include "../port/portdat.h"
154 int machno; /* physical id of processor */
155 uintptr splpc; /* pc of last caller to splhi */
157 Proc* proc; /* current process */
160 int flushmmu; /* flush current proc mmu state */
162 ulong ticks; /* of the clock since boot time */
163 Label sched; /* scheduler wakeup */
164 Lock alarmlock; /* access to alarm list */
165 void* alarm; /* alarms bound to this clock */
167 Proc* readied; /* for runproc */
168 ulong schedticks; /* next forced context switch */
181 uvlong fastclock; /* last sampled value */
182 uvlong inidle; /* time spent in idlehands() */
186 Perf perf; /* performance counters */
190 uvlong cpuhz; /* speed of cpu */
191 uvlong cyclefreq; /* Frequency of user readable cycle counter */
193 /* vfp2 or vfp3 fpu */
199 ulong fpscr; /* sw copy */
200 int fppid; /* pid of last fault */
201 uintptr fppc; /* addr of last fault */
202 int fpcnt; /* how many consecutive at that addr */
204 /* save areas for exceptions, hold R0-R4 */
209 u32int smon[5]; /* probably not needed */
219 #define VA(k) ((uintptr)(k))
220 #define kmap(p) (KMap*)((p)->pa|kseg0)
226 int machs; /* bitmap of active CPUs */
227 int exiting; /* shutdown */
228 int ispanic; /* shutdown in response to a panic */
231 extern register Mach* m; /* R10 */
232 extern register Proc* up; /* R9 */
233 extern uintptr kseg0;
234 extern Mach* machaddr[MAXMACH];
235 extern ulong memsize;
236 extern int normalprint;
239 * a parsed plan9.ini line
256 #define MACHP(n) (machaddr[n])
259 * Horrid. But the alternative is 'defined'.
262 #define DBGFLG (dbgflg[_DBGC_])
268 extern char dbgflg[256];
270 #define dbgprint print /* for now */
273 * hardware info about a device
282 ulong intnum; /* interrupt number */
283 char *type; /* card type, malloced */
284 int nports; /* Number of ports */
285 Devport *ports; /* The ports themselves */