2 * armv6 machine assist, definitions
4 * loader uses R11 as scratch.
10 #define PADDR(va) (PHYSDRAM | ((va) & ~KSEGM))
12 #define L1X(va) (((((va))>>20) & 0x0fff)<<2)
14 #define PTEDRAM (Dom0|L1AP(Krw)|Section|Cached|Buffered)
22 MCR CpSC, 0, R0, C(CpCACHE), C(CpCACHEinvi), CpCACHEwait
26 MCR CpSC, 0, R0, C(CpCACHE), C(CpCACHEwb), CpCACHEwait
28 #define BARRIERS ISB; DSB
30 #define MCRR(coproc, op, rd, rn, crm) \
31 WORD $(0xec400000|(rn)<<16|(rd)<<12|(coproc)<<8|(op)<<4|(crm))
34 MOVW $0x7E200028,R2; \