sys/src/9/bcm/archbcm.c

   1 /*
   2  * bcm2835 (e.g. original raspberry pi) architecture-specific stuff
   3  */
   4
   5 #include "u.h"
   6 #include "../port/lib.h"
   7 #include "mem.h"
   8 #include "dat.h"
   9 #include "fns.h"
  10 #include "../port/error.h"
  11 #include "io.h"
  12 #include "arm.h"
  13
  14 #define POWERREGS       (VIRTIO+0x100000)
  15
  16 Soc soc = {
  17         .dramsize       = 512*MiB,
  18         .physio         = 0x20000000,
  19         .busdram        = 0x40000000,
  20         .busio          = 0x7E000000,
  21         .armlocal       = 0,
  22         .l1ptedramattrs = Cached | Buffered,
  23         .l2ptedramattrs = Cached | Buffered,
  24 };
  25
  26 enum {
  27         Wdogfreq        = 65536,
  28         Wdogtime        = 10,   /* seconds, ≤ 15 */
  29 };
  30
  31 /*
  32  * Power management / watchdog registers
  33  */
  34 enum {
  35         Rstc            = 0x1c>>2,
  36                 Password        = 0x5A<<24,
  37                 CfgMask         = 0x03<<4,
  38                 CfgReset        = 0x02<<4,
  39         Rsts            = 0x20>>2,
  40         Wdog            = 0x24>>2,
  41 };
  42
  43 void
  44 archreset(void)
  45 {
  46         fpon();
  47 }
  48
  49 void
  50 archreboot(void)
  51 {
  52         u32int *r;
  53
  54         r = (u32int*)POWERREGS;
  55         r[Wdog] = Password | 1;
  56         r[Rstc] = Password | (r[Rstc] & ~CfgMask) | CfgReset;
  57         coherence();
  58         for(;;)
  59                 ;
  60 }
  61
  62 void
  63 wdogfeed(void)
  64 {
  65         u32int *r;
  66
  67         r = (u32int*)POWERREGS;
  68         r[Wdog] = Password | (Wdogtime * Wdogfreq);
  69         r[Rstc] = Password | (r[Rstc] & ~CfgMask) | CfgReset;
  70 }
  71
  72 void
  73 wdogoff(void)
  74 {
  75         u32int *r;
  76
  77         r = (u32int*)POWERREGS;
  78         r[Rstc] = Password | (r[Rstc] & ~CfgMask);
  79 }
  80
  81 char *
  82 cputype2name(char *buf, int size)
  83 {
  84         seprint(buf, buf + size, "1176JZF-S");
  85         return buf;
  86 }
  87
  88 void
  89 cpuidprint(void)
  90 {
  91         char name[64];
  92
  93         cputype2name(name, sizeof name);
  94         delay(50);                              /* let uart catch up */
  95         print("cpu%d: %dMHz ARM %s\n", m->machno, m->cpumhz, name);
  96 }
  97
  98 int
  99 getncpus(void)
 100 {
 101         return 1;
 102 }
 103
 104 int
 105 startcpus(uint)
 106 {
 107         return 1;
 108 }
 109
 110 void
 111 archbcmlink(void)
 112 {
 113         addclock0link(wdogfeed, HZ);
 114 }
 115
 116 int
 117 l2ap(int ap)
 118 {
 119         return (AP(3, (ap))|AP(2, (ap))|AP(1, (ap))|AP(0, (ap)));
 120 }
 121
 122 int
 123 cmpswap(long *addr, long old, long new)
 124 {
 125         return cas32(addr, old, new);
 126 }
 127