sys/lib/acid/arm

   1 // ARM support
   2
   3 defn acidinit()                 // Called after all the init modules are loaded
   4 {
   5         bplist = {};
   6         bpfmt = 'X';
   7         wplist = {};
   8         wpflush();
   9
  10         srcpath = {
  11                 "./",
  12                 "/sys/src/libc/port/",
  13                 "/sys/src/libc/9sys/",
  14                 "/sys/src/libc/arm/"
  15         };
  16
  17         srcfiles = {};                  // list of loaded files
  18         srctext = {};                   // the text of the files
  19 }
  20
  21 defn linkreg(addr)
  22 {
  23         return *R14;
  24 }
  25
  26 defn stk()                              // trace
  27 {
  28         _stk(*PC, *SP, linkreg(0), 0);
  29 }
  30
  31 defn lstk()                             // trace with locals
  32 {
  33         _stk(*PC, *SP, linkreg(0), 1);
  34 }
  35
  36 defn gpr()                      // print general purpose registers
  37 {
  38         print("R0\t", *R0, " R1\t", *R1, " R2\t", *R2, "\n");
  39         print("R3\t", *R3, " R4\t", *R4, " R5\t", *R5, "\n");
  40         print("R6\t", *R6, " R7\t", *R7, " R8\t", *R8, "\n");
  41         print("R9\t", *R9, " R10\t", *R10, " R11\t", *R11, "\n");
  42         print("R12\t", *R12, " R13\t", *R13, " R14\t", *R14, "\n");
  43         print("R15\t", *R15, "\n");
  44 }
  45
  46 defn regs()                             // print all registers
  47 {
  48         gpr();
  49 }
  50
  51 defn pstop(pid)
  52 {
  53         local l;
  54         local pc;
  55
  56         pc = *PC;
  57
  58         print(pid,": ", reason(*TYPE), "\t");
  59         print(fmt(pc, 'a'), "\t", fmt(pc, 'i'), "\n");
  60
  61         if notes then {
  62                 if notes[0] != "sys: breakpoint" then {
  63                         print("Notes pending:\n");
  64                         l = notes;
  65                         while l do {
  66                                 print("\t", head l, "\n");
  67                                 l = tail l;
  68                         }
  69                 }
  70         }
  71 }
  72
  73 aggr Ureg
  74 {
  75         'U' 0 r0;
  76         'U' 4 r1;
  77         'U' 8 r2;
  78         'U' 12 r3;
  79         'U' 16 r4;
  80         'U' 20 r5;
  81         'U' 24 r6;
  82         'U' 28 r7;
  83         'U' 32 r8;
  84         'U' 36 r9;
  85         'U' 40 r10;
  86         'U' 44 r11;
  87         'U' 48 r12;
  88         'U' 52 r13;
  89         'U' 56 r14;
  90         'U' 60 type;
  91         'U' 64 psr;
  92         'U' 68 pc;
  93 };
  94
  95 defn
  96 Ureg(addr) {
  97         complex Ureg addr;
  98         print(" r0      ", addr.r0, "\n");
  99         print(" r1      ", addr.r1, "\n");
 100         print(" r2      ", addr.r2, "\n");
 101         print(" r3      ", addr.r3, "\n");
 102         print(" r4      ", addr.r4, "\n");
 103         print(" r5      ", addr.r5, "\n");
 104         print(" r6      ", addr.r6, "\n");
 105         print(" r7      ", addr.r7, "\n");
 106         print(" r8      ", addr.r8, "\n");
 107         print(" r9      ", addr.r9, "\n");
 108         print(" r10     ", addr.r10, "\n");
 109         print(" r11     ", addr.r11, "\n");
 110         print(" r12     ", addr.r12, "\n");
 111         print(" r13     ", addr.r13, "\n");
 112         print(" r14     ", addr.r14, "\n");
 113         print(" type    ", addr.type, "\n");
 114         print(" psr     ", addr.psr, "\n");
 115         print(" pc      ", addr.pc, "\n");
 116 };
 117
 118 print("/sys/lib/acid/arm");