Merge commit '40dd3e2b7089b5e96714e064b731f6dbf17c61a9' into sync_cg_clif-2021-05-27

[rust.git] / src / test / mir-opt / const_prop / slice_len.rs

// EMIT_MIR_FOR_EACH_BIT_WIDTH

// EMIT_MIR slice_len.main.ConstProp.diff
fn main() {
    (&[1u32, 2, 3] as &[u32])[1];
}