src/test/incremental/issue-72386.rs

   1 // revisions: rpass1 cfail1 rpass3
   2 // only-x86_64
   3 // Regression test for issue #72386
   4 // Checks that we don't ICE when switching to an invalid register
   5 // and back again
   6
   7 #![feature(asm)]
   8
   9 #[cfg(any(rpass1, rpass3))]
  10 fn main() {
  11     unsafe {
  12         asm!("nop")
  13     }
  14 }
  15
  16 #[cfg(cfail1)]
  17 fn main() {
  18     unsafe {
  19         asm!("nop",out("invalid_reg")_)
  20         //[cfail1]~^ ERROR invalid register
  21     }
  22 }