src/test/incremental/hashes/inline_asm.rs

   1 // This test case tests the incremental compilation hash (ICH) implementation
   2 // for inline asm.
   3
   4 // The general pattern followed here is: Change one thing between rev1 and rev2
   5 // and make sure that the hash has changed, then change nothing between rev2 and
   6 // rev3 and make sure that the hash has not changed.
   7
   8 // build-pass (FIXME(62277): could be check-pass?)
   9 // revisions: cfail1 cfail2 cfail3 cfail4 cfail5 cfail6
  10 // compile-flags: -Z query-dep-graph -O
  11 // needs-asm-support
  12 // [cfail1]compile-flags: -Zincremental-ignore-spans
  13 // [cfail2]compile-flags: -Zincremental-ignore-spans
  14 // [cfail3]compile-flags: -Zincremental-ignore-spans
  15 // [cfail4]compile-flags: -Zincremental-relative-spans
  16 // [cfail5]compile-flags: -Zincremental-relative-spans
  17 // [cfail6]compile-flags: -Zincremental-relative-spans
  18
  19 #![allow(warnings)]
  20 #![feature(rustc_attrs)]
  21 #![crate_type="rlib"]
  22
  23 use std::arch::asm;
  24
  25 // Change template
  26 #[cfg(any(cfail1,cfail4))]
  27 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
  28 pub fn change_template(_a: i32) -> i32 {
  29     let c: i32;
  30     unsafe {
  31         asm!("mov {0}, 1",
  32              out(reg) c
  33              );
  34     }
  35     c
  36 }
  37
  38 #[cfg(not(any(cfail1,cfail4)))]
  39 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
  40 #[rustc_clean(cfg="cfail3")]
  41 #[rustc_clean(cfg="cfail5", except="hir_owner_nodes, optimized_mir")]
  42 #[rustc_clean(cfg="cfail6")]
  43 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
  44 pub fn change_template(_a: i32) -> i32 {
  45     let c: i32;
  46     unsafe {
  47         asm!("mov {0}, 2",
  48              out(reg) c
  49              );
  50     }
  51     c
  52 }
  53
  54
  55
  56 // Change output
  57 #[cfg(any(cfail1,cfail4))]
  58 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
  59 pub fn change_output(a: i32) -> i32 {
  60     let mut _out1: i32 = 0;
  61     let mut _out2: i32 = 0;
  62     unsafe {
  63         asm!("mov {0}, {1}",
  64              out(reg) _out1,
  65              in(reg) a
  66              );
  67     }
  68     _out1
  69 }
  70
  71 #[cfg(not(any(cfail1,cfail4)))]
  72 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
  73 #[rustc_clean(cfg="cfail3")]
  74 #[rustc_clean(cfg="cfail5", except="hir_owner_nodes, optimized_mir")]
  75 #[rustc_clean(cfg="cfail6")]
  76 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
  77 pub fn change_output(a: i32) -> i32 {
  78     let mut _out1: i32 = 0;
  79     let mut _out2: i32 = 0;
  80     unsafe {
  81         asm!("mov {0}, {1}",
  82              out(reg) _out2,
  83              in(reg) a
  84              );
  85     }
  86     _out1
  87 }
  88
  89
  90
  91 // Change input
  92 #[cfg(any(cfail1,cfail4))]
  93 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
  94 pub fn change_input(_a: i32, _b: i32) -> i32 {
  95     let _out;
  96     unsafe {
  97         asm!("mov {0}, {1}",
  98              out(reg) _out,
  99              in(reg) _a
 100              );
 101     }
 102     _out
 103 }
 104
 105 #[cfg(not(any(cfail1,cfail4)))]
 106 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
 107 #[rustc_clean(cfg="cfail3")]
 108 #[rustc_clean(cfg="cfail5", except="hir_owner_nodes, optimized_mir")]
 109 #[rustc_clean(cfg="cfail6")]
 110 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 111 pub fn change_input(_a: i32, _b: i32) -> i32 {
 112     let _out;
 113     unsafe {
 114         asm!("mov {0}, {1}",
 115              out(reg) _out,
 116              in(reg) _b
 117              );
 118     }
 119     _out
 120 }
 121
 122
 123
 124 // Change input constraint
 125 #[cfg(any(cfail1,cfail4))]
 126 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 127 pub fn change_input_constraint(_a: i32, _b: i32) -> i32 {
 128     let _out;
 129     unsafe {
 130         asm!("mov {0}, {1}",
 131              out(reg) _out,
 132              in(reg) _a,
 133              in("eax") _b);
 134     }
 135     _out
 136 }
 137
 138 #[cfg(not(any(cfail1,cfail4)))]
 139 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
 140 #[rustc_clean(cfg="cfail3")]
 141 #[rustc_clean(cfg="cfail5", except="hir_owner_nodes, optimized_mir")]
 142 #[rustc_clean(cfg="cfail6")]
 143 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 144 pub fn change_input_constraint(_a: i32, _b: i32) -> i32 {
 145     let _out;
 146     unsafe {
 147         asm!("mov {0}, {1}",
 148              out(reg) _out,
 149              in(reg) _a,
 150              in("ecx") _b);
 151     }
 152     _out
 153 }
 154
 155
 156 // Change clobber
 157 #[cfg(any(cfail1,cfail4))]
 158 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 159 pub fn change_clobber(_a: i32) -> i32 {
 160     let _out;
 161     unsafe {
 162         asm!("mov {0}, {1}",
 163              out(reg) _out,
 164              in(reg) _a,
 165              lateout("ecx") _
 166              );
 167     }
 168     _out
 169 }
 170
 171 #[cfg(not(any(cfail1,cfail4)))]
 172 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
 173 #[rustc_clean(cfg="cfail3")]
 174 #[rustc_clean(cfg="cfail5", except="hir_owner_nodes, optimized_mir")]
 175 #[rustc_clean(cfg="cfail6")]
 176 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 177 pub fn change_clobber(_a: i32) -> i32 {
 178     let _out;
 179     unsafe {
 180         asm!("mov {0}, {1}",
 181              out(reg) _out,
 182              in(reg) _a,
 183              lateout("edx") _
 184              );
 185     }
 186     _out
 187 }
 188
 189
 190
 191 // Change options
 192 #[cfg(any(cfail1,cfail4))]
 193 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 194 pub fn change_options(_a: i32) -> i32 {
 195     let _out;
 196     unsafe {
 197         asm!("mov {0}, {1}",
 198              out(reg) _out,
 199              in(reg) _a,
 200              options(readonly),
 201              );
 202     }
 203     _out
 204 }
 205
 206 #[cfg(not(any(cfail1,cfail4)))]
 207 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
 208 #[rustc_clean(cfg="cfail3")]
 209 #[rustc_clean(cfg="cfail5", except="hir_owner_nodes, optimized_mir")]
 210 #[rustc_clean(cfg="cfail6")]
 211 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 212 pub fn change_options(_a: i32) -> i32 {
 213     let _out;
 214     unsafe {
 215         asm!("mov {0}, {1}",
 216              out(reg) _out,
 217              in(reg) _a,
 218              options(nomem   ),
 219              );
 220     }
 221     _out
 222 }