1 // This test case tests the incremental compilation hash (ICH) implementation
4 // The general pattern followed here is: Change one thing between rev1 and rev2
5 // and make sure that the hash has changed, then change nothing between rev2 and
6 // rev3 and make sure that the hash has not changed.
8 // build-pass (FIXME(62277): could be check-pass?)
9 // revisions: cfail1 cfail2 cfail3
10 // compile-flags: -Z query-dep-graph -Zincremental-ignore-spans
13 #![feature(rustc_attrs)]
21 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
22 pub fn change_template(a: i32) -> i32 {
36 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
37 #[rustc_clean(cfg="cfail3")]
38 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
39 pub fn change_template(a: i32) -> i32 {
56 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
57 pub fn change_output(a: i32) -> i32 {
58 let mut _out1: i32 = 0;
59 let mut _out2: i32 = 0;
72 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
73 #[rustc_clean(cfg="cfail3")]
74 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
75 pub fn change_output(a: i32) -> i32 {
76 let mut _out1: i32 = 0;
77 let mut _out2: i32 = 0;
93 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
94 pub fn change_input(_a: i32, _b: i32) -> i32 {
108 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
109 #[rustc_clean(cfg="cfail3")]
110 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
111 pub fn change_input(_a: i32, _b: i32) -> i32 {
114 llvm_asm!("add 1, $0"
126 // Change input constraint
128 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
129 pub fn change_input_constraint(_a: i32, _b: i32) -> i32 {
132 llvm_asm!("add 1, $0"
143 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
144 #[rustc_clean(cfg="cfail3")]
145 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
146 pub fn change_input_constraint(_a: i32, _b: i32) -> i32 {
149 llvm_asm!("add 1, $0"
163 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
164 pub fn change_clobber(_a: i32) -> i32 {
167 llvm_asm!("add 1, $0"
178 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
179 #[rustc_clean(cfg="cfail3")]
180 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
181 pub fn change_clobber(_a: i32) -> i32 {
184 llvm_asm!("add 1, $0"
198 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
199 pub fn change_options(_a: i32) -> i32 {
202 llvm_asm!("add 1, $0"
213 #[rustc_clean(cfg="cfail2", except="hir_owner_nodes, optimized_mir")]
214 #[rustc_clean(cfg="cfail3")]
215 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
216 pub fn change_options(_a: i32) -> i32 {
219 llvm_asm!("add 1, $0"