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[rust.git] / src / librustc_platform_intrinsics / nvptx.rs
1 // Copyright 2015 The Rust Project Developers. See the COPYRIGHT
2 // file at the top-level directory of this distribution and at
3 // http://rust-lang.org/COPYRIGHT.
4 //
5 // Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
6 // http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
7 // <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
8 // option. This file may not be copied, modified, or distributed
9 // except according to those terms.
10
11 // DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
12 // ignore-tidy-linelength
13
14 #![allow(unused_imports)]
15
16 use {Intrinsic, Type};
17 use IntrinsicDef::Named;
18
19 pub fn find(name: &str) -> Option<Intrinsic> {
20     if !name.starts_with("nvptx") { return None }
21     Some(match &name["nvptx".len()..] {
22         "_syncthreads" => Intrinsic {
23             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
24             output: &::VOID,
25             definition: Named("llvm.cuda.syncthreads")
26         },
27         "_block_dim_x" => Intrinsic {
28             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
29             output: &::I32,
30             definition: Named("llvm.nvvm.read.ptx.sreg.ntid.x")
31         },
32         "_block_dim_y" => Intrinsic {
33             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
34             output: &::I32,
35             definition: Named("llvm.nvvm.read.ptx.sreg.ntid.y")
36         },
37         "_block_dim_z" => Intrinsic {
38             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
39             output: &::I32,
40             definition: Named("llvm.nvvm.read.ptx.sreg.ntid.z")
41         },
42         "_block_idx_x" => Intrinsic {
43             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
44             output: &::I32,
45             definition: Named("llvm.nvvm.read.ptx.sreg.ctaid.x")
46         },
47         "_block_idx_y" => Intrinsic {
48             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
49             output: &::I32,
50             definition: Named("llvm.nvvm.read.ptx.sreg.ctaid.y")
51         },
52         "_block_idx_z" => Intrinsic {
53             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
54             output: &::I32,
55             definition: Named("llvm.nvvm.read.ptx.sreg.ctaid.z")
56         },
57         "_grid_dim_x" => Intrinsic {
58             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
59             output: &::I32,
60             definition: Named("llvm.nvvm.read.ptx.sreg.nctaid.x")
61         },
62         "_grid_dim_y" => Intrinsic {
63             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
64             output: &::I32,
65             definition: Named("llvm.nvvm.read.ptx.sreg.nctaid.y")
66         },
67         "_grid_dim_z" => Intrinsic {
68             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
69             output: &::I32,
70             definition: Named("llvm.nvvm.read.ptx.sreg.nctaid.z")
71         },
72         "_thread_idx_x" => Intrinsic {
73             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
74             output: &::I32,
75             definition: Named("llvm.nvvm.read.ptx.sreg.tid.x")
76         },
77         "_thread_idx_y" => Intrinsic {
78             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
79             output: &::I32,
80             definition: Named("llvm.nvvm.read.ptx.sreg.tid.y")
81         },
82         "_thread_idx_z" => Intrinsic {
83             inputs: { static INPUTS: [&'static Type; 0] = []; &INPUTS },
84             output: &::I32,
85             definition: Named("llvm.nvvm.read.ptx.sreg.tid.z")
86         },
87         _ => return None,
88     })
89 }