src/librustc_platform_intrinsics/aarch64.rs

   1 // Copyright 2015 The Rust Project Developers. See the COPYRIGHT
   2 // file at the top-level directory of this distribution and at
   3 // http://rust-lang.org/COPYRIGHT.
   4 //
   5 // Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
   6 // http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
   7 // <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
   8 // option. This file may not be copied, modified, or distributed
   9 // except according to those terms.
  10
  11 // DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
  12 // ignore-tidy-linelength
  13
  14 #![allow(unused_imports)]
  15
  16 use {Intrinsic, i, i_, u, u_, f, v, v_, agg, p, void};
  17 use IntrinsicDef::Named;
  18 use rustc::middle::ty;
  19
  20 // The default inlining settings trigger a pathological behaviour in
  21 // LLVM, which causes makes compilation very slow. See #28273.
  22 #[inline(never)]
  23 pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
  24     if !name.starts_with("aarch64_v") { return None }
  25     Some(match &name["aarch64_v".len()..] {
  26         "hadd_s8" => Intrinsic {
  27             inputs: vec![v(i(8), 8), v(i(8), 8)],
  28             output: v(i(8), 8),
  29             definition: Named("llvm.aarch64.neon.shadd.v8i8")
  30         },
  31         "hadd_u8" => Intrinsic {
  32             inputs: vec![v(u(8), 8), v(u(8), 8)],
  33             output: v(u(8), 8),
  34             definition: Named("llvm.aarch64.neon.uhadd.v8i8")
  35         },
  36         "hadd_s16" => Intrinsic {
  37             inputs: vec![v(i(16), 4), v(i(16), 4)],
  38             output: v(i(16), 4),
  39             definition: Named("llvm.aarch64.neon.shadd.v4i16")
  40         },
  41         "hadd_u16" => Intrinsic {
  42             inputs: vec![v(u(16), 4), v(u(16), 4)],
  43             output: v(u(16), 4),
  44             definition: Named("llvm.aarch64.neon.uhadd.v4i16")
  45         },
  46         "hadd_s32" => Intrinsic {
  47             inputs: vec![v(i(32), 2), v(i(32), 2)],
  48             output: v(i(32), 2),
  49             definition: Named("llvm.aarch64.neon.shadd.v2i32")
  50         },
  51         "hadd_u32" => Intrinsic {
  52             inputs: vec![v(u(32), 2), v(u(32), 2)],
  53             output: v(u(32), 2),
  54             definition: Named("llvm.aarch64.neon.uhadd.v2i32")
  55         },
  56         "haddq_s8" => Intrinsic {
  57             inputs: vec![v(i(8), 16), v(i(8), 16)],
  58             output: v(i(8), 16),
  59             definition: Named("llvm.aarch64.neon.shadd.v16i8")
  60         },
  61         "haddq_u8" => Intrinsic {
  62             inputs: vec![v(u(8), 16), v(u(8), 16)],
  63             output: v(u(8), 16),
  64             definition: Named("llvm.aarch64.neon.uhadd.v16i8")
  65         },
  66         "haddq_s16" => Intrinsic {
  67             inputs: vec![v(i(16), 8), v(i(16), 8)],
  68             output: v(i(16), 8),
  69             definition: Named("llvm.aarch64.neon.shadd.v8i16")
  70         },
  71         "haddq_u16" => Intrinsic {
  72             inputs: vec![v(u(16), 8), v(u(16), 8)],
  73             output: v(u(16), 8),
  74             definition: Named("llvm.aarch64.neon.uhadd.v8i16")
  75         },
  76         "haddq_s32" => Intrinsic {
  77             inputs: vec![v(i(32), 4), v(i(32), 4)],
  78             output: v(i(32), 4),
  79             definition: Named("llvm.aarch64.neon.shadd.v4i32")
  80         },
  81         "haddq_u32" => Intrinsic {
  82             inputs: vec![v(u(32), 4), v(u(32), 4)],
  83             output: v(u(32), 4),
  84             definition: Named("llvm.aarch64.neon.uhadd.v4i32")
  85         },
  86         "rhadd_s8" => Intrinsic {
  87             inputs: vec![v(i(8), 8), v(i(8), 8)],
  88             output: v(i(8), 8),
  89             definition: Named("llvm.aarch64.neon.srhadd.v8i8")
  90         },
  91         "rhadd_u8" => Intrinsic {
  92             inputs: vec![v(u(8), 8), v(u(8), 8)],
  93             output: v(u(8), 8),
  94             definition: Named("llvm.aarch64.neon.urhadd.v8i8")
  95         },
  96         "rhadd_s16" => Intrinsic {
  97             inputs: vec![v(i(16), 4), v(i(16), 4)],
  98             output: v(i(16), 4),
  99             definition: Named("llvm.aarch64.neon.srhadd.v4i16")
 100         },
 101         "rhadd_u16" => Intrinsic {
 102             inputs: vec![v(u(16), 4), v(u(16), 4)],
 103             output: v(u(16), 4),
 104             definition: Named("llvm.aarch64.neon.urhadd.v4i16")
 105         },
 106         "rhadd_s32" => Intrinsic {
 107             inputs: vec![v(i(32), 2), v(i(32), 2)],
 108             output: v(i(32), 2),
 109             definition: Named("llvm.aarch64.neon.srhadd.v2i32")
 110         },
 111         "rhadd_u32" => Intrinsic {
 112             inputs: vec![v(u(32), 2), v(u(32), 2)],
 113             output: v(u(32), 2),
 114             definition: Named("llvm.aarch64.neon.urhadd.v2i32")
 115         },
 116         "rhaddq_s8" => Intrinsic {
 117             inputs: vec![v(i(8), 16), v(i(8), 16)],
 118             output: v(i(8), 16),
 119             definition: Named("llvm.aarch64.neon.srhadd.v16i8")
 120         },
 121         "rhaddq_u8" => Intrinsic {
 122             inputs: vec![v(u(8), 16), v(u(8), 16)],
 123             output: v(u(8), 16),
 124             definition: Named("llvm.aarch64.neon.urhadd.v16i8")
 125         },
 126         "rhaddq_s16" => Intrinsic {
 127             inputs: vec![v(i(16), 8), v(i(16), 8)],
 128             output: v(i(16), 8),
 129             definition: Named("llvm.aarch64.neon.srhadd.v8i16")
 130         },
 131         "rhaddq_u16" => Intrinsic {
 132             inputs: vec![v(u(16), 8), v(u(16), 8)],
 133             output: v(u(16), 8),
 134             definition: Named("llvm.aarch64.neon.urhadd.v8i16")
 135         },
 136         "rhaddq_s32" => Intrinsic {
 137             inputs: vec![v(i(32), 4), v(i(32), 4)],
 138             output: v(i(32), 4),
 139             definition: Named("llvm.aarch64.neon.srhadd.v4i32")
 140         },
 141         "rhaddq_u32" => Intrinsic {
 142             inputs: vec![v(u(32), 4), v(u(32), 4)],
 143             output: v(u(32), 4),
 144             definition: Named("llvm.aarch64.neon.urhadd.v4i32")
 145         },
 146         "qadd_s8" => Intrinsic {
 147             inputs: vec![v(i(8), 8), v(i(8), 8)],
 148             output: v(i(8), 8),
 149             definition: Named("llvm.aarch64.neon.sqadd.v8i8")
 150         },
 151         "qadd_u8" => Intrinsic {
 152             inputs: vec![v(u(8), 8), v(u(8), 8)],
 153             output: v(u(8), 8),
 154             definition: Named("llvm.aarch64.neon.uqadd.v8i8")
 155         },
 156         "qadd_s16" => Intrinsic {
 157             inputs: vec![v(i(16), 4), v(i(16), 4)],
 158             output: v(i(16), 4),
 159             definition: Named("llvm.aarch64.neon.sqadd.v4i16")
 160         },
 161         "qadd_u16" => Intrinsic {
 162             inputs: vec![v(u(16), 4), v(u(16), 4)],
 163             output: v(u(16), 4),
 164             definition: Named("llvm.aarch64.neon.uqadd.v4i16")
 165         },
 166         "qadd_s32" => Intrinsic {
 167             inputs: vec![v(i(32), 2), v(i(32), 2)],
 168             output: v(i(32), 2),
 169             definition: Named("llvm.aarch64.neon.sqadd.v2i32")
 170         },
 171         "qadd_u32" => Intrinsic {
 172             inputs: vec![v(u(32), 2), v(u(32), 2)],
 173             output: v(u(32), 2),
 174             definition: Named("llvm.aarch64.neon.uqadd.v2i32")
 175         },
 176         "qadd_s64" => Intrinsic {
 177             inputs: vec![v(i(64), 1), v(i(64), 1)],
 178             output: v(i(64), 1),
 179             definition: Named("llvm.aarch64.neon.sqadd.v1i64")
 180         },
 181         "qadd_u64" => Intrinsic {
 182             inputs: vec![v(u(64), 1), v(u(64), 1)],
 183             output: v(u(64), 1),
 184             definition: Named("llvm.aarch64.neon.uqadd.v1i64")
 185         },
 186         "qaddq_s8" => Intrinsic {
 187             inputs: vec![v(i(8), 16), v(i(8), 16)],
 188             output: v(i(8), 16),
 189             definition: Named("llvm.aarch64.neon.sqadd.v16i8")
 190         },
 191         "qaddq_u8" => Intrinsic {
 192             inputs: vec![v(u(8), 16), v(u(8), 16)],
 193             output: v(u(8), 16),
 194             definition: Named("llvm.aarch64.neon.uqadd.v16i8")
 195         },
 196         "qaddq_s16" => Intrinsic {
 197             inputs: vec![v(i(16), 8), v(i(16), 8)],
 198             output: v(i(16), 8),
 199             definition: Named("llvm.aarch64.neon.sqadd.v8i16")
 200         },
 201         "qaddq_u16" => Intrinsic {
 202             inputs: vec![v(u(16), 8), v(u(16), 8)],
 203             output: v(u(16), 8),
 204             definition: Named("llvm.aarch64.neon.uqadd.v8i16")
 205         },
 206         "qaddq_s32" => Intrinsic {
 207             inputs: vec![v(i(32), 4), v(i(32), 4)],
 208             output: v(i(32), 4),
 209             definition: Named("llvm.aarch64.neon.sqadd.v4i32")
 210         },
 211         "qaddq_u32" => Intrinsic {
 212             inputs: vec![v(u(32), 4), v(u(32), 4)],
 213             output: v(u(32), 4),
 214             definition: Named("llvm.aarch64.neon.uqadd.v4i32")
 215         },
 216         "qaddq_s64" => Intrinsic {
 217             inputs: vec![v(i(64), 2), v(i(64), 2)],
 218             output: v(i(64), 2),
 219             definition: Named("llvm.aarch64.neon.sqadd.v2i64")
 220         },
 221         "qaddq_u64" => Intrinsic {
 222             inputs: vec![v(u(64), 2), v(u(64), 2)],
 223             output: v(u(64), 2),
 224             definition: Named("llvm.aarch64.neon.uqadd.v2i64")
 225         },
 226         "uqadd_s8" => Intrinsic {
 227             inputs: vec![v(i(8), 16), v(u(8), 16)],
 228             output: v(i(8), 16),
 229             definition: Named("llvm.aarch64.neon.suqadd.v16i8")
 230         },
 231         "uqadd_s16" => Intrinsic {
 232             inputs: vec![v(i(16), 8), v(u(16), 8)],
 233             output: v(i(16), 8),
 234             definition: Named("llvm.aarch64.neon.suqadd.v8i16")
 235         },
 236         "uqadd_s32" => Intrinsic {
 237             inputs: vec![v(i(32), 4), v(u(32), 4)],
 238             output: v(i(32), 4),
 239             definition: Named("llvm.aarch64.neon.suqadd.v4i32")
 240         },
 241         "uqadd_s64" => Intrinsic {
 242             inputs: vec![v(i(64), 2), v(u(64), 2)],
 243             output: v(i(64), 2),
 244             definition: Named("llvm.aarch64.neon.suqadd.v2i64")
 245         },
 246         "sqadd_u8" => Intrinsic {
 247             inputs: vec![v(u(8), 16), v(i(8), 16)],
 248             output: v(u(8), 16),
 249             definition: Named("llvm.aarch64.neon.usqadd.v16i8")
 250         },
 251         "sqadd_u16" => Intrinsic {
 252             inputs: vec![v(u(16), 8), v(i(16), 8)],
 253             output: v(u(16), 8),
 254             definition: Named("llvm.aarch64.neon.usqadd.v8i16")
 255         },
 256         "sqadd_u32" => Intrinsic {
 257             inputs: vec![v(u(32), 4), v(i(32), 4)],
 258             output: v(u(32), 4),
 259             definition: Named("llvm.aarch64.neon.usqadd.v4i32")
 260         },
 261         "sqadd_u64" => Intrinsic {
 262             inputs: vec![v(u(64), 2), v(i(64), 2)],
 263             output: v(u(64), 2),
 264             definition: Named("llvm.aarch64.neon.usqadd.v2i64")
 265         },
 266         "raddhn_s16" => Intrinsic {
 267             inputs: vec![v(i(16), 8), v(i(16), 8)],
 268             output: v(i(8), 8),
 269             definition: Named("llvm.aarch64.neon.raddhn.v8i8")
 270         },
 271         "raddhn_u16" => Intrinsic {
 272             inputs: vec![v(u(16), 8), v(u(16), 8)],
 273             output: v(u(8), 8),
 274             definition: Named("llvm.aarch64.neon.raddhn.v8i8")
 275         },
 276         "raddhn_s32" => Intrinsic {
 277             inputs: vec![v(i(32), 4), v(i(32), 4)],
 278             output: v(i(16), 4),
 279             definition: Named("llvm.aarch64.neon.raddhn.v4i16")
 280         },
 281         "raddhn_u32" => Intrinsic {
 282             inputs: vec![v(u(32), 4), v(u(32), 4)],
 283             output: v(u(16), 4),
 284             definition: Named("llvm.aarch64.neon.raddhn.v4i16")
 285         },
 286         "raddhn_s64" => Intrinsic {
 287             inputs: vec![v(i(64), 2), v(i(64), 2)],
 288             output: v(i(32), 2),
 289             definition: Named("llvm.aarch64.neon.raddhn.v2i32")
 290         },
 291         "raddhn_u64" => Intrinsic {
 292             inputs: vec![v(u(64), 2), v(u(64), 2)],
 293             output: v(u(32), 2),
 294             definition: Named("llvm.aarch64.neon.raddhn.v2i32")
 295         },
 296         "fmulx_f32" => Intrinsic {
 297             inputs: vec![v(f(32), 2), v(f(32), 2)],
 298             output: v(f(32), 2),
 299             definition: Named("llvm.aarch64.neon.fmulx.v2f32")
 300         },
 301         "fmulx_f64" => Intrinsic {
 302             inputs: vec![v(f(64), 1), v(f(64), 1)],
 303             output: v(f(64), 1),
 304             definition: Named("llvm.aarch64.neon.fmulx.v1f64")
 305         },
 306         "fmulxq_f32" => Intrinsic {
 307             inputs: vec![v(f(32), 4), v(f(32), 4)],
 308             output: v(f(32), 4),
 309             definition: Named("llvm.aarch64.neon.fmulx.v4f32")
 310         },
 311         "fmulxq_f64" => Intrinsic {
 312             inputs: vec![v(f(64), 2), v(f(64), 2)],
 313             output: v(f(64), 2),
 314             definition: Named("llvm.aarch64.neon.fmulx.v2f64")
 315         },
 316         "fma_f32" => Intrinsic {
 317             inputs: vec![v(f(32), 2), v(f(32), 2)],
 318             output: v(f(32), 2),
 319             definition: Named("llvm.fma.v2f32")
 320         },
 321         "fma_f64" => Intrinsic {
 322             inputs: vec![v(f(64), 1), v(f(64), 1)],
 323             output: v(f(64), 1),
 324             definition: Named("llvm.fma.v1f64")
 325         },
 326         "fmaq_f32" => Intrinsic {
 327             inputs: vec![v(f(32), 4), v(f(32), 4)],
 328             output: v(f(32), 4),
 329             definition: Named("llvm.fma.v4f32")
 330         },
 331         "fmaq_f64" => Intrinsic {
 332             inputs: vec![v(f(64), 2), v(f(64), 2)],
 333             output: v(f(64), 2),
 334             definition: Named("llvm.fma.v2f64")
 335         },
 336         "qdmulh_s16" => Intrinsic {
 337             inputs: vec![v(i(16), 4), v(i(16), 4)],
 338             output: v(i(16), 4),
 339             definition: Named("llvm.aarch64.neon.sqdmulh.v4i16")
 340         },
 341         "qdmulh_s32" => Intrinsic {
 342             inputs: vec![v(i(32), 2), v(i(32), 2)],
 343             output: v(i(32), 2),
 344             definition: Named("llvm.aarch64.neon.sqdmulh.v2i32")
 345         },
 346         "qdmulhq_s16" => Intrinsic {
 347             inputs: vec![v(i(16), 8), v(i(16), 8)],
 348             output: v(i(16), 8),
 349             definition: Named("llvm.aarch64.neon.sqdmulh.v8i16")
 350         },
 351         "qdmulhq_s32" => Intrinsic {
 352             inputs: vec![v(i(32), 4), v(i(32), 4)],
 353             output: v(i(32), 4),
 354             definition: Named("llvm.aarch64.neon.sqdmulh.v4i32")
 355         },
 356         "qrdmulh_s16" => Intrinsic {
 357             inputs: vec![v(i(16), 4), v(i(16), 4)],
 358             output: v(i(16), 4),
 359             definition: Named("llvm.aarch64.neon.sqrdmulh.v4i16")
 360         },
 361         "qrdmulh_s32" => Intrinsic {
 362             inputs: vec![v(i(32), 2), v(i(32), 2)],
 363             output: v(i(32), 2),
 364             definition: Named("llvm.aarch64.neon.sqrdmulh.v2i32")
 365         },
 366         "qrdmulhq_s16" => Intrinsic {
 367             inputs: vec![v(i(16), 8), v(i(16), 8)],
 368             output: v(i(16), 8),
 369             definition: Named("llvm.aarch64.neon.sqrdmulh.v8i16")
 370         },
 371         "qrdmulhq_s32" => Intrinsic {
 372             inputs: vec![v(i(32), 4), v(i(32), 4)],
 373             output: v(i(32), 4),
 374             definition: Named("llvm.aarch64.neon.sqrdmulh.v4i32")
 375         },
 376         "mull_s8" => Intrinsic {
 377             inputs: vec![v(i(8), 8), v(i(8), 8)],
 378             output: v(i(16), 8),
 379             definition: Named("llvm.aarch64.neon.smull.v8i16")
 380         },
 381         "mull_u8" => Intrinsic {
 382             inputs: vec![v(u(8), 8), v(u(8), 8)],
 383             output: v(u(16), 8),
 384             definition: Named("llvm.aarch64.neon.umull.v8i16")
 385         },
 386         "mull_s16" => Intrinsic {
 387             inputs: vec![v(i(16), 4), v(i(16), 4)],
 388             output: v(i(32), 4),
 389             definition: Named("llvm.aarch64.neon.smull.v4i32")
 390         },
 391         "mull_u16" => Intrinsic {
 392             inputs: vec![v(u(16), 4), v(u(16), 4)],
 393             output: v(u(32), 4),
 394             definition: Named("llvm.aarch64.neon.umull.v4i32")
 395         },
 396         "mull_s32" => Intrinsic {
 397             inputs: vec![v(i(32), 2), v(i(32), 2)],
 398             output: v(i(64), 2),
 399             definition: Named("llvm.aarch64.neon.smull.v2i64")
 400         },
 401         "mull_u32" => Intrinsic {
 402             inputs: vec![v(u(32), 2), v(u(32), 2)],
 403             output: v(u(64), 2),
 404             definition: Named("llvm.aarch64.neon.umull.v2i64")
 405         },
 406         "qdmullq_s8" => Intrinsic {
 407             inputs: vec![v(i(8), 8), v(i(8), 8)],
 408             output: v(i(16), 8),
 409             definition: Named("llvm.aarch64.neon.sqdmull.v8i16")
 410         },
 411         "qdmullq_s16" => Intrinsic {
 412             inputs: vec![v(i(16), 4), v(i(16), 4)],
 413             output: v(i(32), 4),
 414             definition: Named("llvm.aarch64.neon.sqdmull.v4i32")
 415         },
 416         "hsub_s8" => Intrinsic {
 417             inputs: vec![v(i(8), 8), v(i(8), 8)],
 418             output: v(i(8), 8),
 419             definition: Named("llvm.aarch64.neon.shsub.v8i8")
 420         },
 421         "hsub_u8" => Intrinsic {
 422             inputs: vec![v(u(8), 8), v(u(8), 8)],
 423             output: v(u(8), 8),
 424             definition: Named("llvm.aarch64.neon.uhsub.v8i8")
 425         },
 426         "hsub_s16" => Intrinsic {
 427             inputs: vec![v(i(16), 4), v(i(16), 4)],
 428             output: v(i(16), 4),
 429             definition: Named("llvm.aarch64.neon.shsub.v4i16")
 430         },
 431         "hsub_u16" => Intrinsic {
 432             inputs: vec![v(u(16), 4), v(u(16), 4)],
 433             output: v(u(16), 4),
 434             definition: Named("llvm.aarch64.neon.uhsub.v4i16")
 435         },
 436         "hsub_s32" => Intrinsic {
 437             inputs: vec![v(i(32), 2), v(i(32), 2)],
 438             output: v(i(32), 2),
 439             definition: Named("llvm.aarch64.neon.shsub.v2i32")
 440         },
 441         "hsub_u32" => Intrinsic {
 442             inputs: vec![v(u(32), 2), v(u(32), 2)],
 443             output: v(u(32), 2),
 444             definition: Named("llvm.aarch64.neon.uhsub.v2i32")
 445         },
 446         "hsubq_s8" => Intrinsic {
 447             inputs: vec![v(i(8), 16), v(i(8), 16)],
 448             output: v(i(8), 16),
 449             definition: Named("llvm.aarch64.neon.shsub.v16i8")
 450         },
 451         "hsubq_u8" => Intrinsic {
 452             inputs: vec![v(u(8), 16), v(u(8), 16)],
 453             output: v(u(8), 16),
 454             definition: Named("llvm.aarch64.neon.uhsub.v16i8")
 455         },
 456         "hsubq_s16" => Intrinsic {
 457             inputs: vec![v(i(16), 8), v(i(16), 8)],
 458             output: v(i(16), 8),
 459             definition: Named("llvm.aarch64.neon.shsub.v8i16")
 460         },
 461         "hsubq_u16" => Intrinsic {
 462             inputs: vec![v(u(16), 8), v(u(16), 8)],
 463             output: v(u(16), 8),
 464             definition: Named("llvm.aarch64.neon.uhsub.v8i16")
 465         },
 466         "hsubq_s32" => Intrinsic {
 467             inputs: vec![v(i(32), 4), v(i(32), 4)],
 468             output: v(i(32), 4),
 469             definition: Named("llvm.aarch64.neon.shsub.v4i32")
 470         },
 471         "hsubq_u32" => Intrinsic {
 472             inputs: vec![v(u(32), 4), v(u(32), 4)],
 473             output: v(u(32), 4),
 474             definition: Named("llvm.aarch64.neon.uhsub.v4i32")
 475         },
 476         "qsub_s8" => Intrinsic {
 477             inputs: vec![v(i(8), 8), v(i(8), 8)],
 478             output: v(i(8), 8),
 479             definition: Named("llvm.aarch64.neon.sqsub.v8i8")
 480         },
 481         "qsub_u8" => Intrinsic {
 482             inputs: vec![v(u(8), 8), v(u(8), 8)],
 483             output: v(u(8), 8),
 484             definition: Named("llvm.aarch64.neon.uqsub.v8i8")
 485         },
 486         "qsub_s16" => Intrinsic {
 487             inputs: vec![v(i(16), 4), v(i(16), 4)],
 488             output: v(i(16), 4),
 489             definition: Named("llvm.aarch64.neon.sqsub.v4i16")
 490         },
 491         "qsub_u16" => Intrinsic {
 492             inputs: vec![v(u(16), 4), v(u(16), 4)],
 493             output: v(u(16), 4),
 494             definition: Named("llvm.aarch64.neon.uqsub.v4i16")
 495         },
 496         "qsub_s32" => Intrinsic {
 497             inputs: vec![v(i(32), 2), v(i(32), 2)],
 498             output: v(i(32), 2),
 499             definition: Named("llvm.aarch64.neon.sqsub.v2i32")
 500         },
 501         "qsub_u32" => Intrinsic {
 502             inputs: vec![v(u(32), 2), v(u(32), 2)],
 503             output: v(u(32), 2),
 504             definition: Named("llvm.aarch64.neon.uqsub.v2i32")
 505         },
 506         "qsub_s64" => Intrinsic {
 507             inputs: vec![v(i(64), 1), v(i(64), 1)],
 508             output: v(i(64), 1),
 509             definition: Named("llvm.aarch64.neon.sqsub.v1i64")
 510         },
 511         "qsub_u64" => Intrinsic {
 512             inputs: vec![v(u(64), 1), v(u(64), 1)],
 513             output: v(u(64), 1),
 514             definition: Named("llvm.aarch64.neon.uqsub.v1i64")
 515         },
 516         "qsubq_s8" => Intrinsic {
 517             inputs: vec![v(i(8), 16), v(i(8), 16)],
 518             output: v(i(8), 16),
 519             definition: Named("llvm.aarch64.neon.sqsub.v16i8")
 520         },
 521         "qsubq_u8" => Intrinsic {
 522             inputs: vec![v(u(8), 16), v(u(8), 16)],
 523             output: v(u(8), 16),
 524             definition: Named("llvm.aarch64.neon.uqsub.v16i8")
 525         },
 526         "qsubq_s16" => Intrinsic {
 527             inputs: vec![v(i(16), 8), v(i(16), 8)],
 528             output: v(i(16), 8),
 529             definition: Named("llvm.aarch64.neon.sqsub.v8i16")
 530         },
 531         "qsubq_u16" => Intrinsic {
 532             inputs: vec![v(u(16), 8), v(u(16), 8)],
 533             output: v(u(16), 8),
 534             definition: Named("llvm.aarch64.neon.uqsub.v8i16")
 535         },
 536         "qsubq_s32" => Intrinsic {
 537             inputs: vec![v(i(32), 4), v(i(32), 4)],
 538             output: v(i(32), 4),
 539             definition: Named("llvm.aarch64.neon.sqsub.v4i32")
 540         },
 541         "qsubq_u32" => Intrinsic {
 542             inputs: vec![v(u(32), 4), v(u(32), 4)],
 543             output: v(u(32), 4),
 544             definition: Named("llvm.aarch64.neon.uqsub.v4i32")
 545         },
 546         "qsubq_s64" => Intrinsic {
 547             inputs: vec![v(i(64), 2), v(i(64), 2)],
 548             output: v(i(64), 2),
 549             definition: Named("llvm.aarch64.neon.sqsub.v2i64")
 550         },
 551         "qsubq_u64" => Intrinsic {
 552             inputs: vec![v(u(64), 2), v(u(64), 2)],
 553             output: v(u(64), 2),
 554             definition: Named("llvm.aarch64.neon.uqsub.v2i64")
 555         },
 556         "rsubhn_s16" => Intrinsic {
 557             inputs: vec![v(i(16), 8), v(i(16), 8)],
 558             output: v(i(8), 8),
 559             definition: Named("llvm.aarch64.neon.rsubhn.v8i8")
 560         },
 561         "rsubhn_u16" => Intrinsic {
 562             inputs: vec![v(u(16), 8), v(u(16), 8)],
 563             output: v(u(8), 8),
 564             definition: Named("llvm.aarch64.neon.rsubhn.v8i8")
 565         },
 566         "rsubhn_s32" => Intrinsic {
 567             inputs: vec![v(i(32), 4), v(i(32), 4)],
 568             output: v(i(16), 4),
 569             definition: Named("llvm.aarch64.neon.rsubhn.v4i16")
 570         },
 571         "rsubhn_u32" => Intrinsic {
 572             inputs: vec![v(u(32), 4), v(u(32), 4)],
 573             output: v(u(16), 4),
 574             definition: Named("llvm.aarch64.neon.rsubhn.v4i16")
 575         },
 576         "rsubhn_s64" => Intrinsic {
 577             inputs: vec![v(i(64), 2), v(i(64), 2)],
 578             output: v(i(32), 2),
 579             definition: Named("llvm.aarch64.neon.rsubhn.v2i32")
 580         },
 581         "rsubhn_u64" => Intrinsic {
 582             inputs: vec![v(u(64), 2), v(u(64), 2)],
 583             output: v(u(32), 2),
 584             definition: Named("llvm.aarch64.neon.rsubhn.v2i32")
 585         },
 586         "abd_s8" => Intrinsic {
 587             inputs: vec![v(i(8), 8), v(i(8), 8)],
 588             output: v(i(8), 8),
 589             definition: Named("llvm.aarch64.neon.sabd.v8i8")
 590         },
 591         "abd_u8" => Intrinsic {
 592             inputs: vec![v(u(8), 8), v(u(8), 8)],
 593             output: v(u(8), 8),
 594             definition: Named("llvm.aarch64.neon.uabd.v8i8")
 595         },
 596         "abd_s16" => Intrinsic {
 597             inputs: vec![v(i(16), 4), v(i(16), 4)],
 598             output: v(i(16), 4),
 599             definition: Named("llvm.aarch64.neon.sabd.v4i16")
 600         },
 601         "abd_u16" => Intrinsic {
 602             inputs: vec![v(u(16), 4), v(u(16), 4)],
 603             output: v(u(16), 4),
 604             definition: Named("llvm.aarch64.neon.uabd.v4i16")
 605         },
 606         "abd_s32" => Intrinsic {
 607             inputs: vec![v(i(32), 2), v(i(32), 2)],
 608             output: v(i(32), 2),
 609             definition: Named("llvm.aarch64.neon.sabd.v2i32")
 610         },
 611         "abd_u32" => Intrinsic {
 612             inputs: vec![v(u(32), 2), v(u(32), 2)],
 613             output: v(u(32), 2),
 614             definition: Named("llvm.aarch64.neon.uabd.v2i32")
 615         },
 616         "abd_f32" => Intrinsic {
 617             inputs: vec![v(f(32), 2), v(f(32), 2)],
 618             output: v(f(32), 2),
 619             definition: Named("llvm.aarch64.neon.fabd.v2f32")
 620         },
 621         "abd_f64" => Intrinsic {
 622             inputs: vec![v(f(64), 1), v(f(64), 1)],
 623             output: v(f(64), 1),
 624             definition: Named("llvm.aarch64.neon.fabd.v1f64")
 625         },
 626         "abdq_s8" => Intrinsic {
 627             inputs: vec![v(i(8), 16), v(i(8), 16)],
 628             output: v(i(8), 16),
 629             definition: Named("llvm.aarch64.neon.sabd.v16i8")
 630         },
 631         "abdq_u8" => Intrinsic {
 632             inputs: vec![v(u(8), 16), v(u(8), 16)],
 633             output: v(u(8), 16),
 634             definition: Named("llvm.aarch64.neon.uabd.v16i8")
 635         },
 636         "abdq_s16" => Intrinsic {
 637             inputs: vec![v(i(16), 8), v(i(16), 8)],
 638             output: v(i(16), 8),
 639             definition: Named("llvm.aarch64.neon.sabd.v8i16")
 640         },
 641         "abdq_u16" => Intrinsic {
 642             inputs: vec![v(u(16), 8), v(u(16), 8)],
 643             output: v(u(16), 8),
 644             definition: Named("llvm.aarch64.neon.uabd.v8i16")
 645         },
 646         "abdq_s32" => Intrinsic {
 647             inputs: vec![v(i(32), 4), v(i(32), 4)],
 648             output: v(i(32), 4),
 649             definition: Named("llvm.aarch64.neon.sabd.v4i32")
 650         },
 651         "abdq_u32" => Intrinsic {
 652             inputs: vec![v(u(32), 4), v(u(32), 4)],
 653             output: v(u(32), 4),
 654             definition: Named("llvm.aarch64.neon.uabd.v4i32")
 655         },
 656         "abdq_f32" => Intrinsic {
 657             inputs: vec![v(f(32), 4), v(f(32), 4)],
 658             output: v(f(32), 4),
 659             definition: Named("llvm.aarch64.neon.fabd.v4f32")
 660         },
 661         "abdq_f64" => Intrinsic {
 662             inputs: vec![v(f(64), 2), v(f(64), 2)],
 663             output: v(f(64), 2),
 664             definition: Named("llvm.aarch64.neon.fabd.v2f64")
 665         },
 666         "max_s8" => Intrinsic {
 667             inputs: vec![v(i(8), 8), v(i(8), 8)],
 668             output: v(i(8), 8),
 669             definition: Named("llvm.aarch64.neon.smax.v8i8")
 670         },
 671         "max_u8" => Intrinsic {
 672             inputs: vec![v(u(8), 8), v(u(8), 8)],
 673             output: v(u(8), 8),
 674             definition: Named("llvm.aarch64.neon.umax.v8i8")
 675         },
 676         "max_s16" => Intrinsic {
 677             inputs: vec![v(i(16), 4), v(i(16), 4)],
 678             output: v(i(16), 4),
 679             definition: Named("llvm.aarch64.neon.smax.v4i16")
 680         },
 681         "max_u16" => Intrinsic {
 682             inputs: vec![v(u(16), 4), v(u(16), 4)],
 683             output: v(u(16), 4),
 684             definition: Named("llvm.aarch64.neon.umax.v4i16")
 685         },
 686         "max_s32" => Intrinsic {
 687             inputs: vec![v(i(32), 2), v(i(32), 2)],
 688             output: v(i(32), 2),
 689             definition: Named("llvm.aarch64.neon.smax.v2i32")
 690         },
 691         "max_u32" => Intrinsic {
 692             inputs: vec![v(u(32), 2), v(u(32), 2)],
 693             output: v(u(32), 2),
 694             definition: Named("llvm.aarch64.neon.umax.v2i32")
 695         },
 696         "max_f32" => Intrinsic {
 697             inputs: vec![v(f(32), 2), v(f(32), 2)],
 698             output: v(f(32), 2),
 699             definition: Named("llvm.aarch64.neon.fmax.v2f32")
 700         },
 701         "max_f64" => Intrinsic {
 702             inputs: vec![v(f(64), 1), v(f(64), 1)],
 703             output: v(f(64), 1),
 704             definition: Named("llvm.aarch64.neon.fmax.v1f64")
 705         },
 706         "maxq_s8" => Intrinsic {
 707             inputs: vec![v(i(8), 16), v(i(8), 16)],
 708             output: v(i(8), 16),
 709             definition: Named("llvm.aarch64.neon.smax.v16i8")
 710         },
 711         "maxq_u8" => Intrinsic {
 712             inputs: vec![v(u(8), 16), v(u(8), 16)],
 713             output: v(u(8), 16),
 714             definition: Named("llvm.aarch64.neon.umax.v16i8")
 715         },
 716         "maxq_s16" => Intrinsic {
 717             inputs: vec![v(i(16), 8), v(i(16), 8)],
 718             output: v(i(16), 8),
 719             definition: Named("llvm.aarch64.neon.smax.v8i16")
 720         },
 721         "maxq_u16" => Intrinsic {
 722             inputs: vec![v(u(16), 8), v(u(16), 8)],
 723             output: v(u(16), 8),
 724             definition: Named("llvm.aarch64.neon.umax.v8i16")
 725         },
 726         "maxq_s32" => Intrinsic {
 727             inputs: vec![v(i(32), 4), v(i(32), 4)],
 728             output: v(i(32), 4),
 729             definition: Named("llvm.aarch64.neon.smax.v4i32")
 730         },
 731         "maxq_u32" => Intrinsic {
 732             inputs: vec![v(u(32), 4), v(u(32), 4)],
 733             output: v(u(32), 4),
 734             definition: Named("llvm.aarch64.neon.umax.v4i32")
 735         },
 736         "maxq_f32" => Intrinsic {
 737             inputs: vec![v(f(32), 4), v(f(32), 4)],
 738             output: v(f(32), 4),
 739             definition: Named("llvm.aarch64.neon.fmax.v4f32")
 740         },
 741         "maxq_f64" => Intrinsic {
 742             inputs: vec![v(f(64), 2), v(f(64), 2)],
 743             output: v(f(64), 2),
 744             definition: Named("llvm.aarch64.neon.fmax.v2f64")
 745         },
 746         "min_s8" => Intrinsic {
 747             inputs: vec![v(i(8), 8), v(i(8), 8)],
 748             output: v(i(8), 8),
 749             definition: Named("llvm.aarch64.neon.smin.v8i8")
 750         },
 751         "min_u8" => Intrinsic {
 752             inputs: vec![v(u(8), 8), v(u(8), 8)],
 753             output: v(u(8), 8),
 754             definition: Named("llvm.aarch64.neon.umin.v8i8")
 755         },
 756         "min_s16" => Intrinsic {
 757             inputs: vec![v(i(16), 4), v(i(16), 4)],
 758             output: v(i(16), 4),
 759             definition: Named("llvm.aarch64.neon.smin.v4i16")
 760         },
 761         "min_u16" => Intrinsic {
 762             inputs: vec![v(u(16), 4), v(u(16), 4)],
 763             output: v(u(16), 4),
 764             definition: Named("llvm.aarch64.neon.umin.v4i16")
 765         },
 766         "min_s32" => Intrinsic {
 767             inputs: vec![v(i(32), 2), v(i(32), 2)],
 768             output: v(i(32), 2),
 769             definition: Named("llvm.aarch64.neon.smin.v2i32")
 770         },
 771         "min_u32" => Intrinsic {
 772             inputs: vec![v(u(32), 2), v(u(32), 2)],
 773             output: v(u(32), 2),
 774             definition: Named("llvm.aarch64.neon.umin.v2i32")
 775         },
 776         "min_f32" => Intrinsic {
 777             inputs: vec![v(f(32), 2), v(f(32), 2)],
 778             output: v(f(32), 2),
 779             definition: Named("llvm.aarch64.neon.fmin.v2f32")
 780         },
 781         "min_f64" => Intrinsic {
 782             inputs: vec![v(f(64), 1), v(f(64), 1)],
 783             output: v(f(64), 1),
 784             definition: Named("llvm.aarch64.neon.fmin.v1f64")
 785         },
 786         "minq_s8" => Intrinsic {
 787             inputs: vec![v(i(8), 16), v(i(8), 16)],
 788             output: v(i(8), 16),
 789             definition: Named("llvm.aarch64.neon.smin.v16i8")
 790         },
 791         "minq_u8" => Intrinsic {
 792             inputs: vec![v(u(8), 16), v(u(8), 16)],
 793             output: v(u(8), 16),
 794             definition: Named("llvm.aarch64.neon.umin.v16i8")
 795         },
 796         "minq_s16" => Intrinsic {
 797             inputs: vec![v(i(16), 8), v(i(16), 8)],
 798             output: v(i(16), 8),
 799             definition: Named("llvm.aarch64.neon.smin.v8i16")
 800         },
 801         "minq_u16" => Intrinsic {
 802             inputs: vec![v(u(16), 8), v(u(16), 8)],
 803             output: v(u(16), 8),
 804             definition: Named("llvm.aarch64.neon.umin.v8i16")
 805         },
 806         "minq_s32" => Intrinsic {
 807             inputs: vec![v(i(32), 4), v(i(32), 4)],
 808             output: v(i(32), 4),
 809             definition: Named("llvm.aarch64.neon.smin.v4i32")
 810         },
 811         "minq_u32" => Intrinsic {
 812             inputs: vec![v(u(32), 4), v(u(32), 4)],
 813             output: v(u(32), 4),
 814             definition: Named("llvm.aarch64.neon.umin.v4i32")
 815         },
 816         "minq_f32" => Intrinsic {
 817             inputs: vec![v(f(32), 4), v(f(32), 4)],
 818             output: v(f(32), 4),
 819             definition: Named("llvm.aarch64.neon.fmin.v4f32")
 820         },
 821         "minq_f64" => Intrinsic {
 822             inputs: vec![v(f(64), 2), v(f(64), 2)],
 823             output: v(f(64), 2),
 824             definition: Named("llvm.aarch64.neon.fmin.v2f64")
 825         },
 826         "maxnm_f32" => Intrinsic {
 827             inputs: vec![v(f(32), 2), v(f(32), 2)],
 828             output: v(f(32), 2),
 829             definition: Named("llvm.aarch64.neon.fmaxnm.v2f32")
 830         },
 831         "maxnm_f64" => Intrinsic {
 832             inputs: vec![v(f(64), 1), v(f(64), 1)],
 833             output: v(f(64), 1),
 834             definition: Named("llvm.aarch64.neon.fmaxnm.v1f64")
 835         },
 836         "maxnmq_f32" => Intrinsic {
 837             inputs: vec![v(f(32), 4), v(f(32), 4)],
 838             output: v(f(32), 4),
 839             definition: Named("llvm.aarch64.neon.fmaxnm.v4f32")
 840         },
 841         "maxnmq_f64" => Intrinsic {
 842             inputs: vec![v(f(64), 2), v(f(64), 2)],
 843             output: v(f(64), 2),
 844             definition: Named("llvm.aarch64.neon.fmaxnm.v2f64")
 845         },
 846         "minnm_f32" => Intrinsic {
 847             inputs: vec![v(f(32), 2), v(f(32), 2)],
 848             output: v(f(32), 2),
 849             definition: Named("llvm.aarch64.neon.fminnm.v2f32")
 850         },
 851         "minnm_f64" => Intrinsic {
 852             inputs: vec![v(f(64), 1), v(f(64), 1)],
 853             output: v(f(64), 1),
 854             definition: Named("llvm.aarch64.neon.fminnm.v1f64")
 855         },
 856         "minnmq_f32" => Intrinsic {
 857             inputs: vec![v(f(32), 4), v(f(32), 4)],
 858             output: v(f(32), 4),
 859             definition: Named("llvm.aarch64.neon.fminnm.v4f32")
 860         },
 861         "minnmq_f64" => Intrinsic {
 862             inputs: vec![v(f(64), 2), v(f(64), 2)],
 863             output: v(f(64), 2),
 864             definition: Named("llvm.aarch64.neon.fminnm.v2f64")
 865         },
 866         "shl_s8" => Intrinsic {
 867             inputs: vec![v(i(8), 8), v(i(8), 8)],
 868             output: v(i(8), 8),
 869             definition: Named("llvm.aarch64.neon.sshl.v8i8")
 870         },
 871         "shl_u8" => Intrinsic {
 872             inputs: vec![v(u(8), 8), v(i(8), 8)],
 873             output: v(u(8), 8),
 874             definition: Named("llvm.aarch64.neon.ushl.v8i8")
 875         },
 876         "shl_s16" => Intrinsic {
 877             inputs: vec![v(i(16), 4), v(i(16), 4)],
 878             output: v(i(16), 4),
 879             definition: Named("llvm.aarch64.neon.sshl.v4i16")
 880         },
 881         "shl_u16" => Intrinsic {
 882             inputs: vec![v(u(16), 4), v(i(16), 4)],
 883             output: v(u(16), 4),
 884             definition: Named("llvm.aarch64.neon.ushl.v4i16")
 885         },
 886         "shl_s32" => Intrinsic {
 887             inputs: vec![v(i(32), 2), v(i(32), 2)],
 888             output: v(i(32), 2),
 889             definition: Named("llvm.aarch64.neon.sshl.v2i32")
 890         },
 891         "shl_u32" => Intrinsic {
 892             inputs: vec![v(u(32), 2), v(i(32), 2)],
 893             output: v(u(32), 2),
 894             definition: Named("llvm.aarch64.neon.ushl.v2i32")
 895         },
 896         "shl_s64" => Intrinsic {
 897             inputs: vec![v(i(64), 1), v(i(64), 1)],
 898             output: v(i(64), 1),
 899             definition: Named("llvm.aarch64.neon.sshl.v1i64")
 900         },
 901         "shl_u64" => Intrinsic {
 902             inputs: vec![v(u(64), 1), v(i(64), 1)],
 903             output: v(u(64), 1),
 904             definition: Named("llvm.aarch64.neon.ushl.v1i64")
 905         },
 906         "shlq_s8" => Intrinsic {
 907             inputs: vec![v(i(8), 16), v(i(8), 16)],
 908             output: v(i(8), 16),
 909             definition: Named("llvm.aarch64.neon.sshl.v16i8")
 910         },
 911         "shlq_u8" => Intrinsic {
 912             inputs: vec![v(u(8), 16), v(i(8), 16)],
 913             output: v(u(8), 16),
 914             definition: Named("llvm.aarch64.neon.ushl.v16i8")
 915         },
 916         "shlq_s16" => Intrinsic {
 917             inputs: vec![v(i(16), 8), v(i(16), 8)],
 918             output: v(i(16), 8),
 919             definition: Named("llvm.aarch64.neon.sshl.v8i16")
 920         },
 921         "shlq_u16" => Intrinsic {
 922             inputs: vec![v(u(16), 8), v(i(16), 8)],
 923             output: v(u(16), 8),
 924             definition: Named("llvm.aarch64.neon.ushl.v8i16")
 925         },
 926         "shlq_s32" => Intrinsic {
 927             inputs: vec![v(i(32), 4), v(i(32), 4)],
 928             output: v(i(32), 4),
 929             definition: Named("llvm.aarch64.neon.sshl.v4i32")
 930         },
 931         "shlq_u32" => Intrinsic {
 932             inputs: vec![v(u(32), 4), v(i(32), 4)],
 933             output: v(u(32), 4),
 934             definition: Named("llvm.aarch64.neon.ushl.v4i32")
 935         },
 936         "shlq_s64" => Intrinsic {
 937             inputs: vec![v(i(64), 2), v(i(64), 2)],
 938             output: v(i(64), 2),
 939             definition: Named("llvm.aarch64.neon.sshl.v2i64")
 940         },
 941         "shlq_u64" => Intrinsic {
 942             inputs: vec![v(u(64), 2), v(i(64), 2)],
 943             output: v(u(64), 2),
 944             definition: Named("llvm.aarch64.neon.ushl.v2i64")
 945         },
 946         "qshl_s8" => Intrinsic {
 947             inputs: vec![v(i(8), 8), v(i(8), 8)],
 948             output: v(i(8), 8),
 949             definition: Named("llvm.aarch64.neon.sqshl.v8i8")
 950         },
 951         "qshl_u8" => Intrinsic {
 952             inputs: vec![v(u(8), 8), v(i(8), 8)],
 953             output: v(u(8), 8),
 954             definition: Named("llvm.aarch64.neon.uqshl.v8i8")
 955         },
 956         "qshl_s16" => Intrinsic {
 957             inputs: vec![v(i(16), 4), v(i(16), 4)],
 958             output: v(i(16), 4),
 959             definition: Named("llvm.aarch64.neon.sqshl.v4i16")
 960         },
 961         "qshl_u16" => Intrinsic {
 962             inputs: vec![v(u(16), 4), v(i(16), 4)],
 963             output: v(u(16), 4),
 964             definition: Named("llvm.aarch64.neon.uqshl.v4i16")
 965         },
 966         "qshl_s32" => Intrinsic {
 967             inputs: vec![v(i(32), 2), v(i(32), 2)],
 968             output: v(i(32), 2),
 969             definition: Named("llvm.aarch64.neon.sqshl.v2i32")
 970         },
 971         "qshl_u32" => Intrinsic {
 972             inputs: vec![v(u(32), 2), v(i(32), 2)],
 973             output: v(u(32), 2),
 974             definition: Named("llvm.aarch64.neon.uqshl.v2i32")
 975         },
 976         "qshl_s64" => Intrinsic {
 977             inputs: vec![v(i(64), 1), v(i(64), 1)],
 978             output: v(i(64), 1),
 979             definition: Named("llvm.aarch64.neon.sqshl.v1i64")
 980         },
 981         "qshl_u64" => Intrinsic {
 982             inputs: vec![v(u(64), 1), v(i(64), 1)],
 983             output: v(u(64), 1),
 984             definition: Named("llvm.aarch64.neon.uqshl.v1i64")
 985         },
 986         "qshlq_s8" => Intrinsic {
 987             inputs: vec![v(i(8), 16), v(i(8), 16)],
 988             output: v(i(8), 16),
 989             definition: Named("llvm.aarch64.neon.sqshl.v16i8")
 990         },
 991         "qshlq_u8" => Intrinsic {
 992             inputs: vec![v(u(8), 16), v(i(8), 16)],
 993             output: v(u(8), 16),
 994             definition: Named("llvm.aarch64.neon.uqshl.v16i8")
 995         },
 996         "qshlq_s16" => Intrinsic {
 997             inputs: vec![v(i(16), 8), v(i(16), 8)],
 998             output: v(i(16), 8),
 999             definition: Named("llvm.aarch64.neon.sqshl.v8i16")
1000         },
1001         "qshlq_u16" => Intrinsic {
1002             inputs: vec![v(u(16), 8), v(i(16), 8)],
1003             output: v(u(16), 8),
1004             definition: Named("llvm.aarch64.neon.uqshl.v8i16")
1005         },
1006         "qshlq_s32" => Intrinsic {
1007             inputs: vec![v(i(32), 4), v(i(32), 4)],
1008             output: v(i(32), 4),
1009             definition: Named("llvm.aarch64.neon.sqshl.v4i32")
1010         },
1011         "qshlq_u32" => Intrinsic {
1012             inputs: vec![v(u(32), 4), v(i(32), 4)],
1013             output: v(u(32), 4),
1014             definition: Named("llvm.aarch64.neon.uqshl.v4i32")
1015         },
1016         "qshlq_s64" => Intrinsic {
1017             inputs: vec![v(i(64), 2), v(i(64), 2)],
1018             output: v(i(64), 2),
1019             definition: Named("llvm.aarch64.neon.sqshl.v2i64")
1020         },
1021         "qshlq_u64" => Intrinsic {
1022             inputs: vec![v(u(64), 2), v(i(64), 2)],
1023             output: v(u(64), 2),
1024             definition: Named("llvm.aarch64.neon.uqshl.v2i64")
1025         },
1026         "rshl_s8" => Intrinsic {
1027             inputs: vec![v(i(8), 8), v(i(8), 8)],
1028             output: v(i(8), 8),
1029             definition: Named("llvm.aarch64.neon.srshl.v8i8")
1030         },
1031         "rshl_u8" => Intrinsic {
1032             inputs: vec![v(u(8), 8), v(i(8), 8)],
1033             output: v(u(8), 8),
1034             definition: Named("llvm.aarch64.neon.urshl.v8i8")
1035         },
1036         "rshl_s16" => Intrinsic {
1037             inputs: vec![v(i(16), 4), v(i(16), 4)],
1038             output: v(i(16), 4),
1039             definition: Named("llvm.aarch64.neon.srshl.v4i16")
1040         },
1041         "rshl_u16" => Intrinsic {
1042             inputs: vec![v(u(16), 4), v(i(16), 4)],
1043             output: v(u(16), 4),
1044             definition: Named("llvm.aarch64.neon.urshl.v4i16")
1045         },
1046         "rshl_s32" => Intrinsic {
1047             inputs: vec![v(i(32), 2), v(i(32), 2)],
1048             output: v(i(32), 2),
1049             definition: Named("llvm.aarch64.neon.srshl.v2i32")
1050         },
1051         "rshl_u32" => Intrinsic {
1052             inputs: vec![v(u(32), 2), v(i(32), 2)],
1053             output: v(u(32), 2),
1054             definition: Named("llvm.aarch64.neon.urshl.v2i32")
1055         },
1056         "rshl_s64" => Intrinsic {
1057             inputs: vec![v(i(64), 1), v(i(64), 1)],
1058             output: v(i(64), 1),
1059             definition: Named("llvm.aarch64.neon.srshl.v1i64")
1060         },
1061         "rshl_u64" => Intrinsic {
1062             inputs: vec![v(u(64), 1), v(i(64), 1)],
1063             output: v(u(64), 1),
1064             definition: Named("llvm.aarch64.neon.urshl.v1i64")
1065         },
1066         "rshlq_s8" => Intrinsic {
1067             inputs: vec![v(i(8), 16), v(i(8), 16)],
1068             output: v(i(8), 16),
1069             definition: Named("llvm.aarch64.neon.srshl.v16i8")
1070         },
1071         "rshlq_u8" => Intrinsic {
1072             inputs: vec![v(u(8), 16), v(i(8), 16)],
1073             output: v(u(8), 16),
1074             definition: Named("llvm.aarch64.neon.urshl.v16i8")
1075         },
1076         "rshlq_s16" => Intrinsic {
1077             inputs: vec![v(i(16), 8), v(i(16), 8)],
1078             output: v(i(16), 8),
1079             definition: Named("llvm.aarch64.neon.srshl.v8i16")
1080         },
1081         "rshlq_u16" => Intrinsic {
1082             inputs: vec![v(u(16), 8), v(i(16), 8)],
1083             output: v(u(16), 8),
1084             definition: Named("llvm.aarch64.neon.urshl.v8i16")
1085         },
1086         "rshlq_s32" => Intrinsic {
1087             inputs: vec![v(i(32), 4), v(i(32), 4)],
1088             output: v(i(32), 4),
1089             definition: Named("llvm.aarch64.neon.srshl.v4i32")
1090         },
1091         "rshlq_u32" => Intrinsic {
1092             inputs: vec![v(u(32), 4), v(i(32), 4)],
1093             output: v(u(32), 4),
1094             definition: Named("llvm.aarch64.neon.urshl.v4i32")
1095         },
1096         "rshlq_s64" => Intrinsic {
1097             inputs: vec![v(i(64), 2), v(i(64), 2)],
1098             output: v(i(64), 2),
1099             definition: Named("llvm.aarch64.neon.srshl.v2i64")
1100         },
1101         "rshlq_u64" => Intrinsic {
1102             inputs: vec![v(u(64), 2), v(i(64), 2)],
1103             output: v(u(64), 2),
1104             definition: Named("llvm.aarch64.neon.urshl.v2i64")
1105         },
1106         "qrshl_s8" => Intrinsic {
1107             inputs: vec![v(i(8), 8), v(i(8), 8)],
1108             output: v(i(8), 8),
1109             definition: Named("llvm.aarch64.neon.sqrshl.v8i8")
1110         },
1111         "qrshl_u8" => Intrinsic {
1112             inputs: vec![v(u(8), 8), v(i(8), 8)],
1113             output: v(u(8), 8),
1114             definition: Named("llvm.aarch64.neon.uqrshl.v8i8")
1115         },
1116         "qrshl_s16" => Intrinsic {
1117             inputs: vec![v(i(16), 4), v(i(16), 4)],
1118             output: v(i(16), 4),
1119             definition: Named("llvm.aarch64.neon.sqrshl.v4i16")
1120         },
1121         "qrshl_u16" => Intrinsic {
1122             inputs: vec![v(u(16), 4), v(i(16), 4)],
1123             output: v(u(16), 4),
1124             definition: Named("llvm.aarch64.neon.uqrshl.v4i16")
1125         },
1126         "qrshl_s32" => Intrinsic {
1127             inputs: vec![v(i(32), 2), v(i(32), 2)],
1128             output: v(i(32), 2),
1129             definition: Named("llvm.aarch64.neon.sqrshl.v2i32")
1130         },
1131         "qrshl_u32" => Intrinsic {
1132             inputs: vec![v(u(32), 2), v(i(32), 2)],
1133             output: v(u(32), 2),
1134             definition: Named("llvm.aarch64.neon.uqrshl.v2i32")
1135         },
1136         "qrshl_s64" => Intrinsic {
1137             inputs: vec![v(i(64), 1), v(i(64), 1)],
1138             output: v(i(64), 1),
1139             definition: Named("llvm.aarch64.neon.sqrshl.v1i64")
1140         },
1141         "qrshl_u64" => Intrinsic {
1142             inputs: vec![v(u(64), 1), v(i(64), 1)],
1143             output: v(u(64), 1),
1144             definition: Named("llvm.aarch64.neon.uqrshl.v1i64")
1145         },
1146         "qrshlq_s8" => Intrinsic {
1147             inputs: vec![v(i(8), 16), v(i(8), 16)],
1148             output: v(i(8), 16),
1149             definition: Named("llvm.aarch64.neon.sqrshl.v16i8")
1150         },
1151         "qrshlq_u8" => Intrinsic {
1152             inputs: vec![v(u(8), 16), v(i(8), 16)],
1153             output: v(u(8), 16),
1154             definition: Named("llvm.aarch64.neon.uqrshl.v16i8")
1155         },
1156         "qrshlq_s16" => Intrinsic {
1157             inputs: vec![v(i(16), 8), v(i(16), 8)],
1158             output: v(i(16), 8),
1159             definition: Named("llvm.aarch64.neon.sqrshl.v8i16")
1160         },
1161         "qrshlq_u16" => Intrinsic {
1162             inputs: vec![v(u(16), 8), v(i(16), 8)],
1163             output: v(u(16), 8),
1164             definition: Named("llvm.aarch64.neon.uqrshl.v8i16")
1165         },
1166         "qrshlq_s32" => Intrinsic {
1167             inputs: vec![v(i(32), 4), v(i(32), 4)],
1168             output: v(i(32), 4),
1169             definition: Named("llvm.aarch64.neon.sqrshl.v4i32")
1170         },
1171         "qrshlq_u32" => Intrinsic {
1172             inputs: vec![v(u(32), 4), v(i(32), 4)],
1173             output: v(u(32), 4),
1174             definition: Named("llvm.aarch64.neon.uqrshl.v4i32")
1175         },
1176         "qrshlq_s64" => Intrinsic {
1177             inputs: vec![v(i(64), 2), v(i(64), 2)],
1178             output: v(i(64), 2),
1179             definition: Named("llvm.aarch64.neon.sqrshl.v2i64")
1180         },
1181         "qrshlq_u64" => Intrinsic {
1182             inputs: vec![v(u(64), 2), v(i(64), 2)],
1183             output: v(u(64), 2),
1184             definition: Named("llvm.aarch64.neon.uqrshl.v2i64")
1185         },
1186         "qshrun_n_s16" => Intrinsic {
1187             inputs: vec![v(i(16), 8), u(32)],
1188             output: v(i(8), 8),
1189             definition: Named("llvm.aarch64.neon.sqshrun.v8i8")
1190         },
1191         "qshrun_n_s32" => Intrinsic {
1192             inputs: vec![v(i(32), 4), u(32)],
1193             output: v(i(16), 4),
1194             definition: Named("llvm.aarch64.neon.sqshrun.v4i16")
1195         },
1196         "qshrun_n_s64" => Intrinsic {
1197             inputs: vec![v(i(64), 2), u(32)],
1198             output: v(i(32), 2),
1199             definition: Named("llvm.aarch64.neon.sqshrun.v2i32")
1200         },
1201         "qrshrun_n_s16" => Intrinsic {
1202             inputs: vec![v(i(16), 8), u(32)],
1203             output: v(i(8), 8),
1204             definition: Named("llvm.aarch64.neon.sqrshrun.v8i8")
1205         },
1206         "qrshrun_n_s32" => Intrinsic {
1207             inputs: vec![v(i(32), 4), u(32)],
1208             output: v(i(16), 4),
1209             definition: Named("llvm.aarch64.neon.sqrshrun.v4i16")
1210         },
1211         "qrshrun_n_s64" => Intrinsic {
1212             inputs: vec![v(i(64), 2), u(32)],
1213             output: v(i(32), 2),
1214             definition: Named("llvm.aarch64.neon.sqrshrun.v2i32")
1215         },
1216         "qshrn_n_s16" => Intrinsic {
1217             inputs: vec![v(i(16), 8), u(32)],
1218             output: v(i(8), 8),
1219             definition: Named("llvm.aarch64.neon.sqshrn.v8i8")
1220         },
1221         "qshrn_n_u16" => Intrinsic {
1222             inputs: vec![v(u(16), 8), u(32)],
1223             output: v(u(8), 8),
1224             definition: Named("llvm.aarch64.neon.uqshrn.v8i8")
1225         },
1226         "qshrn_n_s32" => Intrinsic {
1227             inputs: vec![v(i(32), 4), u(32)],
1228             output: v(i(16), 4),
1229             definition: Named("llvm.aarch64.neon.sqshrn.v4i16")
1230         },
1231         "qshrn_n_u32" => Intrinsic {
1232             inputs: vec![v(u(32), 4), u(32)],
1233             output: v(u(16), 4),
1234             definition: Named("llvm.aarch64.neon.uqshrn.v4i16")
1235         },
1236         "qshrn_n_s64" => Intrinsic {
1237             inputs: vec![v(i(64), 2), u(32)],
1238             output: v(i(32), 2),
1239             definition: Named("llvm.aarch64.neon.sqshrn.v2i32")
1240         },
1241         "qshrn_n_u64" => Intrinsic {
1242             inputs: vec![v(u(64), 2), u(32)],
1243             output: v(u(32), 2),
1244             definition: Named("llvm.aarch64.neon.uqshrn.v2i32")
1245         },
1246         "rshrn_n_s16" => Intrinsic {
1247             inputs: vec![v(i(16), 8), u(32)],
1248             output: v(i(8), 8),
1249             definition: Named("llvm.aarch64.neon.rshrn.v8i8")
1250         },
1251         "rshrn_n_u16" => Intrinsic {
1252             inputs: vec![v(u(16), 8), u(32)],
1253             output: v(u(8), 8),
1254             definition: Named("llvm.aarch64.neon.rshrn.v8i8")
1255         },
1256         "rshrn_n_s32" => Intrinsic {
1257             inputs: vec![v(i(32), 4), u(32)],
1258             output: v(i(16), 4),
1259             definition: Named("llvm.aarch64.neon.rshrn.v4i16")
1260         },
1261         "rshrn_n_u32" => Intrinsic {
1262             inputs: vec![v(u(32), 4), u(32)],
1263             output: v(u(16), 4),
1264             definition: Named("llvm.aarch64.neon.rshrn.v4i16")
1265         },
1266         "rshrn_n_s64" => Intrinsic {
1267             inputs: vec![v(i(64), 2), u(32)],
1268             output: v(i(32), 2),
1269             definition: Named("llvm.aarch64.neon.rshrn.v2i32")
1270         },
1271         "rshrn_n_u64" => Intrinsic {
1272             inputs: vec![v(u(64), 2), u(32)],
1273             output: v(u(32), 2),
1274             definition: Named("llvm.aarch64.neon.rshrn.v2i32")
1275         },
1276         "qrshrn_n_s16" => Intrinsic {
1277             inputs: vec![v(i(16), 8), u(32)],
1278             output: v(i(8), 8),
1279             definition: Named("llvm.aarch64.neon.sqrshrn.v8i8")
1280         },
1281         "qrshrn_n_u16" => Intrinsic {
1282             inputs: vec![v(u(16), 8), u(32)],
1283             output: v(u(8), 8),
1284             definition: Named("llvm.aarch64.neon.uqrshrn.v8i8")
1285         },
1286         "qrshrn_n_s32" => Intrinsic {
1287             inputs: vec![v(i(32), 4), u(32)],
1288             output: v(i(16), 4),
1289             definition: Named("llvm.aarch64.neon.sqrshrn.v4i16")
1290         },
1291         "qrshrn_n_u32" => Intrinsic {
1292             inputs: vec![v(u(32), 4), u(32)],
1293             output: v(u(16), 4),
1294             definition: Named("llvm.aarch64.neon.uqrshrn.v4i16")
1295         },
1296         "qrshrn_n_s64" => Intrinsic {
1297             inputs: vec![v(i(64), 2), u(32)],
1298             output: v(i(32), 2),
1299             definition: Named("llvm.aarch64.neon.sqrshrn.v2i32")
1300         },
1301         "qrshrn_n_u64" => Intrinsic {
1302             inputs: vec![v(u(64), 2), u(32)],
1303             output: v(u(32), 2),
1304             definition: Named("llvm.aarch64.neon.uqrshrn.v2i32")
1305         },
1306         "sri_s8" => Intrinsic {
1307             inputs: vec![v(i(8), 8), v(i(8), 8)],
1308             output: v(i(8), 8),
1309             definition: Named("llvm.aarch64.neon.vsri.v8i8")
1310         },
1311         "sri_u8" => Intrinsic {
1312             inputs: vec![v(u(8), 8), v(u(8), 8)],
1313             output: v(u(8), 8),
1314             definition: Named("llvm.aarch64.neon.vsri.v8i8")
1315         },
1316         "sri_s16" => Intrinsic {
1317             inputs: vec![v(i(16), 4), v(i(16), 4)],
1318             output: v(i(16), 4),
1319             definition: Named("llvm.aarch64.neon.vsri.v4i16")
1320         },
1321         "sri_u16" => Intrinsic {
1322             inputs: vec![v(u(16), 4), v(u(16), 4)],
1323             output: v(u(16), 4),
1324             definition: Named("llvm.aarch64.neon.vsri.v4i16")
1325         },
1326         "sri_s32" => Intrinsic {
1327             inputs: vec![v(i(32), 2), v(i(32), 2)],
1328             output: v(i(32), 2),
1329             definition: Named("llvm.aarch64.neon.vsri.v2i32")
1330         },
1331         "sri_u32" => Intrinsic {
1332             inputs: vec![v(u(32), 2), v(u(32), 2)],
1333             output: v(u(32), 2),
1334             definition: Named("llvm.aarch64.neon.vsri.v2i32")
1335         },
1336         "sri_s64" => Intrinsic {
1337             inputs: vec![v(i(64), 1), v(i(64), 1)],
1338             output: v(i(64), 1),
1339             definition: Named("llvm.aarch64.neon.vsri.v1i64")
1340         },
1341         "sri_u64" => Intrinsic {
1342             inputs: vec![v(u(64), 1), v(u(64), 1)],
1343             output: v(u(64), 1),
1344             definition: Named("llvm.aarch64.neon.vsri.v1i64")
1345         },
1346         "sriq_s8" => Intrinsic {
1347             inputs: vec![v(i(8), 16), v(i(8), 16)],
1348             output: v(i(8), 16),
1349             definition: Named("llvm.aarch64.neon.vsri.v16i8")
1350         },
1351         "sriq_u8" => Intrinsic {
1352             inputs: vec![v(u(8), 16), v(u(8), 16)],
1353             output: v(u(8), 16),
1354             definition: Named("llvm.aarch64.neon.vsri.v16i8")
1355         },
1356         "sriq_s16" => Intrinsic {
1357             inputs: vec![v(i(16), 8), v(i(16), 8)],
1358             output: v(i(16), 8),
1359             definition: Named("llvm.aarch64.neon.vsri.v8i16")
1360         },
1361         "sriq_u16" => Intrinsic {
1362             inputs: vec![v(u(16), 8), v(u(16), 8)],
1363             output: v(u(16), 8),
1364             definition: Named("llvm.aarch64.neon.vsri.v8i16")
1365         },
1366         "sriq_s32" => Intrinsic {
1367             inputs: vec![v(i(32), 4), v(i(32), 4)],
1368             output: v(i(32), 4),
1369             definition: Named("llvm.aarch64.neon.vsri.v4i32")
1370         },
1371         "sriq_u32" => Intrinsic {
1372             inputs: vec![v(u(32), 4), v(u(32), 4)],
1373             output: v(u(32), 4),
1374             definition: Named("llvm.aarch64.neon.vsri.v4i32")
1375         },
1376         "sriq_s64" => Intrinsic {
1377             inputs: vec![v(i(64), 2), v(i(64), 2)],
1378             output: v(i(64), 2),
1379             definition: Named("llvm.aarch64.neon.vsri.v2i64")
1380         },
1381         "sriq_u64" => Intrinsic {
1382             inputs: vec![v(u(64), 2), v(u(64), 2)],
1383             output: v(u(64), 2),
1384             definition: Named("llvm.aarch64.neon.vsri.v2i64")
1385         },
1386         "sli_s8" => Intrinsic {
1387             inputs: vec![v(i(8), 8), v(i(8), 8)],
1388             output: v(i(8), 8),
1389             definition: Named("llvm.aarch64.neon.vsli.v8i8")
1390         },
1391         "sli_u8" => Intrinsic {
1392             inputs: vec![v(u(8), 8), v(u(8), 8)],
1393             output: v(u(8), 8),
1394             definition: Named("llvm.aarch64.neon.vsli.v8i8")
1395         },
1396         "sli_s16" => Intrinsic {
1397             inputs: vec![v(i(16), 4), v(i(16), 4)],
1398             output: v(i(16), 4),
1399             definition: Named("llvm.aarch64.neon.vsli.v4i16")
1400         },
1401         "sli_u16" => Intrinsic {
1402             inputs: vec![v(u(16), 4), v(u(16), 4)],
1403             output: v(u(16), 4),
1404             definition: Named("llvm.aarch64.neon.vsli.v4i16")
1405         },
1406         "sli_s32" => Intrinsic {
1407             inputs: vec![v(i(32), 2), v(i(32), 2)],
1408             output: v(i(32), 2),
1409             definition: Named("llvm.aarch64.neon.vsli.v2i32")
1410         },
1411         "sli_u32" => Intrinsic {
1412             inputs: vec![v(u(32), 2), v(u(32), 2)],
1413             output: v(u(32), 2),
1414             definition: Named("llvm.aarch64.neon.vsli.v2i32")
1415         },
1416         "sli_s64" => Intrinsic {
1417             inputs: vec![v(i(64), 1), v(i(64), 1)],
1418             output: v(i(64), 1),
1419             definition: Named("llvm.aarch64.neon.vsli.v1i64")
1420         },
1421         "sli_u64" => Intrinsic {
1422             inputs: vec![v(u(64), 1), v(u(64), 1)],
1423             output: v(u(64), 1),
1424             definition: Named("llvm.aarch64.neon.vsli.v1i64")
1425         },
1426         "sliq_s8" => Intrinsic {
1427             inputs: vec![v(i(8), 16), v(i(8), 16)],
1428             output: v(i(8), 16),
1429             definition: Named("llvm.aarch64.neon.vsli.v16i8")
1430         },
1431         "sliq_u8" => Intrinsic {
1432             inputs: vec![v(u(8), 16), v(u(8), 16)],
1433             output: v(u(8), 16),
1434             definition: Named("llvm.aarch64.neon.vsli.v16i8")
1435         },
1436         "sliq_s16" => Intrinsic {
1437             inputs: vec![v(i(16), 8), v(i(16), 8)],
1438             output: v(i(16), 8),
1439             definition: Named("llvm.aarch64.neon.vsli.v8i16")
1440         },
1441         "sliq_u16" => Intrinsic {
1442             inputs: vec![v(u(16), 8), v(u(16), 8)],
1443             output: v(u(16), 8),
1444             definition: Named("llvm.aarch64.neon.vsli.v8i16")
1445         },
1446         "sliq_s32" => Intrinsic {
1447             inputs: vec![v(i(32), 4), v(i(32), 4)],
1448             output: v(i(32), 4),
1449             definition: Named("llvm.aarch64.neon.vsli.v4i32")
1450         },
1451         "sliq_u32" => Intrinsic {
1452             inputs: vec![v(u(32), 4), v(u(32), 4)],
1453             output: v(u(32), 4),
1454             definition: Named("llvm.aarch64.neon.vsli.v4i32")
1455         },
1456         "sliq_s64" => Intrinsic {
1457             inputs: vec![v(i(64), 2), v(i(64), 2)],
1458             output: v(i(64), 2),
1459             definition: Named("llvm.aarch64.neon.vsli.v2i64")
1460         },
1461         "sliq_u64" => Intrinsic {
1462             inputs: vec![v(u(64), 2), v(u(64), 2)],
1463             output: v(u(64), 2),
1464             definition: Named("llvm.aarch64.neon.vsli.v2i64")
1465         },
1466         "vqmovn_s16" => Intrinsic {
1467             inputs: vec![v(i(16), 8)],
1468             output: v(i(8), 8),
1469             definition: Named("llvm.aarch64.neon.sqxtn.v8i8")
1470         },
1471         "vqmovn_u16" => Intrinsic {
1472             inputs: vec![v(u(16), 8)],
1473             output: v(u(8), 8),
1474             definition: Named("llvm.aarch64.neon.uqxtn.v8i8")
1475         },
1476         "vqmovn_s32" => Intrinsic {
1477             inputs: vec![v(i(32), 4)],
1478             output: v(i(16), 4),
1479             definition: Named("llvm.aarch64.neon.sqxtn.v4i16")
1480         },
1481         "vqmovn_u32" => Intrinsic {
1482             inputs: vec![v(u(32), 4)],
1483             output: v(u(16), 4),
1484             definition: Named("llvm.aarch64.neon.uqxtn.v4i16")
1485         },
1486         "vqmovn_s64" => Intrinsic {
1487             inputs: vec![v(i(64), 2)],
1488             output: v(i(32), 2),
1489             definition: Named("llvm.aarch64.neon.sqxtn.v2i32")
1490         },
1491         "vqmovn_u64" => Intrinsic {
1492             inputs: vec![v(u(64), 2)],
1493             output: v(u(32), 2),
1494             definition: Named("llvm.aarch64.neon.uqxtn.v2i32")
1495         },
1496         "abs_s8" => Intrinsic {
1497             inputs: vec![v(i(8), 8)],
1498             output: v(i(8), 8),
1499             definition: Named("llvm.aarch64.neon.abs.v8i8")
1500         },
1501         "abs_s16" => Intrinsic {
1502             inputs: vec![v(i(16), 4)],
1503             output: v(i(16), 4),
1504             definition: Named("llvm.aarch64.neon.abs.v4i16")
1505         },
1506         "abs_s32" => Intrinsic {
1507             inputs: vec![v(i(32), 2)],
1508             output: v(i(32), 2),
1509             definition: Named("llvm.aarch64.neon.abs.v2i32")
1510         },
1511         "abs_s64" => Intrinsic {
1512             inputs: vec![v(i(64), 1)],
1513             output: v(i(64), 1),
1514             definition: Named("llvm.aarch64.neon.abs.v1i64")
1515         },
1516         "absq_s8" => Intrinsic {
1517             inputs: vec![v(i(8), 16)],
1518             output: v(i(8), 16),
1519             definition: Named("llvm.aarch64.neon.abs.v16i8")
1520         },
1521         "absq_s16" => Intrinsic {
1522             inputs: vec![v(i(16), 8)],
1523             output: v(i(16), 8),
1524             definition: Named("llvm.aarch64.neon.abs.v8i16")
1525         },
1526         "absq_s32" => Intrinsic {
1527             inputs: vec![v(i(32), 4)],
1528             output: v(i(32), 4),
1529             definition: Named("llvm.aarch64.neon.abs.v4i32")
1530         },
1531         "absq_s64" => Intrinsic {
1532             inputs: vec![v(i(64), 2)],
1533             output: v(i(64), 2),
1534             definition: Named("llvm.aarch64.neon.abs.v2i64")
1535         },
1536         "abs_f32" => Intrinsic {
1537             inputs: vec![v(f(32), 2)],
1538             output: v(f(32), 2),
1539             definition: Named("llvm.fabs.v2f32")
1540         },
1541         "abs_f64" => Intrinsic {
1542             inputs: vec![v(f(64), 1)],
1543             output: v(f(64), 1),
1544             definition: Named("llvm.fabs.v1f64")
1545         },
1546         "absq_f32" => Intrinsic {
1547             inputs: vec![v(f(32), 4)],
1548             output: v(f(32), 4),
1549             definition: Named("llvm.fabs.v4f32")
1550         },
1551         "absq_f64" => Intrinsic {
1552             inputs: vec![v(f(64), 2)],
1553             output: v(f(64), 2),
1554             definition: Named("llvm.fabs.v2f64")
1555         },
1556         "qabs_s8" => Intrinsic {
1557             inputs: vec![v(i(8), 8)],
1558             output: v(i(8), 8),
1559             definition: Named("llvm.aarch64.neon.sqabs.v8i8")
1560         },
1561         "qabs_s16" => Intrinsic {
1562             inputs: vec![v(i(16), 4)],
1563             output: v(i(16), 4),
1564             definition: Named("llvm.aarch64.neon.sqabs.v4i16")
1565         },
1566         "qabs_s32" => Intrinsic {
1567             inputs: vec![v(i(32), 2)],
1568             output: v(i(32), 2),
1569             definition: Named("llvm.aarch64.neon.sqabs.v2i32")
1570         },
1571         "qabs_s64" => Intrinsic {
1572             inputs: vec![v(i(64), 1)],
1573             output: v(i(64), 1),
1574             definition: Named("llvm.aarch64.neon.sqabs.v1i64")
1575         },
1576         "qabsq_s8" => Intrinsic {
1577             inputs: vec![v(i(8), 16)],
1578             output: v(i(8), 16),
1579             definition: Named("llvm.aarch64.neon.sqabs.v16i8")
1580         },
1581         "qabsq_s16" => Intrinsic {
1582             inputs: vec![v(i(16), 8)],
1583             output: v(i(16), 8),
1584             definition: Named("llvm.aarch64.neon.sqabs.v8i16")
1585         },
1586         "qabsq_s32" => Intrinsic {
1587             inputs: vec![v(i(32), 4)],
1588             output: v(i(32), 4),
1589             definition: Named("llvm.aarch64.neon.sqabs.v4i32")
1590         },
1591         "qabsq_s64" => Intrinsic {
1592             inputs: vec![v(i(64), 2)],
1593             output: v(i(64), 2),
1594             definition: Named("llvm.aarch64.neon.sqabs.v2i64")
1595         },
1596         "qneg_s8" => Intrinsic {
1597             inputs: vec![v(i(8), 8)],
1598             output: v(i(8), 8),
1599             definition: Named("llvm.aarch64.neon.sqneg.v8i8")
1600         },
1601         "qneg_s16" => Intrinsic {
1602             inputs: vec![v(i(16), 4)],
1603             output: v(i(16), 4),
1604             definition: Named("llvm.aarch64.neon.sqneg.v4i16")
1605         },
1606         "qneg_s32" => Intrinsic {
1607             inputs: vec![v(i(32), 2)],
1608             output: v(i(32), 2),
1609             definition: Named("llvm.aarch64.neon.sqneg.v2i32")
1610         },
1611         "qneg_s64" => Intrinsic {
1612             inputs: vec![v(i(64), 1)],
1613             output: v(i(64), 1),
1614             definition: Named("llvm.aarch64.neon.sqneg.v1i64")
1615         },
1616         "qnegq_s8" => Intrinsic {
1617             inputs: vec![v(i(8), 16)],
1618             output: v(i(8), 16),
1619             definition: Named("llvm.aarch64.neon.sqneg.v16i8")
1620         },
1621         "qnegq_s16" => Intrinsic {
1622             inputs: vec![v(i(16), 8)],
1623             output: v(i(16), 8),
1624             definition: Named("llvm.aarch64.neon.sqneg.v8i16")
1625         },
1626         "qnegq_s32" => Intrinsic {
1627             inputs: vec![v(i(32), 4)],
1628             output: v(i(32), 4),
1629             definition: Named("llvm.aarch64.neon.sqneg.v4i32")
1630         },
1631         "qnegq_s64" => Intrinsic {
1632             inputs: vec![v(i(64), 2)],
1633             output: v(i(64), 2),
1634             definition: Named("llvm.aarch64.neon.sqneg.v2i64")
1635         },
1636         "clz_s8" => Intrinsic {
1637             inputs: vec![v(i(8), 8)],
1638             output: v(i(8), 8),
1639             definition: Named("llvm.ctlz.v8i8")
1640         },
1641         "clz_u8" => Intrinsic {
1642             inputs: vec![v(u(8), 8)],
1643             output: v(u(8), 8),
1644             definition: Named("llvm.ctlz.v8i8")
1645         },
1646         "clz_s16" => Intrinsic {
1647             inputs: vec![v(i(16), 4)],
1648             output: v(i(16), 4),
1649             definition: Named("llvm.ctlz.v4i16")
1650         },
1651         "clz_u16" => Intrinsic {
1652             inputs: vec![v(u(16), 4)],
1653             output: v(u(16), 4),
1654             definition: Named("llvm.ctlz.v4i16")
1655         },
1656         "clz_s32" => Intrinsic {
1657             inputs: vec![v(i(32), 2)],
1658             output: v(i(32), 2),
1659             definition: Named("llvm.ctlz.v2i32")
1660         },
1661         "clz_u32" => Intrinsic {
1662             inputs: vec![v(u(32), 2)],
1663             output: v(u(32), 2),
1664             definition: Named("llvm.ctlz.v2i32")
1665         },
1666         "clzq_s8" => Intrinsic {
1667             inputs: vec![v(i(8), 16)],
1668             output: v(i(8), 16),
1669             definition: Named("llvm.ctlz.v16i8")
1670         },
1671         "clzq_u8" => Intrinsic {
1672             inputs: vec![v(u(8), 16)],
1673             output: v(u(8), 16),
1674             definition: Named("llvm.ctlz.v16i8")
1675         },
1676         "clzq_s16" => Intrinsic {
1677             inputs: vec![v(i(16), 8)],
1678             output: v(i(16), 8),
1679             definition: Named("llvm.ctlz.v8i16")
1680         },
1681         "clzq_u16" => Intrinsic {
1682             inputs: vec![v(u(16), 8)],
1683             output: v(u(16), 8),
1684             definition: Named("llvm.ctlz.v8i16")
1685         },
1686         "clzq_s32" => Intrinsic {
1687             inputs: vec![v(i(32), 4)],
1688             output: v(i(32), 4),
1689             definition: Named("llvm.ctlz.v4i32")
1690         },
1691         "clzq_u32" => Intrinsic {
1692             inputs: vec![v(u(32), 4)],
1693             output: v(u(32), 4),
1694             definition: Named("llvm.ctlz.v4i32")
1695         },
1696         "cls_s8" => Intrinsic {
1697             inputs: vec![v(i(8), 8)],
1698             output: v(i(8), 8),
1699             definition: Named("llvm.aarch64.neon.cls.v8i8")
1700         },
1701         "cls_u8" => Intrinsic {
1702             inputs: vec![v(u(8), 8)],
1703             output: v(u(8), 8),
1704             definition: Named("llvm.aarch64.neon.cls.v8i8")
1705         },
1706         "cls_s16" => Intrinsic {
1707             inputs: vec![v(i(16), 4)],
1708             output: v(i(16), 4),
1709             definition: Named("llvm.aarch64.neon.cls.v4i16")
1710         },
1711         "cls_u16" => Intrinsic {
1712             inputs: vec![v(u(16), 4)],
1713             output: v(u(16), 4),
1714             definition: Named("llvm.aarch64.neon.cls.v4i16")
1715         },
1716         "cls_s32" => Intrinsic {
1717             inputs: vec![v(i(32), 2)],
1718             output: v(i(32), 2),
1719             definition: Named("llvm.aarch64.neon.cls.v2i32")
1720         },
1721         "cls_u32" => Intrinsic {
1722             inputs: vec![v(u(32), 2)],
1723             output: v(u(32), 2),
1724             definition: Named("llvm.aarch64.neon.cls.v2i32")
1725         },
1726         "clsq_s8" => Intrinsic {
1727             inputs: vec![v(i(8), 16)],
1728             output: v(i(8), 16),
1729             definition: Named("llvm.aarch64.neon.cls.v16i8")
1730         },
1731         "clsq_u8" => Intrinsic {
1732             inputs: vec![v(u(8), 16)],
1733             output: v(u(8), 16),
1734             definition: Named("llvm.aarch64.neon.cls.v16i8")
1735         },
1736         "clsq_s16" => Intrinsic {
1737             inputs: vec![v(i(16), 8)],
1738             output: v(i(16), 8),
1739             definition: Named("llvm.aarch64.neon.cls.v8i16")
1740         },
1741         "clsq_u16" => Intrinsic {
1742             inputs: vec![v(u(16), 8)],
1743             output: v(u(16), 8),
1744             definition: Named("llvm.aarch64.neon.cls.v8i16")
1745         },
1746         "clsq_s32" => Intrinsic {
1747             inputs: vec![v(i(32), 4)],
1748             output: v(i(32), 4),
1749             definition: Named("llvm.aarch64.neon.cls.v4i32")
1750         },
1751         "clsq_u32" => Intrinsic {
1752             inputs: vec![v(u(32), 4)],
1753             output: v(u(32), 4),
1754             definition: Named("llvm.aarch64.neon.cls.v4i32")
1755         },
1756         "cnt_s8" => Intrinsic {
1757             inputs: vec![v(i(8), 8)],
1758             output: v(i(8), 8),
1759             definition: Named("llvm.ctpop.v8i8")
1760         },
1761         "cnt_u8" => Intrinsic {
1762             inputs: vec![v(u(8), 8)],
1763             output: v(u(8), 8),
1764             definition: Named("llvm.ctpop.v8i8")
1765         },
1766         "cntq_s8" => Intrinsic {
1767             inputs: vec![v(i(8), 16)],
1768             output: v(i(8), 16),
1769             definition: Named("llvm.ctpop.v16i8")
1770         },
1771         "cntq_u8" => Intrinsic {
1772             inputs: vec![v(u(8), 16)],
1773             output: v(u(8), 16),
1774             definition: Named("llvm.ctpop.v16i8")
1775         },
1776         "recpe_u32" => Intrinsic {
1777             inputs: vec![v(u(32), 2)],
1778             output: v(u(32), 2),
1779             definition: Named("llvm.aarch64.neon.urecpe.v2i32")
1780         },
1781         "recpe_f32" => Intrinsic {
1782             inputs: vec![v(f(32), 2)],
1783             output: v(f(32), 2),
1784             definition: Named("llvm.aarch64.neon.frecpe.v2f32")
1785         },
1786         "recpe_f64" => Intrinsic {
1787             inputs: vec![v(f(64), 1)],
1788             output: v(f(64), 1),
1789             definition: Named("llvm.aarch64.neon.frecpe.v1f64")
1790         },
1791         "recpeq_u32" => Intrinsic {
1792             inputs: vec![v(u(32), 4)],
1793             output: v(u(32), 4),
1794             definition: Named("llvm.aarch64.neon.urecpe.v4i32")
1795         },
1796         "recpeq_f32" => Intrinsic {
1797             inputs: vec![v(f(32), 4)],
1798             output: v(f(32), 4),
1799             definition: Named("llvm.aarch64.neon.frecpe.v4f32")
1800         },
1801         "recpeq_f64" => Intrinsic {
1802             inputs: vec![v(f(64), 2)],
1803             output: v(f(64), 2),
1804             definition: Named("llvm.aarch64.neon.frecpe.v2f64")
1805         },
1806         "recps_f32" => Intrinsic {
1807             inputs: vec![v(f(32), 2), v(f(32), 2)],
1808             output: v(f(32), 2),
1809             definition: Named("llvm.aarch64.neon.frecps.v2f32")
1810         },
1811         "recps_f64" => Intrinsic {
1812             inputs: vec![v(f(64), 1), v(f(64), 1)],
1813             output: v(f(64), 1),
1814             definition: Named("llvm.aarch64.neon.frecps.v1f64")
1815         },
1816         "recpsq_f32" => Intrinsic {
1817             inputs: vec![v(f(32), 4), v(f(32), 4)],
1818             output: v(f(32), 4),
1819             definition: Named("llvm.aarch64.neon.frecps.v4f32")
1820         },
1821         "recpsq_f64" => Intrinsic {
1822             inputs: vec![v(f(64), 2), v(f(64), 2)],
1823             output: v(f(64), 2),
1824             definition: Named("llvm.aarch64.neon.frecps.v2f64")
1825         },
1826         "sqrt_f32" => Intrinsic {
1827             inputs: vec![v(f(32), 2)],
1828             output: v(f(32), 2),
1829             definition: Named("llvm.sqrt.v2f32")
1830         },
1831         "sqrt_f64" => Intrinsic {
1832             inputs: vec![v(f(64), 1)],
1833             output: v(f(64), 1),
1834             definition: Named("llvm.sqrt.v1f64")
1835         },
1836         "sqrtq_f32" => Intrinsic {
1837             inputs: vec![v(f(32), 4)],
1838             output: v(f(32), 4),
1839             definition: Named("llvm.sqrt.v4f32")
1840         },
1841         "sqrtq_f64" => Intrinsic {
1842             inputs: vec![v(f(64), 2)],
1843             output: v(f(64), 2),
1844             definition: Named("llvm.sqrt.v2f64")
1845         },
1846         "rsqrte_u32" => Intrinsic {
1847             inputs: vec![v(u(32), 2)],
1848             output: v(u(32), 2),
1849             definition: Named("llvm.aarch64.neon.ursqrte.v2i32")
1850         },
1851         "rsqrte_f32" => Intrinsic {
1852             inputs: vec![v(f(32), 2)],
1853             output: v(f(32), 2),
1854             definition: Named("llvm.aarch64.neon.frsqrte.v2f32")
1855         },
1856         "rsqrte_f64" => Intrinsic {
1857             inputs: vec![v(f(64), 1)],
1858             output: v(f(64), 1),
1859             definition: Named("llvm.aarch64.neon.frsqrte.v1f64")
1860         },
1861         "rsqrteq_u32" => Intrinsic {
1862             inputs: vec![v(u(32), 4)],
1863             output: v(u(32), 4),
1864             definition: Named("llvm.aarch64.neon.ursqrte.v4i32")
1865         },
1866         "rsqrteq_f32" => Intrinsic {
1867             inputs: vec![v(f(32), 4)],
1868             output: v(f(32), 4),
1869             definition: Named("llvm.aarch64.neon.frsqrte.v4f32")
1870         },
1871         "rsqrteq_f64" => Intrinsic {
1872             inputs: vec![v(f(64), 2)],
1873             output: v(f(64), 2),
1874             definition: Named("llvm.aarch64.neon.frsqrte.v2f64")
1875         },
1876         "rsqrts_f32" => Intrinsic {
1877             inputs: vec![v(f(32), 2), v(f(32), 2)],
1878             output: v(f(32), 2),
1879             definition: Named("llvm.aarch64.neon.frsqrts.v2f32")
1880         },
1881         "rsqrts_f64" => Intrinsic {
1882             inputs: vec![v(f(64), 1), v(f(64), 1)],
1883             output: v(f(64), 1),
1884             definition: Named("llvm.aarch64.neon.frsqrts.v1f64")
1885         },
1886         "rsqrtsq_f32" => Intrinsic {
1887             inputs: vec![v(f(32), 4), v(f(32), 4)],
1888             output: v(f(32), 4),
1889             definition: Named("llvm.aarch64.neon.frsqrts.v4f32")
1890         },
1891         "rsqrtsq_f64" => Intrinsic {
1892             inputs: vec![v(f(64), 2), v(f(64), 2)],
1893             output: v(f(64), 2),
1894             definition: Named("llvm.aarch64.neon.frsqrts.v2f64")
1895         },
1896         "rbit_s8" => Intrinsic {
1897             inputs: vec![v(i(8), 8)],
1898             output: v(i(8), 8),
1899             definition: Named("llvm.aarch64.neon.rbit.v8i8")
1900         },
1901         "rbit_u8" => Intrinsic {
1902             inputs: vec![v(u(8), 8)],
1903             output: v(u(8), 8),
1904             definition: Named("llvm.aarch64.neon.rbit.v8i8")
1905         },
1906         "rbitq_s8" => Intrinsic {
1907             inputs: vec![v(i(8), 16)],
1908             output: v(i(8), 16),
1909             definition: Named("llvm.aarch64.neon.rbit.v16i8")
1910         },
1911         "rbitq_u8" => Intrinsic {
1912             inputs: vec![v(u(8), 16)],
1913             output: v(u(8), 16),
1914             definition: Named("llvm.aarch64.neon.rbit.v16i8")
1915         },
1916         "ld2_s8" => Intrinsic {
1917             inputs: vec![p(true, i(8), Some(v(i(8), 8)))],
1918             output: agg(false, vec![v(i(8), 8), v(i(8), 8)]),
1919             definition: Named("llvm.aarch64.neon.ld2.v8i8.p0v8i8")
1920         },
1921         "ld2_u8" => Intrinsic {
1922             inputs: vec![p(true, u(8), Some(v(u(8), 8)))],
1923             output: agg(false, vec![v(u(8), 8), v(u(8), 8)]),
1924             definition: Named("llvm.aarch64.neon.ld2.v8i8.p0v8i8")
1925         },
1926         "ld2_s16" => Intrinsic {
1927             inputs: vec![p(true, i(16), Some(v(i(16), 4)))],
1928             output: agg(false, vec![v(i(16), 4), v(i(16), 4)]),
1929             definition: Named("llvm.aarch64.neon.ld2.v4i16.p0v4i16")
1930         },
1931         "ld2_u16" => Intrinsic {
1932             inputs: vec![p(true, u(16), Some(v(u(16), 4)))],
1933             output: agg(false, vec![v(u(16), 4), v(u(16), 4)]),
1934             definition: Named("llvm.aarch64.neon.ld2.v4i16.p0v4i16")
1935         },
1936         "ld2_s32" => Intrinsic {
1937             inputs: vec![p(true, i(32), Some(v(i(32), 2)))],
1938             output: agg(false, vec![v(i(32), 2), v(i(32), 2)]),
1939             definition: Named("llvm.aarch64.neon.ld2.v2i32.p0v2i32")
1940         },
1941         "ld2_u32" => Intrinsic {
1942             inputs: vec![p(true, u(32), Some(v(u(32), 2)))],
1943             output: agg(false, vec![v(u(32), 2), v(u(32), 2)]),
1944             definition: Named("llvm.aarch64.neon.ld2.v2i32.p0v2i32")
1945         },
1946         "ld2_s64" => Intrinsic {
1947             inputs: vec![p(true, i(64), Some(v(i(64), 1)))],
1948             output: agg(false, vec![v(i(64), 1), v(i(64), 1)]),
1949             definition: Named("llvm.aarch64.neon.ld2.v1i64.p0v1i64")
1950         },
1951         "ld2_u64" => Intrinsic {
1952             inputs: vec![p(true, u(64), Some(v(u(64), 1)))],
1953             output: agg(false, vec![v(u(64), 1), v(u(64), 1)]),
1954             definition: Named("llvm.aarch64.neon.ld2.v1i64.p0v1i64")
1955         },
1956         "ld2_f32" => Intrinsic {
1957             inputs: vec![p(true, f(32), Some(v(f(32), 2)))],
1958             output: agg(false, vec![v(f(32), 2), v(f(32), 2)]),
1959             definition: Named("llvm.aarch64.neon.ld2.v2f32.p0v2f32")
1960         },
1961         "ld2_f64" => Intrinsic {
1962             inputs: vec![p(true, f(64), Some(v(f(64), 1)))],
1963             output: agg(false, vec![v(f(64), 1), v(f(64), 1)]),
1964             definition: Named("llvm.aarch64.neon.ld2.v1f64.p0v1f64")
1965         },
1966         "ld2q_s8" => Intrinsic {
1967             inputs: vec![p(true, i(8), Some(v(i(8), 16)))],
1968             output: agg(false, vec![v(i(8), 16), v(i(8), 16)]),
1969             definition: Named("llvm.aarch64.neon.ld2.v16i8.p0v16i8")
1970         },
1971         "ld2q_u8" => Intrinsic {
1972             inputs: vec![p(true, u(8), Some(v(u(8), 16)))],
1973             output: agg(false, vec![v(u(8), 16), v(u(8), 16)]),
1974             definition: Named("llvm.aarch64.neon.ld2.v16i8.p0v16i8")
1975         },
1976         "ld2q_s16" => Intrinsic {
1977             inputs: vec![p(true, i(16), Some(v(i(16), 8)))],
1978             output: agg(false, vec![v(i(16), 8), v(i(16), 8)]),
1979             definition: Named("llvm.aarch64.neon.ld2.v8i16.p0v8i16")
1980         },
1981         "ld2q_u16" => Intrinsic {
1982             inputs: vec![p(true, u(16), Some(v(u(16), 8)))],
1983             output: agg(false, vec![v(u(16), 8), v(u(16), 8)]),
1984             definition: Named("llvm.aarch64.neon.ld2.v8i16.p0v8i16")
1985         },
1986         "ld2q_s32" => Intrinsic {
1987             inputs: vec![p(true, i(32), Some(v(i(32), 4)))],
1988             output: agg(false, vec![v(i(32), 4), v(i(32), 4)]),
1989             definition: Named("llvm.aarch64.neon.ld2.v4i32.p0v4i32")
1990         },
1991         "ld2q_u32" => Intrinsic {
1992             inputs: vec![p(true, u(32), Some(v(u(32), 4)))],
1993             output: agg(false, vec![v(u(32), 4), v(u(32), 4)]),
1994             definition: Named("llvm.aarch64.neon.ld2.v4i32.p0v4i32")
1995         },
1996         "ld2q_s64" => Intrinsic {
1997             inputs: vec![p(true, i(64), Some(v(i(64), 2)))],
1998             output: agg(false, vec![v(i(64), 2), v(i(64), 2)]),
1999             definition: Named("llvm.aarch64.neon.ld2.v2i64.p0v2i64")
2000         },
2001         "ld2q_u64" => Intrinsic {
2002             inputs: vec![p(true, u(64), Some(v(u(64), 2)))],
2003             output: agg(false, vec![v(u(64), 2), v(u(64), 2)]),
2004             definition: Named("llvm.aarch64.neon.ld2.v2i64.p0v2i64")
2005         },
2006         "ld2q_f32" => Intrinsic {
2007             inputs: vec![p(true, f(32), Some(v(f(32), 4)))],
2008             output: agg(false, vec![v(f(32), 4), v(f(32), 4)]),
2009             definition: Named("llvm.aarch64.neon.ld2.v4f32.p0v4f32")
2010         },
2011         "ld2q_f64" => Intrinsic {
2012             inputs: vec![p(true, f(64), Some(v(f(64), 2)))],
2013             output: agg(false, vec![v(f(64), 2), v(f(64), 2)]),
2014             definition: Named("llvm.aarch64.neon.ld2.v2f64.p0v2f64")
2015         },
2016         "ld3_s8" => Intrinsic {
2017             inputs: vec![p(true, i(8), Some(v(i(8), 8)))],
2018             output: agg(false, vec![v(i(8), 8), v(i(8), 8), v(i(8), 8)]),
2019             definition: Named("llvm.aarch64.neon.ld3.v8i8.p0v8i8")
2020         },
2021         "ld3_u8" => Intrinsic {
2022             inputs: vec![p(true, u(8), Some(v(u(8), 8)))],
2023             output: agg(false, vec![v(u(8), 8), v(u(8), 8), v(u(8), 8)]),
2024             definition: Named("llvm.aarch64.neon.ld3.v8i8.p0v8i8")
2025         },
2026         "ld3_s16" => Intrinsic {
2027             inputs: vec![p(true, i(16), Some(v(i(16), 4)))],
2028             output: agg(false, vec![v(i(16), 4), v(i(16), 4), v(i(16), 4)]),
2029             definition: Named("llvm.aarch64.neon.ld3.v4i16.p0v4i16")
2030         },
2031         "ld3_u16" => Intrinsic {
2032             inputs: vec![p(true, u(16), Some(v(u(16), 4)))],
2033             output: agg(false, vec![v(u(16), 4), v(u(16), 4), v(u(16), 4)]),
2034             definition: Named("llvm.aarch64.neon.ld3.v4i16.p0v4i16")
2035         },
2036         "ld3_s32" => Intrinsic {
2037             inputs: vec![p(true, i(32), Some(v(i(32), 2)))],
2038             output: agg(false, vec![v(i(32), 2), v(i(32), 2), v(i(32), 2)]),
2039             definition: Named("llvm.aarch64.neon.ld3.v2i32.p0v2i32")
2040         },
2041         "ld3_u32" => Intrinsic {
2042             inputs: vec![p(true, u(32), Some(v(u(32), 2)))],
2043             output: agg(false, vec![v(u(32), 2), v(u(32), 2), v(u(32), 2)]),
2044             definition: Named("llvm.aarch64.neon.ld3.v2i32.p0v2i32")
2045         },
2046         "ld3_s64" => Intrinsic {
2047             inputs: vec![p(true, i(64), Some(v(i(64), 1)))],
2048             output: agg(false, vec![v(i(64), 1), v(i(64), 1), v(i(64), 1)]),
2049             definition: Named("llvm.aarch64.neon.ld3.v1i64.p0v1i64")
2050         },
2051         "ld3_u64" => Intrinsic {
2052             inputs: vec![p(true, u(64), Some(v(u(64), 1)))],
2053             output: agg(false, vec![v(u(64), 1), v(u(64), 1), v(u(64), 1)]),
2054             definition: Named("llvm.aarch64.neon.ld3.v1i64.p0v1i64")
2055         },
2056         "ld3_f32" => Intrinsic {
2057             inputs: vec![p(true, f(32), Some(v(f(32), 2)))],
2058             output: agg(false, vec![v(f(32), 2), v(f(32), 2), v(f(32), 2)]),
2059             definition: Named("llvm.aarch64.neon.ld3.v2f32.p0v2f32")
2060         },
2061         "ld3_f64" => Intrinsic {
2062             inputs: vec![p(true, f(64), Some(v(f(64), 1)))],
2063             output: agg(false, vec![v(f(64), 1), v(f(64), 1), v(f(64), 1)]),
2064             definition: Named("llvm.aarch64.neon.ld3.v1f64.p0v1f64")
2065         },
2066         "ld3q_s8" => Intrinsic {
2067             inputs: vec![p(true, i(8), Some(v(i(8), 16)))],
2068             output: agg(false, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16)]),
2069             definition: Named("llvm.aarch64.neon.ld3.v16i8.p0v16i8")
2070         },
2071         "ld3q_u8" => Intrinsic {
2072             inputs: vec![p(true, u(8), Some(v(u(8), 16)))],
2073             output: agg(false, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16)]),
2074             definition: Named("llvm.aarch64.neon.ld3.v16i8.p0v16i8")
2075         },
2076         "ld3q_s16" => Intrinsic {
2077             inputs: vec![p(true, i(16), Some(v(i(16), 8)))],
2078             output: agg(false, vec![v(i(16), 8), v(i(16), 8), v(i(16), 8)]),
2079             definition: Named("llvm.aarch64.neon.ld3.v8i16.p0v8i16")
2080         },
2081         "ld3q_u16" => Intrinsic {
2082             inputs: vec![p(true, u(16), Some(v(u(16), 8)))],
2083             output: agg(false, vec![v(u(16), 8), v(u(16), 8), v(u(16), 8)]),
2084             definition: Named("llvm.aarch64.neon.ld3.v8i16.p0v8i16")
2085         },
2086         "ld3q_s32" => Intrinsic {
2087             inputs: vec![p(true, i(32), Some(v(i(32), 4)))],
2088             output: agg(false, vec![v(i(32), 4), v(i(32), 4), v(i(32), 4)]),
2089             definition: Named("llvm.aarch64.neon.ld3.v4i32.p0v4i32")
2090         },
2091         "ld3q_u32" => Intrinsic {
2092             inputs: vec![p(true, u(32), Some(v(u(32), 4)))],
2093             output: agg(false, vec![v(u(32), 4), v(u(32), 4), v(u(32), 4)]),
2094             definition: Named("llvm.aarch64.neon.ld3.v4i32.p0v4i32")
2095         },
2096         "ld3q_s64" => Intrinsic {
2097             inputs: vec![p(true, i(64), Some(v(i(64), 2)))],
2098             output: agg(false, vec![v(i(64), 2), v(i(64), 2), v(i(64), 2)]),
2099             definition: Named("llvm.aarch64.neon.ld3.v2i64.p0v2i64")
2100         },
2101         "ld3q_u64" => Intrinsic {
2102             inputs: vec![p(true, u(64), Some(v(u(64), 2)))],
2103             output: agg(false, vec![v(u(64), 2), v(u(64), 2), v(u(64), 2)]),
2104             definition: Named("llvm.aarch64.neon.ld3.v2i64.p0v2i64")
2105         },
2106         "ld3q_f32" => Intrinsic {
2107             inputs: vec![p(true, f(32), Some(v(f(32), 4)))],
2108             output: agg(false, vec![v(f(32), 4), v(f(32), 4), v(f(32), 4)]),
2109             definition: Named("llvm.aarch64.neon.ld3.v4f32.p0v4f32")
2110         },
2111         "ld3q_f64" => Intrinsic {
2112             inputs: vec![p(true, f(64), Some(v(f(64), 2)))],
2113             output: agg(false, vec![v(f(64), 2), v(f(64), 2), v(f(64), 2)]),
2114             definition: Named("llvm.aarch64.neon.ld3.v2f64.p0v2f64")
2115         },
2116         "ld4_s8" => Intrinsic {
2117             inputs: vec![p(true, i(8), Some(v(i(8), 8)))],
2118             output: agg(false, vec![v(i(8), 8), v(i(8), 8), v(i(8), 8), v(i(8), 8)]),
2119             definition: Named("llvm.aarch64.neon.ld4.v8i8.p0v8i8")
2120         },
2121         "ld4_u8" => Intrinsic {
2122             inputs: vec![p(true, u(8), Some(v(u(8), 8)))],
2123             output: agg(false, vec![v(u(8), 8), v(u(8), 8), v(u(8), 8), v(u(8), 8)]),
2124             definition: Named("llvm.aarch64.neon.ld4.v8i8.p0v8i8")
2125         },
2126         "ld4_s16" => Intrinsic {
2127             inputs: vec![p(true, i(16), Some(v(i(16), 4)))],
2128             output: agg(false, vec![v(i(16), 4), v(i(16), 4), v(i(16), 4), v(i(16), 4)]),
2129             definition: Named("llvm.aarch64.neon.ld4.v4i16.p0v4i16")
2130         },
2131         "ld4_u16" => Intrinsic {
2132             inputs: vec![p(true, u(16), Some(v(u(16), 4)))],
2133             output: agg(false, vec![v(u(16), 4), v(u(16), 4), v(u(16), 4), v(u(16), 4)]),
2134             definition: Named("llvm.aarch64.neon.ld4.v4i16.p0v4i16")
2135         },
2136         "ld4_s32" => Intrinsic {
2137             inputs: vec![p(true, i(32), Some(v(i(32), 2)))],
2138             output: agg(false, vec![v(i(32), 2), v(i(32), 2), v(i(32), 2), v(i(32), 2)]),
2139             definition: Named("llvm.aarch64.neon.ld4.v2i32.p0v2i32")
2140         },
2141         "ld4_u32" => Intrinsic {
2142             inputs: vec![p(true, u(32), Some(v(u(32), 2)))],
2143             output: agg(false, vec![v(u(32), 2), v(u(32), 2), v(u(32), 2), v(u(32), 2)]),
2144             definition: Named("llvm.aarch64.neon.ld4.v2i32.p0v2i32")
2145         },
2146         "ld4_s64" => Intrinsic {
2147             inputs: vec![p(true, i(64), Some(v(i(64), 1)))],
2148             output: agg(false, vec![v(i(64), 1), v(i(64), 1), v(i(64), 1), v(i(64), 1)]),
2149             definition: Named("llvm.aarch64.neon.ld4.v1i64.p0v1i64")
2150         },
2151         "ld4_u64" => Intrinsic {
2152             inputs: vec![p(true, u(64), Some(v(u(64), 1)))],
2153             output: agg(false, vec![v(u(64), 1), v(u(64), 1), v(u(64), 1), v(u(64), 1)]),
2154             definition: Named("llvm.aarch64.neon.ld4.v1i64.p0v1i64")
2155         },
2156         "ld4_f32" => Intrinsic {
2157             inputs: vec![p(true, f(32), Some(v(f(32), 2)))],
2158             output: agg(false, vec![v(f(32), 2), v(f(32), 2), v(f(32), 2), v(f(32), 2)]),
2159             definition: Named("llvm.aarch64.neon.ld4.v2f32.p0v2f32")
2160         },
2161         "ld4_f64" => Intrinsic {
2162             inputs: vec![p(true, f(64), Some(v(f(64), 1)))],
2163             output: agg(false, vec![v(f(64), 1), v(f(64), 1), v(f(64), 1), v(f(64), 1)]),
2164             definition: Named("llvm.aarch64.neon.ld4.v1f64.p0v1f64")
2165         },
2166         "ld4q_s8" => Intrinsic {
2167             inputs: vec![p(true, i(8), Some(v(i(8), 16)))],
2168             output: agg(false, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16), v(i(8), 16)]),
2169             definition: Named("llvm.aarch64.neon.ld4.v16i8.p0v16i8")
2170         },
2171         "ld4q_u8" => Intrinsic {
2172             inputs: vec![p(true, u(8), Some(v(u(8), 16)))],
2173             output: agg(false, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16), v(u(8), 16)]),
2174             definition: Named("llvm.aarch64.neon.ld4.v16i8.p0v16i8")
2175         },
2176         "ld4q_s16" => Intrinsic {
2177             inputs: vec![p(true, i(16), Some(v(i(16), 8)))],
2178             output: agg(false, vec![v(i(16), 8), v(i(16), 8), v(i(16), 8), v(i(16), 8)]),
2179             definition: Named("llvm.aarch64.neon.ld4.v8i16.p0v8i16")
2180         },
2181         "ld4q_u16" => Intrinsic {
2182             inputs: vec![p(true, u(16), Some(v(u(16), 8)))],
2183             output: agg(false, vec![v(u(16), 8), v(u(16), 8), v(u(16), 8), v(u(16), 8)]),
2184             definition: Named("llvm.aarch64.neon.ld4.v8i16.p0v8i16")
2185         },
2186         "ld4q_s32" => Intrinsic {
2187             inputs: vec![p(true, i(32), Some(v(i(32), 4)))],
2188             output: agg(false, vec![v(i(32), 4), v(i(32), 4), v(i(32), 4), v(i(32), 4)]),
2189             definition: Named("llvm.aarch64.neon.ld4.v4i32.p0v4i32")
2190         },
2191         "ld4q_u32" => Intrinsic {
2192             inputs: vec![p(true, u(32), Some(v(u(32), 4)))],
2193             output: agg(false, vec![v(u(32), 4), v(u(32), 4), v(u(32), 4), v(u(32), 4)]),
2194             definition: Named("llvm.aarch64.neon.ld4.v4i32.p0v4i32")
2195         },
2196         "ld4q_s64" => Intrinsic {
2197             inputs: vec![p(true, i(64), Some(v(i(64), 2)))],
2198             output: agg(false, vec![v(i(64), 2), v(i(64), 2), v(i(64), 2), v(i(64), 2)]),
2199             definition: Named("llvm.aarch64.neon.ld4.v2i64.p0v2i64")
2200         },
2201         "ld4q_u64" => Intrinsic {
2202             inputs: vec![p(true, u(64), Some(v(u(64), 2)))],
2203             output: agg(false, vec![v(u(64), 2), v(u(64), 2), v(u(64), 2), v(u(64), 2)]),
2204             definition: Named("llvm.aarch64.neon.ld4.v2i64.p0v2i64")
2205         },
2206         "ld4q_f32" => Intrinsic {
2207             inputs: vec![p(true, f(32), Some(v(f(32), 4)))],
2208             output: agg(false, vec![v(f(32), 4), v(f(32), 4), v(f(32), 4), v(f(32), 4)]),
2209             definition: Named("llvm.aarch64.neon.ld4.v4f32.p0v4f32")
2210         },
2211         "ld4q_f64" => Intrinsic {
2212             inputs: vec![p(true, f(64), Some(v(f(64), 2)))],
2213             output: agg(false, vec![v(f(64), 2), v(f(64), 2), v(f(64), 2), v(f(64), 2)]),
2214             definition: Named("llvm.aarch64.neon.ld4.v2f64.p0v2f64")
2215         },
2216         "ld2_dup_s8" => Intrinsic {
2217             inputs: vec![p(true, i(8), None)],
2218             output: agg(false, vec![v(i(8), 8), v(i(8), 8)]),
2219             definition: Named("llvm.aarch64.neon.ld2.v8i8.p0i8")
2220         },
2221         "ld2_dup_u8" => Intrinsic {
2222             inputs: vec![p(true, u(8), None)],
2223             output: agg(false, vec![v(u(8), 8), v(u(8), 8)]),
2224             definition: Named("llvm.aarch64.neon.ld2.v8i8.p0i8")
2225         },
2226         "ld2_dup_s16" => Intrinsic {
2227             inputs: vec![p(true, i(16), None)],
2228             output: agg(false, vec![v(i(16), 4), v(i(16), 4)]),
2229             definition: Named("llvm.aarch64.neon.ld2.v4i16.p0i16")
2230         },
2231         "ld2_dup_u16" => Intrinsic {
2232             inputs: vec![p(true, u(16), None)],
2233             output: agg(false, vec![v(u(16), 4), v(u(16), 4)]),
2234             definition: Named("llvm.aarch64.neon.ld2.v4i16.p0i16")
2235         },
2236         "ld2_dup_s32" => Intrinsic {
2237             inputs: vec![p(true, i(32), None)],
2238             output: agg(false, vec![v(i(32), 2), v(i(32), 2)]),
2239             definition: Named("llvm.aarch64.neon.ld2.v2i32.p0i32")
2240         },
2241         "ld2_dup_u32" => Intrinsic {
2242             inputs: vec![p(true, u(32), None)],
2243             output: agg(false, vec![v(u(32), 2), v(u(32), 2)]),
2244             definition: Named("llvm.aarch64.neon.ld2.v2i32.p0i32")
2245         },
2246         "ld2_dup_s64" => Intrinsic {
2247             inputs: vec![p(true, i(64), None)],
2248             output: agg(false, vec![v(i(64), 1), v(i(64), 1)]),
2249             definition: Named("llvm.aarch64.neon.ld2.v1i64.p0i64")
2250         },
2251         "ld2_dup_u64" => Intrinsic {
2252             inputs: vec![p(true, u(64), None)],
2253             output: agg(false, vec![v(u(64), 1), v(u(64), 1)]),
2254             definition: Named("llvm.aarch64.neon.ld2.v1i64.p0i64")
2255         },
2256         "ld2_dup_f32" => Intrinsic {
2257             inputs: vec![p(true, f(32), None)],
2258             output: agg(false, vec![v(f(32), 2), v(f(32), 2)]),
2259             definition: Named("llvm.aarch64.neon.ld2.v2f32.p0f32")
2260         },
2261         "ld2_dup_f64" => Intrinsic {
2262             inputs: vec![p(true, f(64), None)],
2263             output: agg(false, vec![v(f(64), 1), v(f(64), 1)]),
2264             definition: Named("llvm.aarch64.neon.ld2.v1f64.p0f64")
2265         },
2266         "ld2q_dup_s8" => Intrinsic {
2267             inputs: vec![p(true, i(8), None)],
2268             output: agg(false, vec![v(i(8), 16), v(i(8), 16)]),
2269             definition: Named("llvm.aarch64.neon.ld2.v16i8.p0i8")
2270         },
2271         "ld2q_dup_u8" => Intrinsic {
2272             inputs: vec![p(true, u(8), None)],
2273             output: agg(false, vec![v(u(8), 16), v(u(8), 16)]),
2274             definition: Named("llvm.aarch64.neon.ld2.v16i8.p0i8")
2275         },
2276         "ld2q_dup_s16" => Intrinsic {
2277             inputs: vec![p(true, i(16), None)],
2278             output: agg(false, vec![v(i(16), 8), v(i(16), 8)]),
2279             definition: Named("llvm.aarch64.neon.ld2.v8i16.p0i16")
2280         },
2281         "ld2q_dup_u16" => Intrinsic {
2282             inputs: vec![p(true, u(16), None)],
2283             output: agg(false, vec![v(u(16), 8), v(u(16), 8)]),
2284             definition: Named("llvm.aarch64.neon.ld2.v8i16.p0i16")
2285         },
2286         "ld2q_dup_s32" => Intrinsic {
2287             inputs: vec![p(true, i(32), None)],
2288             output: agg(false, vec![v(i(32), 4), v(i(32), 4)]),
2289             definition: Named("llvm.aarch64.neon.ld2.v4i32.p0i32")
2290         },
2291         "ld2q_dup_u32" => Intrinsic {
2292             inputs: vec![p(true, u(32), None)],
2293             output: agg(false, vec![v(u(32), 4), v(u(32), 4)]),
2294             definition: Named("llvm.aarch64.neon.ld2.v4i32.p0i32")
2295         },
2296         "ld2q_dup_s64" => Intrinsic {
2297             inputs: vec![p(true, i(64), None)],
2298             output: agg(false, vec![v(i(64), 2), v(i(64), 2)]),
2299             definition: Named("llvm.aarch64.neon.ld2.v2i64.p0i64")
2300         },
2301         "ld2q_dup_u64" => Intrinsic {
2302             inputs: vec![p(true, u(64), None)],
2303             output: agg(false, vec![v(u(64), 2), v(u(64), 2)]),
2304             definition: Named("llvm.aarch64.neon.ld2.v2i64.p0i64")
2305         },
2306         "ld2q_dup_f32" => Intrinsic {
2307             inputs: vec![p(true, f(32), None)],
2308             output: agg(false, vec![v(f(32), 4), v(f(32), 4)]),
2309             definition: Named("llvm.aarch64.neon.ld2.v4f32.p0f32")
2310         },
2311         "ld2q_dup_f64" => Intrinsic {
2312             inputs: vec![p(true, f(64), None)],
2313             output: agg(false, vec![v(f(64), 2), v(f(64), 2)]),
2314             definition: Named("llvm.aarch64.neon.ld2.v2f64.p0f64")
2315         },
2316         "ld3_dup_s8" => Intrinsic {
2317             inputs: vec![p(true, i(8), None)],
2318             output: agg(false, vec![v(i(8), 8), v(i(8), 8), v(i(8), 8)]),
2319             definition: Named("llvm.aarch64.neon.ld3.v8i8.p0i8")
2320         },
2321         "ld3_dup_u8" => Intrinsic {
2322             inputs: vec![p(true, u(8), None)],
2323             output: agg(false, vec![v(u(8), 8), v(u(8), 8), v(u(8), 8)]),
2324             definition: Named("llvm.aarch64.neon.ld3.v8i8.p0i8")
2325         },
2326         "ld3_dup_s16" => Intrinsic {
2327             inputs: vec![p(true, i(16), None)],
2328             output: agg(false, vec![v(i(16), 4), v(i(16), 4), v(i(16), 4)]),
2329             definition: Named("llvm.aarch64.neon.ld3.v4i16.p0i16")
2330         },
2331         "ld3_dup_u16" => Intrinsic {
2332             inputs: vec![p(true, u(16), None)],
2333             output: agg(false, vec![v(u(16), 4), v(u(16), 4), v(u(16), 4)]),
2334             definition: Named("llvm.aarch64.neon.ld3.v4i16.p0i16")
2335         },
2336         "ld3_dup_s32" => Intrinsic {
2337             inputs: vec![p(true, i(32), None)],
2338             output: agg(false, vec![v(i(32), 2), v(i(32), 2), v(i(32), 2)]),
2339             definition: Named("llvm.aarch64.neon.ld3.v2i32.p0i32")
2340         },
2341         "ld3_dup_u32" => Intrinsic {
2342             inputs: vec![p(true, u(32), None)],
2343             output: agg(false, vec![v(u(32), 2), v(u(32), 2), v(u(32), 2)]),
2344             definition: Named("llvm.aarch64.neon.ld3.v2i32.p0i32")
2345         },
2346         "ld3_dup_s64" => Intrinsic {
2347             inputs: vec![p(true, i(64), None)],
2348             output: agg(false, vec![v(i(64), 1), v(i(64), 1), v(i(64), 1)]),
2349             definition: Named("llvm.aarch64.neon.ld3.v1i64.p0i64")
2350         },
2351         "ld3_dup_u64" => Intrinsic {
2352             inputs: vec![p(true, u(64), None)],
2353             output: agg(false, vec![v(u(64), 1), v(u(64), 1), v(u(64), 1)]),
2354             definition: Named("llvm.aarch64.neon.ld3.v1i64.p0i64")
2355         },
2356         "ld3_dup_f32" => Intrinsic {
2357             inputs: vec![p(true, f(32), None)],
2358             output: agg(false, vec![v(f(32), 2), v(f(32), 2), v(f(32), 2)]),
2359             definition: Named("llvm.aarch64.neon.ld3.v2f32.p0f32")
2360         },
2361         "ld3_dup_f64" => Intrinsic {
2362             inputs: vec![p(true, f(64), None)],
2363             output: agg(false, vec![v(f(64), 1), v(f(64), 1), v(f(64), 1)]),
2364             definition: Named("llvm.aarch64.neon.ld3.v1f64.p0f64")
2365         },
2366         "ld3q_dup_s8" => Intrinsic {
2367             inputs: vec![p(true, i(8), None)],
2368             output: agg(false, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16)]),
2369             definition: Named("llvm.aarch64.neon.ld3.v16i8.p0i8")
2370         },
2371         "ld3q_dup_u8" => Intrinsic {
2372             inputs: vec![p(true, u(8), None)],
2373             output: agg(false, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16)]),
2374             definition: Named("llvm.aarch64.neon.ld3.v16i8.p0i8")
2375         },
2376         "ld3q_dup_s16" => Intrinsic {
2377             inputs: vec![p(true, i(16), None)],
2378             output: agg(false, vec![v(i(16), 8), v(i(16), 8), v(i(16), 8)]),
2379             definition: Named("llvm.aarch64.neon.ld3.v8i16.p0i16")
2380         },
2381         "ld3q_dup_u16" => Intrinsic {
2382             inputs: vec![p(true, u(16), None)],
2383             output: agg(false, vec![v(u(16), 8), v(u(16), 8), v(u(16), 8)]),
2384             definition: Named("llvm.aarch64.neon.ld3.v8i16.p0i16")
2385         },
2386         "ld3q_dup_s32" => Intrinsic {
2387             inputs: vec![p(true, i(32), None)],
2388             output: agg(false, vec![v(i(32), 4), v(i(32), 4), v(i(32), 4)]),
2389             definition: Named("llvm.aarch64.neon.ld3.v4i32.p0i32")
2390         },
2391         "ld3q_dup_u32" => Intrinsic {
2392             inputs: vec![p(true, u(32), None)],
2393             output: agg(false, vec![v(u(32), 4), v(u(32), 4), v(u(32), 4)]),
2394             definition: Named("llvm.aarch64.neon.ld3.v4i32.p0i32")
2395         },
2396         "ld3q_dup_s64" => Intrinsic {
2397             inputs: vec![p(true, i(64), None)],
2398             output: agg(false, vec![v(i(64), 2), v(i(64), 2), v(i(64), 2)]),
2399             definition: Named("llvm.aarch64.neon.ld3.v2i64.p0i64")
2400         },
2401         "ld3q_dup_u64" => Intrinsic {
2402             inputs: vec![p(true, u(64), None)],
2403             output: agg(false, vec![v(u(64), 2), v(u(64), 2), v(u(64), 2)]),
2404             definition: Named("llvm.aarch64.neon.ld3.v2i64.p0i64")
2405         },
2406         "ld3q_dup_f32" => Intrinsic {
2407             inputs: vec![p(true, f(32), None)],
2408             output: agg(false, vec![v(f(32), 4), v(f(32), 4), v(f(32), 4)]),
2409             definition: Named("llvm.aarch64.neon.ld3.v4f32.p0f32")
2410         },
2411         "ld3q_dup_f64" => Intrinsic {
2412             inputs: vec![p(true, f(64), None)],
2413             output: agg(false, vec![v(f(64), 2), v(f(64), 2), v(f(64), 2)]),
2414             definition: Named("llvm.aarch64.neon.ld3.v2f64.p0f64")
2415         },
2416         "ld4_dup_s8" => Intrinsic {
2417             inputs: vec![p(true, i(8), None)],
2418             output: agg(false, vec![v(i(8), 8), v(i(8), 8), v(i(8), 8), v(i(8), 8)]),
2419             definition: Named("llvm.aarch64.neon.ld4.v8i8.p0i8")
2420         },
2421         "ld4_dup_u8" => Intrinsic {
2422             inputs: vec![p(true, u(8), None)],
2423             output: agg(false, vec![v(u(8), 8), v(u(8), 8), v(u(8), 8), v(u(8), 8)]),
2424             definition: Named("llvm.aarch64.neon.ld4.v8i8.p0i8")
2425         },
2426         "ld4_dup_s16" => Intrinsic {
2427             inputs: vec![p(true, i(16), None)],
2428             output: agg(false, vec![v(i(16), 4), v(i(16), 4), v(i(16), 4), v(i(16), 4)]),
2429             definition: Named("llvm.aarch64.neon.ld4.v4i16.p0i16")
2430         },
2431         "ld4_dup_u16" => Intrinsic {
2432             inputs: vec![p(true, u(16), None)],
2433             output: agg(false, vec![v(u(16), 4), v(u(16), 4), v(u(16), 4), v(u(16), 4)]),
2434             definition: Named("llvm.aarch64.neon.ld4.v4i16.p0i16")
2435         },
2436         "ld4_dup_s32" => Intrinsic {
2437             inputs: vec![p(true, i(32), None)],
2438             output: agg(false, vec![v(i(32), 2), v(i(32), 2), v(i(32), 2), v(i(32), 2)]),
2439             definition: Named("llvm.aarch64.neon.ld4.v2i32.p0i32")
2440         },
2441         "ld4_dup_u32" => Intrinsic {
2442             inputs: vec![p(true, u(32), None)],
2443             output: agg(false, vec![v(u(32), 2), v(u(32), 2), v(u(32), 2), v(u(32), 2)]),
2444             definition: Named("llvm.aarch64.neon.ld4.v2i32.p0i32")
2445         },
2446         "ld4_dup_s64" => Intrinsic {
2447             inputs: vec![p(true, i(64), None)],
2448             output: agg(false, vec![v(i(64), 1), v(i(64), 1), v(i(64), 1), v(i(64), 1)]),
2449             definition: Named("llvm.aarch64.neon.ld4.v1i64.p0i64")
2450         },
2451         "ld4_dup_u64" => Intrinsic {
2452             inputs: vec![p(true, u(64), None)],
2453             output: agg(false, vec![v(u(64), 1), v(u(64), 1), v(u(64), 1), v(u(64), 1)]),
2454             definition: Named("llvm.aarch64.neon.ld4.v1i64.p0i64")
2455         },
2456         "ld4_dup_f32" => Intrinsic {
2457             inputs: vec![p(true, f(32), None)],
2458             output: agg(false, vec![v(f(32), 2), v(f(32), 2), v(f(32), 2), v(f(32), 2)]),
2459             definition: Named("llvm.aarch64.neon.ld4.v2f32.p0f32")
2460         },
2461         "ld4_dup_f64" => Intrinsic {
2462             inputs: vec![p(true, f(64), None)],
2463             output: agg(false, vec![v(f(64), 1), v(f(64), 1), v(f(64), 1), v(f(64), 1)]),
2464             definition: Named("llvm.aarch64.neon.ld4.v1f64.p0f64")
2465         },
2466         "ld4q_dup_s8" => Intrinsic {
2467             inputs: vec![p(true, i(8), None)],
2468             output: agg(false, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16), v(i(8), 16)]),
2469             definition: Named("llvm.aarch64.neon.ld4.v16i8.p0i8")
2470         },
2471         "ld4q_dup_u8" => Intrinsic {
2472             inputs: vec![p(true, u(8), None)],
2473             output: agg(false, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16), v(u(8), 16)]),
2474             definition: Named("llvm.aarch64.neon.ld4.v16i8.p0i8")
2475         },
2476         "ld4q_dup_s16" => Intrinsic {
2477             inputs: vec![p(true, i(16), None)],
2478             output: agg(false, vec![v(i(16), 8), v(i(16), 8), v(i(16), 8), v(i(16), 8)]),
2479             definition: Named("llvm.aarch64.neon.ld4.v8i16.p0i16")
2480         },
2481         "ld4q_dup_u16" => Intrinsic {
2482             inputs: vec![p(true, u(16), None)],
2483             output: agg(false, vec![v(u(16), 8), v(u(16), 8), v(u(16), 8), v(u(16), 8)]),
2484             definition: Named("llvm.aarch64.neon.ld4.v8i16.p0i16")
2485         },
2486         "ld4q_dup_s32" => Intrinsic {
2487             inputs: vec![p(true, i(32), None)],
2488             output: agg(false, vec![v(i(32), 4), v(i(32), 4), v(i(32), 4), v(i(32), 4)]),
2489             definition: Named("llvm.aarch64.neon.ld4.v4i32.p0i32")
2490         },
2491         "ld4q_dup_u32" => Intrinsic {
2492             inputs: vec![p(true, u(32), None)],
2493             output: agg(false, vec![v(u(32), 4), v(u(32), 4), v(u(32), 4), v(u(32), 4)]),
2494             definition: Named("llvm.aarch64.neon.ld4.v4i32.p0i32")
2495         },
2496         "ld4q_dup_s64" => Intrinsic {
2497             inputs: vec![p(true, i(64), None)],
2498             output: agg(false, vec![v(i(64), 2), v(i(64), 2), v(i(64), 2), v(i(64), 2)]),
2499             definition: Named("llvm.aarch64.neon.ld4.v2i64.p0i64")
2500         },
2501         "ld4q_dup_u64" => Intrinsic {
2502             inputs: vec![p(true, u(64), None)],
2503             output: agg(false, vec![v(u(64), 2), v(u(64), 2), v(u(64), 2), v(u(64), 2)]),
2504             definition: Named("llvm.aarch64.neon.ld4.v2i64.p0i64")
2505         },
2506         "ld4q_dup_f32" => Intrinsic {
2507             inputs: vec![p(true, f(32), None)],
2508             output: agg(false, vec![v(f(32), 4), v(f(32), 4), v(f(32), 4), v(f(32), 4)]),
2509             definition: Named("llvm.aarch64.neon.ld4.v4f32.p0f32")
2510         },
2511         "ld4q_dup_f64" => Intrinsic {
2512             inputs: vec![p(true, f(64), None)],
2513             output: agg(false, vec![v(f(64), 2), v(f(64), 2), v(f(64), 2), v(f(64), 2)]),
2514             definition: Named("llvm.aarch64.neon.ld4.v2f64.p0f64")
2515         },
2516         "padd_s8" => Intrinsic {
2517             inputs: vec![v(i(8), 8), v(i(8), 8)],
2518             output: v(i(8), 8),
2519             definition: Named("llvm.aarch64.neon.addp.v8i8")
2520         },
2521         "padd_u8" => Intrinsic {
2522             inputs: vec![v(u(8), 8), v(u(8), 8)],
2523             output: v(u(8), 8),
2524             definition: Named("llvm.aarch64.neon.addp.v8i8")
2525         },
2526         "padd_s16" => Intrinsic {
2527             inputs: vec![v(i(16), 4), v(i(16), 4)],
2528             output: v(i(16), 4),
2529             definition: Named("llvm.aarch64.neon.addp.v4i16")
2530         },
2531         "padd_u16" => Intrinsic {
2532             inputs: vec![v(u(16), 4), v(u(16), 4)],
2533             output: v(u(16), 4),
2534             definition: Named("llvm.aarch64.neon.addp.v4i16")
2535         },
2536         "padd_s32" => Intrinsic {
2537             inputs: vec![v(i(32), 2), v(i(32), 2)],
2538             output: v(i(32), 2),
2539             definition: Named("llvm.aarch64.neon.addp.v2i32")
2540         },
2541         "padd_u32" => Intrinsic {
2542             inputs: vec![v(u(32), 2), v(u(32), 2)],
2543             output: v(u(32), 2),
2544             definition: Named("llvm.aarch64.neon.addp.v2i32")
2545         },
2546         "padd_f32" => Intrinsic {
2547             inputs: vec![v(f(32), 2), v(f(32), 2)],
2548             output: v(f(32), 2),
2549             definition: Named("llvm.aarch64.neon.addp.v2f32")
2550         },
2551         "paddq_s8" => Intrinsic {
2552             inputs: vec![v(i(8), 16), v(i(8), 16)],
2553             output: v(i(8), 16),
2554             definition: Named("llvm.aarch64.neon.addp.v16i8")
2555         },
2556         "paddq_u8" => Intrinsic {
2557             inputs: vec![v(u(8), 16), v(u(8), 16)],
2558             output: v(u(8), 16),
2559             definition: Named("llvm.aarch64.neon.addp.v16i8")
2560         },
2561         "paddq_s16" => Intrinsic {
2562             inputs: vec![v(i(16), 8), v(i(16), 8)],
2563             output: v(i(16), 8),
2564             definition: Named("llvm.aarch64.neon.addp.v8i16")
2565         },
2566         "paddq_u16" => Intrinsic {
2567             inputs: vec![v(u(16), 8), v(u(16), 8)],
2568             output: v(u(16), 8),
2569             definition: Named("llvm.aarch64.neon.addp.v8i16")
2570         },
2571         "paddq_s32" => Intrinsic {
2572             inputs: vec![v(i(32), 4), v(i(32), 4)],
2573             output: v(i(32), 4),
2574             definition: Named("llvm.aarch64.neon.addp.v4i32")
2575         },
2576         "paddq_u32" => Intrinsic {
2577             inputs: vec![v(u(32), 4), v(u(32), 4)],
2578             output: v(u(32), 4),
2579             definition: Named("llvm.aarch64.neon.addp.v4i32")
2580         },
2581         "paddq_f32" => Intrinsic {
2582             inputs: vec![v(f(32), 4), v(f(32), 4)],
2583             output: v(f(32), 4),
2584             definition: Named("llvm.aarch64.neon.addp.v4f32")
2585         },
2586         "paddq_s64" => Intrinsic {
2587             inputs: vec![v(i(64), 2), v(i(64), 2)],
2588             output: v(i(64), 2),
2589             definition: Named("llvm.aarch64.neon.addp.v2i64")
2590         },
2591         "paddq_u64" => Intrinsic {
2592             inputs: vec![v(u(64), 2), v(u(64), 2)],
2593             output: v(u(64), 2),
2594             definition: Named("llvm.aarch64.neon.addp.v2i64")
2595         },
2596         "paddq_f64" => Intrinsic {
2597             inputs: vec![v(f(64), 2), v(f(64), 2)],
2598             output: v(f(64), 2),
2599             definition: Named("llvm.aarch64.neon.addp.v2f64")
2600         },
2601         "paddl_s16" => Intrinsic {
2602             inputs: vec![v(i(8), 8)],
2603             output: v(i(16), 4),
2604             definition: Named("llvm.aarch64.neon.saddlp.v4i16.v8i8")
2605         },
2606         "paddl_u16" => Intrinsic {
2607             inputs: vec![v(u(8), 8)],
2608             output: v(u(16), 4),
2609             definition: Named("llvm.aarch64.neon.uaddlp.v4i16.v8i8")
2610         },
2611         "paddl_s32" => Intrinsic {
2612             inputs: vec![v(i(16), 4)],
2613             output: v(i(32), 2),
2614             definition: Named("llvm.aarch64.neon.saddlp.v2i32.v4i16")
2615         },
2616         "paddl_u32" => Intrinsic {
2617             inputs: vec![v(u(16), 4)],
2618             output: v(u(32), 2),
2619             definition: Named("llvm.aarch64.neon.uaddlp.v2i32.v4i16")
2620         },
2621         "paddl_s64" => Intrinsic {
2622             inputs: vec![v(i(32), 2)],
2623             output: v(i(64), 1),
2624             definition: Named("llvm.aarch64.neon.saddlp.v1i64.v2i32")
2625         },
2626         "paddl_u64" => Intrinsic {
2627             inputs: vec![v(u(32), 2)],
2628             output: v(u(64), 1),
2629             definition: Named("llvm.aarch64.neon.uaddlp.v1i64.v2i32")
2630         },
2631         "paddlq_s16" => Intrinsic {
2632             inputs: vec![v(i(8), 16)],
2633             output: v(i(16), 8),
2634             definition: Named("llvm.aarch64.neon.saddlp.v8i16.v16i8")
2635         },
2636         "paddlq_u16" => Intrinsic {
2637             inputs: vec![v(u(8), 16)],
2638             output: v(u(16), 8),
2639             definition: Named("llvm.aarch64.neon.uaddlp.v8i16.v16i8")
2640         },
2641         "paddlq_s32" => Intrinsic {
2642             inputs: vec![v(i(16), 8)],
2643             output: v(i(32), 4),
2644             definition: Named("llvm.aarch64.neon.saddlp.v4i32.v8i16")
2645         },
2646         "paddlq_u32" => Intrinsic {
2647             inputs: vec![v(u(16), 8)],
2648             output: v(u(32), 4),
2649             definition: Named("llvm.aarch64.neon.uaddlp.v4i32.v8i16")
2650         },
2651         "paddlq_s64" => Intrinsic {
2652             inputs: vec![v(i(32), 4)],
2653             output: v(i(64), 2),
2654             definition: Named("llvm.aarch64.neon.saddlp.v2i64.v4i32")
2655         },
2656         "paddlq_u64" => Intrinsic {
2657             inputs: vec![v(u(32), 4)],
2658             output: v(u(64), 2),
2659             definition: Named("llvm.aarch64.neon.uaddlp.v2i64.v4i32")
2660         },
2661         "pmax_s8" => Intrinsic {
2662             inputs: vec![v(i(8), 8), v(i(8), 8)],
2663             output: v(i(8), 8),
2664             definition: Named("llvm.aarch64.neon.smaxp.v8i8")
2665         },
2666         "pmax_u8" => Intrinsic {
2667             inputs: vec![v(u(8), 8), v(u(8), 8)],
2668             output: v(u(8), 8),
2669             definition: Named("llvm.aarch64.neon.umaxp.v8i8")
2670         },
2671         "pmax_s16" => Intrinsic {
2672             inputs: vec![v(i(16), 4), v(i(16), 4)],
2673             output: v(i(16), 4),
2674             definition: Named("llvm.aarch64.neon.smaxp.v4i16")
2675         },
2676         "pmax_u16" => Intrinsic {
2677             inputs: vec![v(u(16), 4), v(u(16), 4)],
2678             output: v(u(16), 4),
2679             definition: Named("llvm.aarch64.neon.umaxp.v4i16")
2680         },
2681         "pmax_s32" => Intrinsic {
2682             inputs: vec![v(i(32), 2), v(i(32), 2)],
2683             output: v(i(32), 2),
2684             definition: Named("llvm.aarch64.neon.smaxp.v2i32")
2685         },
2686         "pmax_u32" => Intrinsic {
2687             inputs: vec![v(u(32), 2), v(u(32), 2)],
2688             output: v(u(32), 2),
2689             definition: Named("llvm.aarch64.neon.umaxp.v2i32")
2690         },
2691         "pmax_f32" => Intrinsic {
2692             inputs: vec![v(f(32), 2), v(f(32), 2)],
2693             output: v(f(32), 2),
2694             definition: Named("llvm.aarch64.neon.fmaxp.v2f32")
2695         },
2696         "pmaxq_s8" => Intrinsic {
2697             inputs: vec![v(i(8), 16), v(i(8), 16)],
2698             output: v(i(8), 16),
2699             definition: Named("llvm.aarch64.neon.smaxp.v16i8")
2700         },
2701         "pmaxq_u8" => Intrinsic {
2702             inputs: vec![v(u(8), 16), v(u(8), 16)],
2703             output: v(u(8), 16),
2704             definition: Named("llvm.aarch64.neon.umaxp.v16i8")
2705         },
2706         "pmaxq_s16" => Intrinsic {
2707             inputs: vec![v(i(16), 8), v(i(16), 8)],
2708             output: v(i(16), 8),
2709             definition: Named("llvm.aarch64.neon.smaxp.v8i16")
2710         },
2711         "pmaxq_u16" => Intrinsic {
2712             inputs: vec![v(u(16), 8), v(u(16), 8)],
2713             output: v(u(16), 8),
2714             definition: Named("llvm.aarch64.neon.umaxp.v8i16")
2715         },
2716         "pmaxq_s32" => Intrinsic {
2717             inputs: vec![v(i(32), 4), v(i(32), 4)],
2718             output: v(i(32), 4),
2719             definition: Named("llvm.aarch64.neon.smaxp.v4i32")
2720         },
2721         "pmaxq_u32" => Intrinsic {
2722             inputs: vec![v(u(32), 4), v(u(32), 4)],
2723             output: v(u(32), 4),
2724             definition: Named("llvm.aarch64.neon.umaxp.v4i32")
2725         },
2726         "pmaxq_f32" => Intrinsic {
2727             inputs: vec![v(f(32), 4), v(f(32), 4)],
2728             output: v(f(32), 4),
2729             definition: Named("llvm.aarch64.neon.fmaxp.v4f32")
2730         },
2731         "pmaxq_s64" => Intrinsic {
2732             inputs: vec![v(i(64), 2), v(i(64), 2)],
2733             output: v(i(64), 2),
2734             definition: Named("llvm.aarch64.neon.smaxp.v2i64")
2735         },
2736         "pmaxq_u64" => Intrinsic {
2737             inputs: vec![v(u(64), 2), v(u(64), 2)],
2738             output: v(u(64), 2),
2739             definition: Named("llvm.aarch64.neon.umaxp.v2i64")
2740         },
2741         "pmaxq_f64" => Intrinsic {
2742             inputs: vec![v(f(64), 2), v(f(64), 2)],
2743             output: v(f(64), 2),
2744             definition: Named("llvm.aarch64.neon.fmaxp.v2f64")
2745         },
2746         "pmin_s8" => Intrinsic {
2747             inputs: vec![v(i(8), 8), v(i(8), 8)],
2748             output: v(i(8), 8),
2749             definition: Named("llvm.aarch64.neon.sminp.v8i8")
2750         },
2751         "pmin_u8" => Intrinsic {
2752             inputs: vec![v(u(8), 8), v(u(8), 8)],
2753             output: v(u(8), 8),
2754             definition: Named("llvm.aarch64.neon.uminp.v8i8")
2755         },
2756         "pmin_s16" => Intrinsic {
2757             inputs: vec![v(i(16), 4), v(i(16), 4)],
2758             output: v(i(16), 4),
2759             definition: Named("llvm.aarch64.neon.sminp.v4i16")
2760         },
2761         "pmin_u16" => Intrinsic {
2762             inputs: vec![v(u(16), 4), v(u(16), 4)],
2763             output: v(u(16), 4),
2764             definition: Named("llvm.aarch64.neon.uminp.v4i16")
2765         },
2766         "pmin_s32" => Intrinsic {
2767             inputs: vec![v(i(32), 2), v(i(32), 2)],
2768             output: v(i(32), 2),
2769             definition: Named("llvm.aarch64.neon.sminp.v2i32")
2770         },
2771         "pmin_u32" => Intrinsic {
2772             inputs: vec![v(u(32), 2), v(u(32), 2)],
2773             output: v(u(32), 2),
2774             definition: Named("llvm.aarch64.neon.uminp.v2i32")
2775         },
2776         "pmin_f32" => Intrinsic {
2777             inputs: vec![v(f(32), 2), v(f(32), 2)],
2778             output: v(f(32), 2),
2779             definition: Named("llvm.aarch64.neon.fminp.v2f32")
2780         },
2781         "pminq_s8" => Intrinsic {
2782             inputs: vec![v(i(8), 16), v(i(8), 16)],
2783             output: v(i(8), 16),
2784             definition: Named("llvm.aarch64.neon.sminp.v16i8")
2785         },
2786         "pminq_u8" => Intrinsic {
2787             inputs: vec![v(u(8), 16), v(u(8), 16)],
2788             output: v(u(8), 16),
2789             definition: Named("llvm.aarch64.neon.uminp.v16i8")
2790         },
2791         "pminq_s16" => Intrinsic {
2792             inputs: vec![v(i(16), 8), v(i(16), 8)],
2793             output: v(i(16), 8),
2794             definition: Named("llvm.aarch64.neon.sminp.v8i16")
2795         },
2796         "pminq_u16" => Intrinsic {
2797             inputs: vec![v(u(16), 8), v(u(16), 8)],
2798             output: v(u(16), 8),
2799             definition: Named("llvm.aarch64.neon.uminp.v8i16")
2800         },
2801         "pminq_s32" => Intrinsic {
2802             inputs: vec![v(i(32), 4), v(i(32), 4)],
2803             output: v(i(32), 4),
2804             definition: Named("llvm.aarch64.neon.sminp.v4i32")
2805         },
2806         "pminq_u32" => Intrinsic {
2807             inputs: vec![v(u(32), 4), v(u(32), 4)],
2808             output: v(u(32), 4),
2809             definition: Named("llvm.aarch64.neon.uminp.v4i32")
2810         },
2811         "pminq_f32" => Intrinsic {
2812             inputs: vec![v(f(32), 4), v(f(32), 4)],
2813             output: v(f(32), 4),
2814             definition: Named("llvm.aarch64.neon.fminp.v4f32")
2815         },
2816         "pminq_s64" => Intrinsic {
2817             inputs: vec![v(i(64), 2), v(i(64), 2)],
2818             output: v(i(64), 2),
2819             definition: Named("llvm.aarch64.neon.sminp.v2i64")
2820         },
2821         "pminq_u64" => Intrinsic {
2822             inputs: vec![v(u(64), 2), v(u(64), 2)],
2823             output: v(u(64), 2),
2824             definition: Named("llvm.aarch64.neon.uminp.v2i64")
2825         },
2826         "pminq_f64" => Intrinsic {
2827             inputs: vec![v(f(64), 2), v(f(64), 2)],
2828             output: v(f(64), 2),
2829             definition: Named("llvm.aarch64.neon.fminp.v2f64")
2830         },
2831         "pmaxnm_s8" => Intrinsic {
2832             inputs: vec![v(i(8), 8), v(i(8), 8)],
2833             output: v(i(8), 8),
2834             definition: Named("llvm.aarch64.neon.smaxnmp.v8i8")
2835         },
2836         "pmaxnm_u8" => Intrinsic {
2837             inputs: vec![v(u(8), 8), v(u(8), 8)],
2838             output: v(u(8), 8),
2839             definition: Named("llvm.aarch64.neon.umaxnmp.v8i8")
2840         },
2841         "pmaxnm_s16" => Intrinsic {
2842             inputs: vec![v(i(16), 4), v(i(16), 4)],
2843             output: v(i(16), 4),
2844             definition: Named("llvm.aarch64.neon.smaxnmp.v4i16")
2845         },
2846         "pmaxnm_u16" => Intrinsic {
2847             inputs: vec![v(u(16), 4), v(u(16), 4)],
2848             output: v(u(16), 4),
2849             definition: Named("llvm.aarch64.neon.umaxnmp.v4i16")
2850         },
2851         "pmaxnm_s32" => Intrinsic {
2852             inputs: vec![v(i(32), 2), v(i(32), 2)],
2853             output: v(i(32), 2),
2854             definition: Named("llvm.aarch64.neon.smaxnmp.v2i32")
2855         },
2856         "pmaxnm_u32" => Intrinsic {
2857             inputs: vec![v(u(32), 2), v(u(32), 2)],
2858             output: v(u(32), 2),
2859             definition: Named("llvm.aarch64.neon.umaxnmp.v2i32")
2860         },
2861         "pmaxnm_f32" => Intrinsic {
2862             inputs: vec![v(f(32), 2), v(f(32), 2)],
2863             output: v(f(32), 2),
2864             definition: Named("llvm.aarch64.neon.fmaxnmp.v2f32")
2865         },
2866         "pmaxnmq_s8" => Intrinsic {
2867             inputs: vec![v(i(8), 16), v(i(8), 16)],
2868             output: v(i(8), 16),
2869             definition: Named("llvm.aarch64.neon.smaxnmp.v16i8")
2870         },
2871         "pmaxnmq_u8" => Intrinsic {
2872             inputs: vec![v(u(8), 16), v(u(8), 16)],
2873             output: v(u(8), 16),
2874             definition: Named("llvm.aarch64.neon.umaxnmp.v16i8")
2875         },
2876         "pmaxnmq_s16" => Intrinsic {
2877             inputs: vec![v(i(16), 8), v(i(16), 8)],
2878             output: v(i(16), 8),
2879             definition: Named("llvm.aarch64.neon.smaxnmp.v8i16")
2880         },
2881         "pmaxnmq_u16" => Intrinsic {
2882             inputs: vec![v(u(16), 8), v(u(16), 8)],
2883             output: v(u(16), 8),
2884             definition: Named("llvm.aarch64.neon.umaxnmp.v8i16")
2885         },
2886         "pmaxnmq_s32" => Intrinsic {
2887             inputs: vec![v(i(32), 4), v(i(32), 4)],
2888             output: v(i(32), 4),
2889             definition: Named("llvm.aarch64.neon.smaxnmp.v4i32")
2890         },
2891         "pmaxnmq_u32" => Intrinsic {
2892             inputs: vec![v(u(32), 4), v(u(32), 4)],
2893             output: v(u(32), 4),
2894             definition: Named("llvm.aarch64.neon.umaxnmp.v4i32")
2895         },
2896         "pmaxnmq_f32" => Intrinsic {
2897             inputs: vec![v(f(32), 4), v(f(32), 4)],
2898             output: v(f(32), 4),
2899             definition: Named("llvm.aarch64.neon.fmaxnmp.v4f32")
2900         },
2901         "pmaxnmq_s64" => Intrinsic {
2902             inputs: vec![v(i(64), 2), v(i(64), 2)],
2903             output: v(i(64), 2),
2904             definition: Named("llvm.aarch64.neon.smaxnmp.v2i64")
2905         },
2906         "pmaxnmq_u64" => Intrinsic {
2907             inputs: vec![v(u(64), 2), v(u(64), 2)],
2908             output: v(u(64), 2),
2909             definition: Named("llvm.aarch64.neon.umaxnmp.v2i64")
2910         },
2911         "pmaxnmq_f64" => Intrinsic {
2912             inputs: vec![v(f(64), 2), v(f(64), 2)],
2913             output: v(f(64), 2),
2914             definition: Named("llvm.aarch64.neon.fmaxnmp.v2f64")
2915         },
2916         "pminnm_f32" => Intrinsic {
2917             inputs: vec![v(f(32), 2), v(f(32), 2)],
2918             output: v(f(32), 2),
2919             definition: Named("llvm.aarch64.neon.fminnmp.v2f32")
2920         },
2921         "pminnmq_f32" => Intrinsic {
2922             inputs: vec![v(f(32), 4), v(f(32), 4)],
2923             output: v(f(32), 4),
2924             definition: Named("llvm.aarch64.neon.fminnmp.v4f32")
2925         },
2926         "pminnmq_f64" => Intrinsic {
2927             inputs: vec![v(f(64), 2), v(f(64), 2)],
2928             output: v(f(64), 2),
2929             definition: Named("llvm.aarch64.neon.fminnmp.v2f64")
2930         },
2931         "addv_s8" => Intrinsic {
2932             inputs: vec![v(i(8), 8)],
2933             output: i(8),
2934             definition: Named("llvm.aarch64.neon.saddv.i8.v8i8")
2935         },
2936         "addv_u8" => Intrinsic {
2937             inputs: vec![v(u(8), 8)],
2938             output: u(8),
2939             definition: Named("llvm.aarch64.neon.uaddv.i8.v8i8")
2940         },
2941         "addv_s16" => Intrinsic {
2942             inputs: vec![v(i(16), 4)],
2943             output: i(16),
2944             definition: Named("llvm.aarch64.neon.saddv.i16.v4i16")
2945         },
2946         "addv_u16" => Intrinsic {
2947             inputs: vec![v(u(16), 4)],
2948             output: u(16),
2949             definition: Named("llvm.aarch64.neon.uaddv.i16.v4i16")
2950         },
2951         "addv_s32" => Intrinsic {
2952             inputs: vec![v(i(32), 2)],
2953             output: i(32),
2954             definition: Named("llvm.aarch64.neon.saddv.i32.v2i32")
2955         },
2956         "addv_u32" => Intrinsic {
2957             inputs: vec![v(u(32), 2)],
2958             output: u(32),
2959             definition: Named("llvm.aarch64.neon.uaddv.i32.v2i32")
2960         },
2961         "addv_f32" => Intrinsic {
2962             inputs: vec![v(f(32), 2)],
2963             output: f(32),
2964             definition: Named("llvm.aarch64.neon.faddv.f32.v2f32")
2965         },
2966         "addvq_s8" => Intrinsic {
2967             inputs: vec![v(i(8), 16)],
2968             output: i(8),
2969             definition: Named("llvm.aarch64.neon.saddv.i8.v16i8")
2970         },
2971         "addvq_u8" => Intrinsic {
2972             inputs: vec![v(u(8), 16)],
2973             output: u(8),
2974             definition: Named("llvm.aarch64.neon.uaddv.i8.v16i8")
2975         },
2976         "addvq_s16" => Intrinsic {
2977             inputs: vec![v(i(16), 8)],
2978             output: i(16),
2979             definition: Named("llvm.aarch64.neon.saddv.i16.v8i16")
2980         },
2981         "addvq_u16" => Intrinsic {
2982             inputs: vec![v(u(16), 8)],
2983             output: u(16),
2984             definition: Named("llvm.aarch64.neon.uaddv.i16.v8i16")
2985         },
2986         "addvq_s32" => Intrinsic {
2987             inputs: vec![v(i(32), 4)],
2988             output: i(32),
2989             definition: Named("llvm.aarch64.neon.saddv.i32.v4i32")
2990         },
2991         "addvq_u32" => Intrinsic {
2992             inputs: vec![v(u(32), 4)],
2993             output: u(32),
2994             definition: Named("llvm.aarch64.neon.uaddv.i32.v4i32")
2995         },
2996         "addvq_f32" => Intrinsic {
2997             inputs: vec![v(f(32), 4)],
2998             output: f(32),
2999             definition: Named("llvm.aarch64.neon.faddv.f32.v4f32")
3000         },
3001         "addvq_s64" => Intrinsic {
3002             inputs: vec![v(i(64), 2)],
3003             output: i(64),
3004             definition: Named("llvm.aarch64.neon.saddv.i64.v2i64")
3005         },
3006         "addvq_u64" => Intrinsic {
3007             inputs: vec![v(u(64), 2)],
3008             output: u(64),
3009             definition: Named("llvm.aarch64.neon.uaddv.i64.v2i64")
3010         },
3011         "addvq_f64" => Intrinsic {
3012             inputs: vec![v(f(64), 2)],
3013             output: f(64),
3014             definition: Named("llvm.aarch64.neon.faddv.f64.v2f64")
3015         },
3016         "addlv_s8" => Intrinsic {
3017             inputs: vec![v(i(8), 8)],
3018             output: i(16),
3019             definition: Named("llvm.aarch64.neon.saddlv.i16.v8i8")
3020         },
3021         "addlv_u8" => Intrinsic {
3022             inputs: vec![v(u(8), 8)],
3023             output: u(16),
3024             definition: Named("llvm.aarch64.neon.uaddlv.i16.v8i8")
3025         },
3026         "addlv_s16" => Intrinsic {
3027             inputs: vec![v(i(16), 4)],
3028             output: i(32),
3029             definition: Named("llvm.aarch64.neon.saddlv.i32.v4i16")
3030         },
3031         "addlv_u16" => Intrinsic {
3032             inputs: vec![v(u(16), 4)],
3033             output: u(32),
3034             definition: Named("llvm.aarch64.neon.uaddlv.i32.v4i16")
3035         },
3036         "addlv_s32" => Intrinsic {
3037             inputs: vec![v(i(32), 2)],
3038             output: i(64),
3039             definition: Named("llvm.aarch64.neon.saddlv.i64.v2i32")
3040         },
3041         "addlv_u32" => Intrinsic {
3042             inputs: vec![v(u(32), 2)],
3043             output: u(64),
3044             definition: Named("llvm.aarch64.neon.uaddlv.i64.v2i32")
3045         },
3046         "addlvq_s8" => Intrinsic {
3047             inputs: vec![v(i(8), 16)],
3048             output: i(16),
3049             definition: Named("llvm.aarch64.neon.saddlv.i16.v16i8")
3050         },
3051         "addlvq_u8" => Intrinsic {
3052             inputs: vec![v(u(8), 16)],
3053             output: u(16),
3054             definition: Named("llvm.aarch64.neon.uaddlv.i16.v16i8")
3055         },
3056         "addlvq_s16" => Intrinsic {
3057             inputs: vec![v(i(16), 8)],
3058             output: i(32),
3059             definition: Named("llvm.aarch64.neon.saddlv.i32.v8i16")
3060         },
3061         "addlvq_u16" => Intrinsic {
3062             inputs: vec![v(u(16), 8)],
3063             output: u(32),
3064             definition: Named("llvm.aarch64.neon.uaddlv.i32.v8i16")
3065         },
3066         "addlvq_s32" => Intrinsic {
3067             inputs: vec![v(i(32), 4)],
3068             output: i(64),
3069             definition: Named("llvm.aarch64.neon.saddlv.i64.v4i32")
3070         },
3071         "addlvq_u32" => Intrinsic {
3072             inputs: vec![v(u(32), 4)],
3073             output: u(64),
3074             definition: Named("llvm.aarch64.neon.uaddlv.i64.v4i32")
3075         },
3076         "maxv_s8" => Intrinsic {
3077             inputs: vec![v(i(8), 8)],
3078             output: i(8),
3079             definition: Named("llvm.aarch64.neon.smaxv.i8.v8i8")
3080         },
3081         "maxv_u8" => Intrinsic {
3082             inputs: vec![v(u(8), 8)],
3083             output: u(8),
3084             definition: Named("llvm.aarch64.neon.umaxv.i8.v8i8")
3085         },
3086         "maxv_s16" => Intrinsic {
3087             inputs: vec![v(i(16), 4)],
3088             output: i(16),
3089             definition: Named("llvm.aarch64.neon.smaxv.i16.v4i16")
3090         },
3091         "maxv_u16" => Intrinsic {
3092             inputs: vec![v(u(16), 4)],
3093             output: u(16),
3094             definition: Named("llvm.aarch64.neon.umaxv.i16.v4i16")
3095         },
3096         "maxv_s32" => Intrinsic {
3097             inputs: vec![v(i(32), 2)],
3098             output: i(32),
3099             definition: Named("llvm.aarch64.neon.smaxv.i32.v2i32")
3100         },
3101         "maxv_u32" => Intrinsic {
3102             inputs: vec![v(u(32), 2)],
3103             output: u(32),
3104             definition: Named("llvm.aarch64.neon.umaxv.i32.v2i32")
3105         },
3106         "maxv_f32" => Intrinsic {
3107             inputs: vec![v(f(32), 2)],
3108             output: f(32),
3109             definition: Named("llvm.aarch64.neon.fmaxv.f32.v2f32")
3110         },
3111         "maxvq_s8" => Intrinsic {
3112             inputs: vec![v(i(8), 16)],
3113             output: i(8),
3114             definition: Named("llvm.aarch64.neon.smaxv.i8.v16i8")
3115         },
3116         "maxvq_u8" => Intrinsic {
3117             inputs: vec![v(u(8), 16)],
3118             output: u(8),
3119             definition: Named("llvm.aarch64.neon.umaxv.i8.v16i8")
3120         },
3121         "maxvq_s16" => Intrinsic {
3122             inputs: vec![v(i(16), 8)],
3123             output: i(16),
3124             definition: Named("llvm.aarch64.neon.smaxv.i16.v8i16")
3125         },
3126         "maxvq_u16" => Intrinsic {
3127             inputs: vec![v(u(16), 8)],
3128             output: u(16),
3129             definition: Named("llvm.aarch64.neon.umaxv.i16.v8i16")
3130         },
3131         "maxvq_s32" => Intrinsic {
3132             inputs: vec![v(i(32), 4)],
3133             output: i(32),
3134             definition: Named("llvm.aarch64.neon.smaxv.i32.v4i32")
3135         },
3136         "maxvq_u32" => Intrinsic {
3137             inputs: vec![v(u(32), 4)],
3138             output: u(32),
3139             definition: Named("llvm.aarch64.neon.umaxv.i32.v4i32")
3140         },
3141         "maxvq_f32" => Intrinsic {
3142             inputs: vec![v(f(32), 4)],
3143             output: f(32),
3144             definition: Named("llvm.aarch64.neon.fmaxv.f32.v4f32")
3145         },
3146         "maxvq_f64" => Intrinsic {
3147             inputs: vec![v(f(64), 2)],
3148             output: f(64),
3149             definition: Named("llvm.aarch64.neon.fmaxv.f64.v2f64")
3150         },
3151         "minv_s8" => Intrinsic {
3152             inputs: vec![v(i(8), 8)],
3153             output: i(8),
3154             definition: Named("llvm.aarch64.neon.sminv.i8.v8i8")
3155         },
3156         "minv_u8" => Intrinsic {
3157             inputs: vec![v(u(8), 8)],
3158             output: u(8),
3159             definition: Named("llvm.aarch64.neon.uminv.i8.v8i8")
3160         },
3161         "minv_s16" => Intrinsic {
3162             inputs: vec![v(i(16), 4)],
3163             output: i(16),
3164             definition: Named("llvm.aarch64.neon.sminv.i16.v4i16")
3165         },
3166         "minv_u16" => Intrinsic {
3167             inputs: vec![v(u(16), 4)],
3168             output: u(16),
3169             definition: Named("llvm.aarch64.neon.uminv.i16.v4i16")
3170         },
3171         "minv_s32" => Intrinsic {
3172             inputs: vec![v(i(32), 2)],
3173             output: i(32),
3174             definition: Named("llvm.aarch64.neon.sminv.i32.v2i32")
3175         },
3176         "minv_u32" => Intrinsic {
3177             inputs: vec![v(u(32), 2)],
3178             output: u(32),
3179             definition: Named("llvm.aarch64.neon.uminv.i32.v2i32")
3180         },
3181         "minv_f32" => Intrinsic {
3182             inputs: vec![v(f(32), 2)],
3183             output: f(32),
3184             definition: Named("llvm.aarch64.neon.fminv.f32.v2f32")
3185         },
3186         "minvq_s8" => Intrinsic {
3187             inputs: vec![v(i(8), 16)],
3188             output: i(8),
3189             definition: Named("llvm.aarch64.neon.sminv.i8.v16i8")
3190         },
3191         "minvq_u8" => Intrinsic {
3192             inputs: vec![v(u(8), 16)],
3193             output: u(8),
3194             definition: Named("llvm.aarch64.neon.uminv.i8.v16i8")
3195         },
3196         "minvq_s16" => Intrinsic {
3197             inputs: vec![v(i(16), 8)],
3198             output: i(16),
3199             definition: Named("llvm.aarch64.neon.sminv.i16.v8i16")
3200         },
3201         "minvq_u16" => Intrinsic {
3202             inputs: vec![v(u(16), 8)],
3203             output: u(16),
3204             definition: Named("llvm.aarch64.neon.uminv.i16.v8i16")
3205         },
3206         "minvq_s32" => Intrinsic {
3207             inputs: vec![v(i(32), 4)],
3208             output: i(32),
3209             definition: Named("llvm.aarch64.neon.sminv.i32.v4i32")
3210         },
3211         "minvq_u32" => Intrinsic {
3212             inputs: vec![v(u(32), 4)],
3213             output: u(32),
3214             definition: Named("llvm.aarch64.neon.uminv.i32.v4i32")
3215         },
3216         "minvq_f32" => Intrinsic {
3217             inputs: vec![v(f(32), 4)],
3218             output: f(32),
3219             definition: Named("llvm.aarch64.neon.fminv.f32.v4f32")
3220         },
3221         "minvq_f64" => Intrinsic {
3222             inputs: vec![v(f(64), 2)],
3223             output: f(64),
3224             definition: Named("llvm.aarch64.neon.fminv.f64.v2f64")
3225         },
3226         "maxnmv_f32" => Intrinsic {
3227             inputs: vec![v(f(32), 2)],
3228             output: f(32),
3229             definition: Named("llvm.aarch64.neon.fmaxnmv.f32.v2f32")
3230         },
3231         "maxnmvq_f32" => Intrinsic {
3232             inputs: vec![v(f(32), 4)],
3233             output: f(32),
3234             definition: Named("llvm.aarch64.neon.fmaxnmv.f32.v4f32")
3235         },
3236         "maxnmvq_f64" => Intrinsic {
3237             inputs: vec![v(f(64), 2)],
3238             output: f(64),
3239             definition: Named("llvm.aarch64.neon.fmaxnmv.f64.v2f64")
3240         },
3241         "minnmv_f32" => Intrinsic {
3242             inputs: vec![v(f(32), 2)],
3243             output: f(32),
3244             definition: Named("llvm.aarch64.neon.fminnmv.f32.v2f32")
3245         },
3246         "minnmvq_f32" => Intrinsic {
3247             inputs: vec![v(f(32), 4)],
3248             output: f(32),
3249             definition: Named("llvm.aarch64.neon.fminnmv.f32.v4f32")
3250         },
3251         "minnmvq_f64" => Intrinsic {
3252             inputs: vec![v(f(64), 2)],
3253             output: f(64),
3254             definition: Named("llvm.aarch64.neon.fminnmv.f64.v2f64")
3255         },
3256         "qtbl1_s8" => Intrinsic {
3257             inputs: vec![v(i(8), 16), v(u(8), 8)],
3258             output: v(i(8), 8),
3259             definition: Named("llvm.aarch64.neon.tbl1.v8i8")
3260         },
3261         "qtbl1_u8" => Intrinsic {
3262             inputs: vec![v(u(8), 16), v(u(8), 8)],
3263             output: v(u(8), 8),
3264             definition: Named("llvm.aarch64.neon.tbl1.v8i8")
3265         },
3266         "qtbl1q_s8" => Intrinsic {
3267             inputs: vec![v(i(8), 16), v(u(8), 16)],
3268             output: v(i(8), 16),
3269             definition: Named("llvm.aarch64.neon.tbl1.v16i8")
3270         },
3271         "qtbl1q_u8" => Intrinsic {
3272             inputs: vec![v(u(8), 16), v(u(8), 16)],
3273             output: v(u(8), 16),
3274             definition: Named("llvm.aarch64.neon.tbl1.v16i8")
3275         },
3276         "qtbx1_s8" => Intrinsic {
3277             inputs: vec![v(i(8), 8), v(i(8), 16), v(u(8), 8)],
3278             output: v(i(8), 8),
3279             definition: Named("llvm.aarch64.neon.tbx1.v8i8")
3280         },
3281         "qtbx1_u8" => Intrinsic {
3282             inputs: vec![v(u(8), 8), v(u(8), 16), v(u(8), 8)],
3283             output: v(u(8), 8),
3284             definition: Named("llvm.aarch64.neon.tbx1.v8i8")
3285         },
3286         "qtbx1q_s8" => Intrinsic {
3287             inputs: vec![v(i(8), 16), v(i(8), 16), v(u(8), 16)],
3288             output: v(i(8), 16),
3289             definition: Named("llvm.aarch64.neon.tbx1.v16i8")
3290         },
3291         "qtbx1q_u8" => Intrinsic {
3292             inputs: vec![v(u(8), 16), v(u(8), 16), v(u(8), 16)],
3293             output: v(u(8), 16),
3294             definition: Named("llvm.aarch64.neon.tbx1.v16i8")
3295         },
3296         "qtbl2_s8" => Intrinsic {
3297             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16)]), v(u(8), 8)],
3298             output: v(i(8), 8),
3299             definition: Named("llvm.aarch64.neon.tbl2.v8i8")
3300         },
3301         "qtbl2_u8" => Intrinsic {
3302             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16)]), v(u(8), 8)],
3303             output: v(u(8), 8),
3304             definition: Named("llvm.aarch64.neon.tbl2.v8i8")
3305         },
3306         "qtbl2q_s8" => Intrinsic {
3307             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16)]), v(u(8), 16)],
3308             output: v(i(8), 16),
3309             definition: Named("llvm.aarch64.neon.tbl2.v16i8")
3310         },
3311         "qtbl2q_u8" => Intrinsic {
3312             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16)]), v(u(8), 16)],
3313             output: v(u(8), 16),
3314             definition: Named("llvm.aarch64.neon.tbl2.v16i8")
3315         },
3316         "qtbx2_s8" => Intrinsic {
3317             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16)]), v(u(8), 8)],
3318             output: v(i(8), 8),
3319             definition: Named("llvm.aarch64.neon.tbx2.v8i8")
3320         },
3321         "qtbx2_u8" => Intrinsic {
3322             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16)]), v(u(8), 8)],
3323             output: v(u(8), 8),
3324             definition: Named("llvm.aarch64.neon.tbx2.v8i8")
3325         },
3326         "qtbx2q_s8" => Intrinsic {
3327             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16)]), v(u(8), 16)],
3328             output: v(i(8), 16),
3329             definition: Named("llvm.aarch64.neon.tbx2.v16i8")
3330         },
3331         "qtbx2q_u8" => Intrinsic {
3332             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16)]), v(u(8), 16)],
3333             output: v(u(8), 16),
3334             definition: Named("llvm.aarch64.neon.tbx2.v16i8")
3335         },
3336         "qtbl3_s8" => Intrinsic {
3337             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 8)],
3338             output: v(i(8), 8),
3339             definition: Named("llvm.aarch64.neon.tbl3.v8i8")
3340         },
3341         "qtbl3_u8" => Intrinsic {
3342             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 8)],
3343             output: v(u(8), 8),
3344             definition: Named("llvm.aarch64.neon.tbl3.v8i8")
3345         },
3346         "qtbl3q_s8" => Intrinsic {
3347             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 16)],
3348             output: v(i(8), 16),
3349             definition: Named("llvm.aarch64.neon.tbl3.v16i8")
3350         },
3351         "qtbl3q_u8" => Intrinsic {
3352             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 16)],
3353             output: v(u(8), 16),
3354             definition: Named("llvm.aarch64.neon.tbl3.v16i8")
3355         },
3356         "qtbx3_s8" => Intrinsic {
3357             inputs: vec![v(i(8), 8), agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 8)],
3358             output: v(i(8), 8),
3359             definition: Named("llvm.aarch64.neon.tbx3.v8i8")
3360         },
3361         "qtbx3_u8" => Intrinsic {
3362             inputs: vec![v(u(8), 8), agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 8)],
3363             output: v(u(8), 8),
3364             definition: Named("llvm.aarch64.neon.tbx3.v8i8")
3365         },
3366         "qtbx3q_s8" => Intrinsic {
3367             inputs: vec![v(i(8), 16), agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 16)],
3368             output: v(i(8), 16),
3369             definition: Named("llvm.aarch64.neon.tbx3.v16i8")
3370         },
3371         "qtbx3q_u8" => Intrinsic {
3372             inputs: vec![v(u(8), 16), agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 16)],
3373             output: v(u(8), 16),
3374             definition: Named("llvm.aarch64.neon.tbx3.v16i8")
3375         },
3376         "qtbl4_s8" => Intrinsic {
3377             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 8)],
3378             output: v(i(8), 8),
3379             definition: Named("llvm.aarch64.neon.tbl4.v8i8")
3380         },
3381         "qtbl4_u8" => Intrinsic {
3382             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 8)],
3383             output: v(u(8), 8),
3384             definition: Named("llvm.aarch64.neon.tbl4.v8i8")
3385         },
3386         "qtbl4q_s8" => Intrinsic {
3387             inputs: vec![agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 16)],
3388             output: v(i(8), 16),
3389             definition: Named("llvm.aarch64.neon.tbl4.v16i8")
3390         },
3391         "qtbl4q_u8" => Intrinsic {
3392             inputs: vec![agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 16)],
3393             output: v(u(8), 16),
3394             definition: Named("llvm.aarch64.neon.tbl4.v16i8")
3395         },
3396         "qtbx4_s8" => Intrinsic {
3397             inputs: vec![v(i(8), 8), agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 8)],
3398             output: v(i(8), 8),
3399             definition: Named("llvm.aarch64.neon.tbx4.v8i8")
3400         },
3401         "qtbx4_u8" => Intrinsic {
3402             inputs: vec![v(u(8), 8), agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 8)],
3403             output: v(u(8), 8),
3404             definition: Named("llvm.aarch64.neon.tbx4.v8i8")
3405         },
3406         "qtbx4q_s8" => Intrinsic {
3407             inputs: vec![v(i(8), 16), agg(true, vec![v(i(8), 16), v(i(8), 16), v(i(8), 16), v(i(8), 16)]), v(u(8), 16)],
3408             output: v(i(8), 16),
3409             definition: Named("llvm.aarch64.neon.tbx4.v16i8")
3410         },
3411         "qtbx4q_u8" => Intrinsic {
3412             inputs: vec![v(u(8), 16), agg(true, vec![v(u(8), 16), v(u(8), 16), v(u(8), 16), v(u(8), 16)]), v(u(8), 16)],
3413             output: v(u(8), 16),
3414             definition: Named("llvm.aarch64.neon.tbx4.v16i8")
3415         },
3416         _ => return None,
3417     })
3418 }